JP3348631B2 - Tape with ball terminal and semiconductor device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tape with ball terminals having a wiring pattern for connecting a semiconductor chip and a semiconductor device using the same, and more particularly, to a semiconductor chip and a wiring pattern made of a gold-tin eutectic alloy. The present invention relates to a ball terminal attached tape and a semiconductor device using the same.

[0002]

2. Description of the Related Art A conventional semiconductor device using a wiring board with ball terminals is disclosed in, for example, Japanese Patent Application Laid-Open No. 8-181169.

FIG. 9 shows a semiconductor device using a conventional wiring board with ball terminals. The semiconductor device 30 includes a semiconductor chip 1, a wiring board 31 with ball terminals, and a sealing resin 1 for sealing the semiconductor chip 1 and the wiring board 31 with ball terminals.
5 is provided.

[0004] The wiring board 31 with ball terminals is a wiring board 14 having a size larger than the semiconductor chip 1 to be mounted, and the mounting surface of the wiring board 14 on which the semiconductor chip 1 is mounted (hereinafter referred to as “front surface”)
The lead lead 4 wired on the opposite side (hereinafter referred to as the “back side”), the tin plating 13 provided on the lead lead 4, the ball terminal 5 provided on the tin plating 13, and the lead lead 4 are protected. It has an insulating wiring protection film 8. Further, the wiring board 14 is provided with a via hole 10 penetrating the wiring board 14, and the lead 4 is drawn out to the surface of the wiring board 14 and wired through the via hole 10. A tin plating 1 is also provided on the lead 4 on this surface.
The via hole 10 is closed by the tin plating 13 and the lead 4. The semiconductor chip 1 is connected by tin plating 13 on the lead 4 wired on the surface of the wiring board 14.

[0005] Gold bumps 2 are formed on electrode portions (not shown) of the semiconductor chip 1. This semiconductor chip 1
The gold bumps 2 are aligned with the positions of the lead leads 4 wired on the surface of the wiring board 14, and the gold bumps 2 and the tin plating 13 are diffused by the heat treatment, and the gold-tin alloys are bonded to each other to form a semiconductor chip. 1 and the wiring board 14
Is electrically connected to the extraction lead 4 on the surface of the substrate.

In order to protect the semiconductor chip 1 and the wiring board 31 with ball terminals bonded in this manner, these are sealed with a sealing resin 15 to form a semiconductor device 30.

[0007]

However, according to the semiconductor device 30 using the conventional wiring board 31 with ball terminals as shown in FIG.
Since the semiconductor chip 1 mounted thereon is sealed with the sealing resin 15, the wiring board 31 with ball terminals is
The size of the semiconductor chip 1 is larger than that of the semiconductor chip 1 by the amount of supporting the sealing end portion, and the cost is increased. In addition, since the bonding between the gold bump 2 and the tin plating 13 is performed using a diffusion alloy, sufficient bonding strength cannot be obtained.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a tape with ball terminals for miniaturization and cost reduction, and a semiconductor device using the same.

[0009]

According to the present invention, there is provided a tape with ball terminals having a wiring pattern for connecting a semiconductor chip, which is equivalent to or less than the semiconductor chip to be mounted. An insulating film having a size of, a bonding pad for semiconductor chip bonding formed on the first surface of the insulating film, and a bonding pad formed on the first surface of the insulating film and connected to the bonding pad by a lead A ball forming pad for ball terminal bonding, and a ball terminal formed on the second surface of the insulating film and connected to the ball forming pad via a via hole. The bonding pad is provided with tin plating on the surface. Has been
When connected to a semiconductor chip via gold bumps, gold is 10 to 40% by weight and tin is the remaining weight% at the bonding interface.
The present invention provides a tape with ball terminals, characterized by forming a gold-tin eutectic alloy.

In order to achieve the above object, the present invention provides a tape with ball terminals having a wiring pattern for connecting a semiconductor chip, the insulating film having a size equal to or smaller than that of the mounted semiconductor chip. And a bonding pad formed on a first surface of the insulating film for bonding a semiconductor chip, and a ball formed on the first surface of the insulating film and connected to a bonding pad and a lead for ball terminal bonding. A pad and a ball terminal formed on the second surface of the insulating film and connected to the ball forming pad via a via hole. The bonding pad has a surface plated with tin, and the bonding pad has When connected via gold plating, 10
Provided is a tape with a ball terminal, which forms a gold-tin eutectic alloy in which tin is ４０40 % by weight and tin is the remaining weight% .

Further, in order to achieve the above object, the present invention comprises a tape with a ball terminal having a predetermined wiring pattern and a semiconductor chip connected to the predetermined wiring pattern on the tape with a ball terminal. The terminal-attached tape is provided with an insulating film having a size equal to or smaller than the semiconductor chip to be mounted, and a tin-plated surface for bonding the semiconductor chip formed on the first surface of the insulating film. A bonding pad, a ball forming pad for ball terminal bonding formed on the first surface of the insulating film and connected by the bonding pad and the lead, and a ball forming pad formed on the second surface of the insulating film; Consisting of ball terminals connected via holes, the semiconductor chip is bonded to bonding pads via gold bumps or gold plating. Gold 10-40 weight bonding interface
The present invention provides a semiconductor device comprising: an electrode on which a gold-tin eutectic alloy is formed in which tin is the remaining weight% by weight, and a passivation film covering a bonding surface while exposing only the electrode.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a tape with ball terminals according to the present invention and a semiconductor device using the same will be described in detail.

FIG. 1 shows a semiconductor device using the tape with ball terminals of the present invention. The semiconductor device 30 includes a semiconductor chip 1 and a tape 25 with ball terminals.

The tape 25 with ball terminals is provided on the film 3 having a slightly smaller size than the semiconductor chip 1 to be mounted, and on the mounting surface of the film 3 on which the semiconductor chip 1 is mounted (hereinafter referred to as “front surface”). Via hole 1 provided to penetrate bonding pad 6 and film 3 serving as a portion
0, a ball terminal 5 which is heat-welded from a surface of the film 3 opposite to the mounting surface of the semiconductor chip 1 (hereinafter referred to as a "back surface") to the via hole 10; Ball-forming pad 11, bonding pad 6, and ball-forming pad 11 to be bonded to the portion inserted in
And an insulating wiring protection film 8 that protects the extraction lead 4 and the ball formation pad 11.

The semiconductor chip 1 has, on its lower side (bottom surface):
The bottom surface of the semiconductor chip 1 is subjected to a passivation process so that the aluminum electrode 9 is provided so as to match the position of the bonding pad 6 of the tape 25 with ball terminals. Thus, a passivation film 7 is formed. The aluminum electrode 9 of the semiconductor chip 1 and the bonding pad 6 of the tape 25 with ball terminals are bonded by the gold bump 2 or the like, thereby forming the semiconductor device 30.

FIG. 2 shows an aluminum electrode 9 of the semiconductor chip 1.
FIG. 2 shows an enlarged view of the joint portion of the joint pad 6 of the tape 25 with ball terminals. The same semiconductor chip 1 and tape 25 with ball terminals as those described with reference to FIG. 1 are used. Hereinafter, the joining of the semiconductor chip 1 and the tape 25 with ball terminals will be described. The gold bump 2 is formed in a protruding shape on the aluminum electrode 9 of the semiconductor chip 1. Further, tin plating 13 is applied to the bonding pad 6 of the tape 25 with ball terminals. The semiconductor chip 1 is mounted on the tape 25 with ball terminals by aligning the gold bumps 2 of the semiconductor chip 1 with the bonding pads 6 of the tape 25 with ball terminals on which the tin plating 13 is applied. Next, a joining jig of a joining tool (not shown) is applied to the outer periphery of the semiconductor chip 1 and the tape 25 with ball terminals to fix the semiconductor chip 1 and the tape 25 with ball terminals. Gold bump 2
And the bonding pad 6 with the tin plating 13 of the tape 25 with ball terminals are heated. By this heat treatment, the gold bump 2 and the tin plating 13 are diffusion-bonded to form a gold-tin eutectic alloy, and the semiconductor chip 1 and the tape 25 with ball terminals are formed.
Are physically bonded, and the aluminum electrodes 9 of the semiconductor chip 1 and the bonding pads 6 of the tape 25 with ball terminals are
Electrically connected.

By joining the semiconductor chip 1 and the tape 25 with ball terminals, the semiconductor chip 1 and the ball terminals 5 are connected via the lead-out leads 4 and the ball forming pads 11.
The semiconductor device 30 which is electrically connected and uses the tape 25 with ball terminals is formed.

Here, the insulating wiring protective film 8 for protecting the lead 4 and the ball forming pad 11 is made of a film 3
This is provided to prevent an electrical short circuit due to contamination of the wiring surface (surface), but is not always necessary.

The well-known diffusion bonding of gold and tin is performed at a melting point of 278 ° C. with a composition of 90% by weight of gold, and the temperature of the bonding tool is heated to 300 ° C. or more. However, in this case, there was a problem that the film 3 was thermally damaged and deteriorated. On the other hand, the bonding of the tape 25 with ball terminals and the semiconductor chip 1 of the present invention is performed at a eutectic melting point of 217 ° C. of the first eutectic point of 10% by weight of gold, and the temperature of the bonding tool is , 230 ° C., it is possible to prevent the film 3 from deteriorating due to thermal damage. The composition of the joints joined in this manner is such that gold is 20 to 40% by weight at the joint interface, and gold is 10 to 40% at the fillet portion (not shown) which is pushed outward by the pressure of the joining tool. It is 15% by weight. In general, it is known that if the amount of gold exceeds 40% by weight, a large amount of intermetallic compound of gold and tin is formed and the joint becomes brittle. However, when the temperature of the joining tool is low as in the present invention, Gold bump 2
Even if the thickness of the metal is sufficiently thick, about 20 μm,
The composition does not exceed the weight percentage, so that the tape 25 with ball terminals and the semiconductor chip 1 can be securely connected.

As described above, the bottom surface of the semiconductor chip 1 is covered with the passivation film 7 so as to be passivated so as to be hardly chemically reacted, and the composition of the joint between the semiconductor chip 1 and the tape 25 with ball terminals. However, as described above, an ideal eutectic alloy of gold-tin is obtained, and the tape 25 with ball terminals is surely formed.
And the semiconductor chip 1 can be combined, so that the sealing resin 15 is not required unlike the conventional semiconductor device 30 (FIG. 9). Therefore, as described above, the size of the tape 25 with ball terminals can be made equal to or smaller than the size of the semiconductor chip 1, and the board (such as a motherboard) using the semiconductor device 30 (FIG. 1) can be used. ) The package can be made smaller.

FIG. 3 shows a tape 25 with ball terminals according to the present invention.
Shows a TAB (Tape Automated Bonding) tape used as a material for the above. The film 3 of the tape 25 with ball terminals is 35
mm or 70 mm wide TAB tape 20, or
It is manufactured by a flexible tape having a width of 100 mm or 150 mm. Hereinafter, a case where the 70 mm wide TAB tape 20 is used will be described.

As the TAB tape 20, a polyimide film having a perforation 16 on both sides and a thickness of 40 μm to 70 μm is used. From the TAB tape 20, the wiring tape 17 having the wiring on the front side of the film 3 is provided.
However, four rows can be created. The wiring layer on the surface of the wiring tape 17 is formed of a copper foil having a thickness of 18 μm. This wiring layer is formed by depositing copper foil on a polyimide film without using an adhesive, coating the copper foil with a polyimide varnish and bonding it to the polyimide film, or bonding the copper foil to a polyimide adhesive. Or is formed on the surface of the wiring tape 17.

Further, the ball terminals 5 are formed on the back surface of the wiring tape 17. After the via holes 10 are formed in the wiring tape 17, the ball terminals 5 are inserted into the via holes 10.
A solder ball or the like is inserted and heated and melt-bonded, or a solder powder is formed into a paste and a flux is added to make a high-viscosity printing paste, which is printed in the via hole 10 and heated. And formed by fusion bonding.

The lead 4 and the bonding pad 6 which form the wiring layer of the wiring tape 17 have a thickness of 0.5 μm to 1.0 μm.
Tin plating 13 having a thickness of 5 μm is applied by electroless tin plating, electroplating, or vapor deposition.

FIGS. 4 and 5 show the wiring layer on the front side of the wiring tape 17. FIG. 4 shows a wiring tape 17 in which the aluminum electrodes 9 are joined to the semiconductor chip 1 installed near the periphery of the semiconductor chip 1. The wiring tape 17 has a bonding pad 6 provided near the periphery of the film 3 in correspondence with the aluminum electrode 9 of the semiconductor chip 1, and a ball forming pad 11 provided in a lattice shape inside the bonding pad 6. The formation pad 11 is connected by the lead 4. The lattice pitch of the ball forming pad 11 is 0.5
mm, 0.75 mm, 0.8 mm, 1.0 mm, or 1.27 mm, JEDEC in the United States and E in Japan.
It is standardized by the IAJ standard.

On the back side of the ball forming pad 11,
Ball terminals 5 are formed. The number of the ball terminals 5 is determined by the number of the aluminum electrodes 9 of the semiconductor chip 1, that is, the function of the semiconductor chip 1, and 40 to 90 pins in the normal semiconductor chip 1 and 80 in the logic semiconductor chip 1. Up to 200 pins, 200 pins or more in the high-speed multi-function type semiconductor chip 1 for custom operation.

FIG. 5 shows that the aluminum electrode 9 is connected to the semiconductor chip 1.
Shows a wiring tape 17 to be joined to the semiconductor chip 1 installed near the center of FIG. The wiring tape 17 is provided with a bonding pad 6 near the center of the film 3 corresponding to the aluminum electrode 9 of the semiconductor chip 1, and a ball-forming pad 11 in a grid pattern inside or outside (not shown). And
The bonding pad 6 and the ball forming pad 11 are connected by the lead 4. The ball terminals 5 are formed in the same manner as in FIG.

The wiring tape 17 as described above can be formed of a polyimide film, and in this case, is thin and highly elastic. For this reason, when mounted on a glass epoxy wiring board or the like with the ball terminals 5 connected thereto, thermal stress generated due to a difference in thermal expansion coefficient from the glass epoxy wiring board is absorbed, and a temperature of -50 ° C. to 150 ° C. It can fully withstand the cycle test.

【Example】

Hereinafter, the tape 25 with a ball terminal according to the present invention will be described.
A method for manufacturing the semiconductor device 30 using the method will be described in detail with reference to an embodiment.

Titanium, chromium, and copper having a thickness of 50 angstroms are sequentially deposited and laminated on the aluminum electrodes 9 of the semiconductor chip 1 having 144-pin input terminals to form a thin film. A gold bump 2 having a thickness of 20 μm is formed on the thin film by electroplating. The size of the gold bump 2 is 100 μm × 100 μm, and the size of the semiconductor chip 1 is 8.5 mm × 8.5 mm. The aluminum electrode 9 is provided with 36 (144 /
4) They are arranged one by one.

The wiring tape 17 used in the semiconductor device 30 is formed using a TAB tape 20 having a width of 35 mm. Here, the film 3 of the wiring tape 17 has the same size as the semiconductor chip 1. Therefore, as shown in FIG.
Can be created.

In the wiring tape 17 as shown in FIG. 4, the pitch of the ball forming pads 11 on the wiring tape 17 is 0.65 mm and the diameter is 0.30 mm. The configuration of the ball forming pad 11 is 12 × 12 (= 144)
Matrix structure. Therefore, an interval of at most five lead-out leads 4 is required between the ball forming pads 11 on the outermost periphery. In the case of the present embodiment, the ball is formed between the ball forming pads 11 on the outermost periphery. In consideration of the diameter of the formation pad 11, (0.65-0.3) /
5.5 ≒ 0.064 mm, 5 lead leads 4
Since the minimum value of the distance between the lead wires is 0.05 mm, this condition is sufficiently satisfied, and the lead wiring of the lead lead 4 can be easily performed.

The wiring on the wiring tape 17 has a thickness of 40 μm.
Is formed into a copper layer having a thickness of 3 μm by vapor deposition of copper having a purity of 99.9999%. As described above, it is known that the use of 6N high-purity copper facilitates fine wiring at a pitch of 50 μm in photochemical etching. This is because the high purity of copper reduces the number of structural defects in copper, and when forming wiring by photochemical etching, the surface and side surfaces of the etched pattern are smooth and a pattern having a uniform width is formed over the entire length. Therefore, defects such as disconnection of wiring are hardly generated. In addition, since the pattern is smooth, an abnormality hardly occurs in the surface plating process such as the tin plating 13 and a short circuit of the pattern hardly occurs.

After the above-described wiring is formed, the entire surface of the copper wiring is
Thirteen tin plating layers having a thickness of 0.6 μm were formed by electroless tin plating. As shown in FIG. 4, the copper wiring is formed by forming a lead 4 inside the bonding pad 6 and connecting to the ball forming pads 11 in a 12 × 12 arrangement. The pitch of the bonding pad 6 is 0.22 mm, which is the same as the pitch of the gold bump 2, and the width of the bonding pad 6 is
It is 50 μm, which is の of the width of the gold bump 2.

Next, a via hole 1 having a diameter of 0.25 mm is formed in the wiring tape 17 at a position opposed to the ball forming pad 11 by a carbon dioxide laser with a galvanometer mirror from the back surface.
0 was formed. This carbon dioxide laser with a galvanometer mirror performs energy condensation and beam formation by a collective lens, positions the formed beam by a high-speed electric reflection mirror, and evaporates and removes polyimide at a target position. With this carbon dioxide laser with galvanometer mirror,
Since about 4000 via holes 10 can be opened in one minute, 144 via holes 10 as in this embodiment can be opened in about 2.16 seconds. The formation of the via hole 10 may be performed before tin plating.

In the via hole 10, a solder ball to be the ball terminal 5 is formed by a solder paste printing reflow method. A eutectic solder paste of 63Sn / 37Pb is used for the solder paste, and a 250 μm thick metal mask is used.
The solder paste is printed, and then heated by a general-purpose reflow machine at about 250 ° C. for about 10 seconds to melt the solder paste to form a solder ball. According to this method, the solder balls can be formed on the wiring tape 17 at a lower cost than the conventional method of mounting and melting the solder balls. In this method, 144 solder balls having a height of 0.2 mm can be simultaneously formed.
In the above, solder balls can be formed by printing four places in four rows, eight places in four rows, or twelve places in four rows at the same time.

As described above, a 50 m long TAB
The wiring tape 17 is manufactured on the tape 20. The number of the wiring tapes 17 is {50000 / (8.5 + α)} × 4 = about 2000
Individual.

The TAB tape 20 thus formed
Using a bonding machine equipped with an image recognition alignment mechanism, the position of the bonding pad 6 of the wiring tape 17 and the position of the gold bump 2 of the semiconductor chip 1 are aligned, and the bonding tool heated and held at about 230 ° C. And bonded by heating for about 3 seconds. A heater for heating is provided on the bottom surface of the welding tool, and a thermocouple is embedded near the bottom surface to control the temperature. The joining tool is 40μm
Is abutted from the back surface of the wiring tape 17 having a thickness of
Although the heat of 30 ° C. was transmitted to the joint, the polyimide film was not thermally damaged, and the peeling strength of the joint was 10 g or more per one bonding pad 6.

The composition of the joint thus joined is as follows:
As a result of the investigation of the joining cross section by EPMA, at the joining interface,
It was found that gold was 30 to 40% by weight, and gold was 10 to 15% by weight in the fillet portion extruded outward by the pressure of the joining tool. In the fillet portion, this corresponds to a eutectic melting point of 217 ° C in the binary equilibrium diagram of gold-tin, and the joining reaction starts at this eutectic melting point, which is extruded to the periphery by the pressure of the joining tool, and then At the joint interface, it is determined that gold further diffused and the composition weight% of gold increased.

From the above investigation results, it was found that at the joint interface, the composition of gold was 30 to 40% by weight and the heat resistance temperature was 300 ° C. In the actual tensile test, the joint was broken up to 300 ° C. Did not.

The semiconductor device 30 manufactured as described above
Is mounted on the motherboard using flux, and 230
The substrate is placed in a reflow oven at a temperature of about 10 seconds for about 10 seconds, and is connected to the motherboard by the solder balls formed in the via holes 10.
This was subjected to a thermal stress load test for 1000 cycles using a temperature cycle tester at -55 ° C to 150 ° C. As a result, even after the test, no breakage of the solder ball was observed in the verification by the electrical check.

In the above, one embodiment of the tape 25 with ball terminals according to the present invention has been described. Instead of the gold bumps 2, the aluminum electrodes 9 are plated with electric nickel to a thickness of 20 μm.
An electro-gold plating having a thickness of 1.0 μm may be used thereon. This reduces the thickness of the gold to 1/20
And cost can be further reduced. In this case, 30 to 40% by weight of gold is required at the joint portion. However, for the tin plating 13 having a thickness of 0.3 μm, the thickness of the gold may be 0.5 μm. It turned out from the result.

In the above embodiment, the formation of the via hole 10 may be performed by punching. In this case, apply an adhesive having a thickness of 10 μm on the polyimide film, and after drying the solvent,
A via hole 10 is formed by punching. Then 1
A copper foil having a thickness of 8 μm is attached by a roll laminator so as to cover the via hole 10. As a result, it is not necessary to use an expensive carbon dioxide laser with a galvanometer mirror, and the cost of equipment and the like is not required.

In the above embodiment, the position of the gold bump 2 of the semiconductor chip 1 may be arranged at the position of the bonding pad 6 of the wiring tape 17 as shown in FIG. Further, instead of the polyimide film, a polyester resin tape, a Teflon resin tape, or an acrylic resin-containing low-elasticity epoxy resin film may be used. Furthermore, the thickness of the polyimide film depends on the dynamic viscoelastic coefficient of the polyimide film (about 3.
0 gigapascal), and the thickness can be reduced to about 25 μm in consideration of the difference in thermal expansion coefficient between the semiconductor chip 1 and the motherboard. Further, from the viewpoint of the bonding strength of the bonding portion, the thickness of the polyimide film can be increased to about 75 μm.

Further, the thickness of the copper foil used for the wiring was set to about 2
It can be as thick as 5 μm. As a result, the ability to absorb stress such as thermal stress is reduced, but the workability is low and the cost can be reduced. Further, instead of this copper foil, an alloy copper foil having a composition of zirconium 2.0% by weight-copper may be used. According to this alloy copper foil, it is about 30% more than pure copper foil.
The strength will increase. In addition, 9
0Pb / 10Sn solder may be used.

FIG. 6 shows a tape 25 with ball terminals according to the present invention.
Another embodiment of the semiconductor device 30 using the semiconductor device will be described. This uses a gold plating 12 having a thickness of 1.0 μm instead of the gold bump 2 shown in FIG. By doing so, the space between the semiconductor chip 1 and the tape 25 with ball terminals is
Although it became very narrow, there was no influence of the thermal stress absorption of the tape 25 with ball terminals in the thermal stress load test.

In the semiconductor device 30 shown in FIG. 6, tin plating 13 may be applied to the aluminum electrode 9 side of the semiconductor chip 1 and gold plating 12 may be applied to the bonding pad 6 of the tape 25 with ball terminals.

FIG. 7 shows a semiconductor device 30 in which the tape 25 with ball terminals is a double-sided wiring tape. The tape 25 with ball terminals may be a double-sided wiring tape. In this case, as shown in FIG. 18 and the ball terminal 5 can be formed thereon.

FIG. 8 shows another embodiment of FIG. In the tape 25 with ball terminals of the present invention shown in FIG. 8, a lead-out lead 19 is connected to the via plating 18 shown in FIG. 7 on the back surface of the tape 25 with ball terminals. ) Are connected to form ball terminals 5 on the ball forming pads.

[0050]

As described above, according to the tape with ball terminals and the semiconductor device using the same according to the present invention, the sealing between the semiconductor chip to be mounted and the tape with ball terminals by the sealing resin is eliminated. In addition, miniaturization and cost reduction are achieved, and the connection between the semiconductor chip and the wiring pattern is made of gold.
Since the gold-tin eutectic alloy in which tin is 0 to 40% by weight and tin is the remaining weight% is used , bonding strength can be increased and reliability can be improved.

[Brief description of the drawings]

FIG. 1 is a schematic view showing an embodiment of a semiconductor device using a tape with ball terminals according to the present invention.

FIG. 2 is a schematic view showing a joint between a tape with ball terminals and a semiconductor chip according to the present invention.

FIG. 3 is a schematic view showing a TAB tape on which a tape with ball terminals according to the present invention is produced.

FIG. 4 is a schematic view showing wiring of a tape with ball terminals according to the present invention.

FIG. 5 is a schematic view showing the wiring of the tape with ball terminals according to the present invention.

FIG. 6 is a schematic view showing a joint between a tape with ball terminals and a semiconductor chip according to the present invention.

FIG. 7 is a schematic view showing a joint between a tape with ball terminals and a semiconductor chip according to the present invention.

FIG. 8 is a schematic view showing a joint portion between a tape with ball terminals and a semiconductor chip according to the present invention.

FIG. 9 is a schematic view showing a conventional joint between a substrate with ball terminals and a semiconductor chip.

[Explanation of symbols]

 Reference Signs List 1 semiconductor chip 2 gold bump 3 film 4, 19 lead-out 5 ball terminal 6 bonding pad 7 passivation film 8 wiring protection film 9 aluminum electrode 10 via hole 11 ball forming pad 12 gold plating 13 tin plating 14 wiring board 15 sealing resin 16 Feed hole 17 Wiring tape 18 Via plating 19 Leader lead 20 TAB tape 25 Tape with ball terminal 30 Semiconductor device 31 Wiring board with ball terminal

Continuation of the front page (56) References JP-A-9-199535 (JP, A) JP-A-4-154136 (JP, A) JP-A-6-268013 (JP, A) JP-A-5-47955 (JP) JP-A-6-140473 (JP, A) JP-A-5-82586 (JP, A) JP-A-7-321157 (JP, A) JP-A-8-306739 (JP, A) 9-246318 (JP, A) JP 10-22329 (JP, A) JP 10-1773088 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/60 H01L 23/12

Claims (9)

(57) [Claims] 1. A tape with a ball terminal having a wiring pattern for connecting a semiconductor chip, an insulating film having a size equal to or smaller than a semiconductor chip to be mounted, and a first surface of the insulating film. A bonding pad for bonding a semiconductor chip formed on the first surface of the insulating film, a ball forming pad for bonding a ball terminal connected to the bonding pad by a lead, and the insulating film And a ball terminal formed on the second surface and connected to the ball forming pad via a via hole. The bonding pad has a surface plated with tin, and the semiconductor chip and the gold bump are connected to each other. 10 to 40 layers of gold at the joint interface when connected via
A tape with a ball terminal , wherein a gold-tin eutectic alloy is formed in which tin is in the amount% and the remaining weight is the total weight% . 2. The method according to claim 1, wherein the insulating film has a thickness of 25 μm to 75 μm.
2. The tape with ball terminals according to claim 1, wherein the thickness of the tape. 3. The tape with ball terminals according to claim 1, wherein said ball terminals are eutectic solder of 63Sn / 37Pb. 4. The tape with ball terminals according to claim 1, wherein said gold bumps are projections having a thickness of 10 μm to 20 μm. 5. A wiring pattern for connecting a semiconductor chip.
Half mounted on a tape with ball terminals
A chip with a size equal to or smaller than the conductor chip
An edge film and a first surface of the insulating film
Bonding pad for bonding a semiconductor chip, and the insulating property
A bonding pad formed on the first surface of the film;
Ball shape for joining ball terminals connected by leads
Formed on the second surface of the insulating film.
Connected to the ball forming pad via holes.
It consists of a ball terminal, and the bonding pad has tin on the surface.
Plating is applied, and the semiconductor chip and gold plating are
Eutectic alloy at the joint interface when connected via
A tape with ball terminals, characterized by being formed . 6. The insulating film has a thickness of 25 μm to 75 μm.
6. The tape with a ball terminal according to claim 5, which has a thickness of: 7. The ball terminal is 63Sn / 37Pb.
6. The tape with ball terminals according to claim 5 , wherein the tape is eutectic solder . 8. The gold plating may have a thickness of 0.5 μm to 1.5 μm.
6. The tape with a ball terminal according to claim 5, which has a thickness of: 9. A tape with a ball terminal having a predetermined wiring pattern, and a semiconductor chip connected to the predetermined wiring pattern on the tape with a ball terminal, wherein the tape with a ball terminal is mounted on a semiconductor chip. An insulating film having a size equal to or less than the chip,
A bonding pad having a surface plated with tin for bonding a semiconductor chip formed on a first surface of the insulating film;
A ball-forming pad formed on the first surface of the insulating film and connected to the bonding pad by a lead; and a ball-forming pad formed on a second surface of the insulating film. And a ball terminal connected through a via hole, and the semiconductor chip is tin-plated through a gold bump or gold plating.
An electrode in which a gold-tin eutectic alloy having 10 to 40% by weight of gold and the remaining weight of tin being the entirety by weight is formed on a bonding interface by being bonded to the bonding pad, and only the electrode is exposed. A semiconductor device having a passivation film that covers a bonding surface while performing the bonding.