JP3338344B2 - Manufacturing method of nonvolatile semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile semiconductor memory device and a method of manufacturing the same, and more particularly, to an improvement in the number of times of rewriting information in a split gate flash memory.

[0002]

2. Description of the Related Art A method of manufacturing a split gate flash memory (for example, Japanese Patent Application No. 9-42478) which is a nonvolatile semiconductor memory device according to a conventional example will be described below with reference to the drawings. This split gate type flash memory is a flash memory in which a control gate 100 is formed from an upper portion to a side portion of a floating gate 102 via an insulating film 101 as shown in FIG. This will be described below with reference to FIGS.

First, a first gate insulating film 104 made of a SiO 2 film is formed on a semiconductor substrate 103, and a polysilicon film 105 is further laminated. Thereafter, P ions are implanted into the entire surface to form the floating gate 102 to be formed in FIG. (See FIG. 18 above.) Subsequently, a silicon nitride film 106, which is an oxidation-resistant film, is formed so that the polysilicon film 105 serving as a formation region of the floating gate 102 is exposed. An oxide film 107 is formed. (Refer to FIG. 19 above.) Subsequently, after etching the silicon nitride film, the polysilicon film 105 is etched and removed using the mini-LOCOS oxide film 107 as a mask, and the floating gate 1 is removed.
02 is formed.

Subsequently, the insulating film 104 is isotropically etched with a hydrofluoric acid-based etchant so that the insulating film 104 remains only under the floating gate (or is etched and removed so as to slightly remain around the floating gate 102). Thereafter, a second gate insulating film 101 made of silicon oxide (thermal oxide film or CVD film) is formed on the entire surface. (Refer to FIG. 20 above.) Thereafter, a polysilicon film is formed on the second gate insulating film 101 and is patterned so as to extend from the upper part to the side part of the floating gate 102 to form the control gate 100. Using the floating gate 102 and the control gate 100 thus formed as a mask, impurities are implanted into the semiconductor substrate 103 to form a source region and a drain region (omitted in the drawing). As a result, a split gate flash memory is formed.

In the above-described split gate type flash memory, a program is written by turning on a transistor of a memory cell to be written (hereinafter, referred to as a selected cell) and injecting electrons into the floating gate 102. I was FIG.
As shown in the area surrounded by the dotted line 1, the floating gate 1
02, the polysilicon film 105 on the upper surface is oxidized to form a mini-LOCOS oxide film 107 on the polysilicon film 105,
A projection 108 is formed at the tip of the bird's beak, and electrons are removed from the floating gate 102 to the control gate 100 from the floating gate 102 by utilizing the electric field concentration at the projection 108 to erase the data.

FIG. 5 is a plan view of the above-mentioned split gate type flash memory, and FIG.
It is sectional drawing corresponding to a line. A vertically long rectangle indicated by a dashed line (hatched with dots) is a LOCOS oxide film, and a rectangle indicated by a two-dot chain line and a dotted line is a floating gate and mini-LOCOS oxide film 10.
2, 107, and the line shown by a solid line extending left and right is the control gate 100.

[0007]

SUMMARY OF THE INVENTION The aforementioned protrusion 108
Are formed mainly due to the bird's beak shape of the mini-LOCOS oxide film. That is, since the bottom surface of the bird's beak has a slope that becomes higher toward the periphery, a sharp protrusion 108 is formed over the entire periphery of the floating gate.

However, the mini-LOCOS oxide film 10
With the inclination of No. 7, the shape of the projection was insufficient.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problem. First, the end of the floating gate is connected to the first LOC.
The problem is solved by being located at the inclined portion of the OS oxide film and the second LOCOS oxide film. Second, the problem is solved by locating the ends of the mini-first LOCOS oxide film on the inclined portions of the first LOCOS oxide film and the second LOCOS oxide film.

As shown in FIG. 6, for example, a floating gate formed on an inclined portion formed by a LOCOS insulating film has an inclination. That is, in the related art, since the end T of the floating gate is formed at the horizontal portion connected by the points Y and Z, the corner C formed by the line YZ and the line T is formed.
Is approximately 90 degrees, but the present invention is applied to the inclined portion XY at the end S.
Because There is formed, the corner part B acute and Do Ri, more projections become sharp.

Third, an oxidation-resistant film exposing a silicon film located between the first LOCOS oxide film and the second LOCOS oxide film is formed, and the silicon film is formed via the oxidation-resistant film. The problem is solved by a step of oxidizing to form a mini LOCOS oxide film and a step of etching the silicon film using the mini LOCOS as a mask to form a floating gate.

That is, as shown in FIG. 1, a mini-LOCOS oxide film grows from the end of the oxidation-resistant film.
If an oxidation resistant film exposing the silicon film is formed so as to be located between the S oxide film and the second LOCOS oxide film,
The edge of the mini-LOCOS oxide film is formed on the slope of the LOCOS oxide film, and the edge of the floating gate becomes sharper.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a method for manufacturing a nonvolatile semiconductor memory device according to the present invention will be described below. First, as shown in FIG. 1 (a cross-sectional view taken along the line AA in FIG. 5) and on the semiconductor substrate 1 as shown in FIG. The LOCOS oxide film 2 is formed, and a first gate insulating film 3 having a thickness of about 100 ° is formed by thermal oxidation in the meantime. For convenience of description, the second LOCOS oxide film 2 from the right is replaced with the first LOCOS oxide film 2A,
The rightmost LOCOS oxide film 2 is called a second LOCOS oxide film 2B. A silicon film 4 having a thickness of about 1500 ° is formed by, for example, a CVD method. This silicon film
Although a single crystal silicon film can be applied, the following description will be made with a polysilicon film. Further, an oxidation resistant film (silicon nitride film) 5 having a thickness of about 500 ° is formed on the polysilicon film 4. An opening 6 is formed in the silicon nitride film 5 through a not-shown photoresist by a well-known patterning technique, and the polysilicon film 4 where the mini-LOCOS oxide film 7 is to be formed (or a floating gate formation region) is exposed. ing.

Subsequently, there is a step of introducing impurities. Here, P ions are implanted at a dose of about 2.5E14 / cm2 and an acceleration of 25 KeV. Here, ion implantation is performed to make the polysilicon film 4 a floating gate.
The impurity may be introduced into the entire surface before forming the silicon nitride film. Next, as shown in FIG. 2, using the silicon nitride film 5 as a mask, the polysilicon film 4 exposed in the opening 6 is selectively oxidized to form a mini-LOCOS oxide film 7.

The maximum thickness of the LOCOS insulating film 7 is about 1500 ° at the center, and
Becomes thinner toward the outer periphery. The outer peripheral portion thereof, in order to penetrate to the lower surface of the silicon nitride film 5 in the bird's bi chromatography click shaped while lifting the silicon nitride film 5, particularly thin (e.g., less about 100 Å) is formed, the thin region, the silicon nitride It is formed to a depth of about 0.05 μm (500 °) from the periphery of the opening of the film. The width of the mini-LOCOS insulating film 7 is approximately 0.8 μm (800 μm if the opening is approximately 0.7 μm).
0 °).

A feature of the present invention is that the opening 6 exposing the polysilicon film 4 is formed between the first LOCOS oxide film 2A and the second LOCOS oxide film 2B. By doing so, the tips 7A and 7B of the bird's beak of the mini-LOCOS oxide film 7 are in contact with the first LOCOS oxide film 2
A, The second LOCOS oxide film 2B is located at the inclined portion of the bird's beak. Therefore, the protrusion can be further sharpened by etching the floating gate described later.

Referring to FIG. 6, since the slope of the bird's beak of the second LOCOS oxide film 2B is traced as it is, it is etched at a predetermined position of the slope (XY) of the silicon film 4, for example, the line segment S. The corner B formed by the line segment XY and the line segment S is an acute angle. Subsequently, there is a step of removing the silicon nitride film 5.

First, in order to remove a natural oxide film on the surface of the silicon nitride film 5, a hydrofluoric acid (for example, HF: H 2 O = 1: 2) is used.
Using 5), etch off approximately 160 ° in terms of a thermal oxide film. Subsequently, the silicon nitride film 5 is removed with phosphoric acid, and as a post-treatment, hydrofluoric acid (HF: H2 O = 1: 25)
Is used to etch off about 50 ° in terms of a thermal oxide film. Further, a mixed solution of NH4OH / H2O2 / H2O (composition ratio 1:
2: 5). This cleaning removes organic substances and heavy metals, and reduces the adhesion of water on the surface in consideration of hydrofluoric acid treatment in a later step.

Subsequently, the exposed mini-LOCOS insulating film 7
Is converted to Buffered hydrofluoric acid (eg, HF: H20:
(NH4F = 1: 40: 20), and the upper surface of the mini LOCOS insulating film 7 is approximately 100-300.degree.
I 'm shaving it . In the present embodiment, by cutting the upper surface of the mini-LOCOS insulating film 7 by about 100 ° to 300 °, a part of the bead bark on the outer periphery of the mini-LOCOS insulating film 7 is cut, and the shape of the mini-LOCOS insulating film 7 is The outer peripheral portion is made relatively smooth by being jagged, and is formed into an almost elliptical shape.

Since the jagged projections have a large contact area with the etchant due to the isotropic etching by the hydrofluoric acid treatment, the projections are sharpened quickly, and as a result, the jagged portions on the outer peripheral portion are suppressed. Subsequently, there is a step of forming a floating gate 8 by etching the polysilicon film 4 using the mini-LOCOS oxide film 7 etched as shown in FIG. 3 as a mask. 80sc flow rate with ECR etcher
cm2 Cl2 gas, O2 gas flow rate 5sccm, pressure 5
mTorr, RF power 50W, magnetron 250m
The polysilicon film 4 is etched under the condition A.

The shape of the side wall of the floating gate 8 formed in this manner is such that the outer periphery of the mini-LOCOS insulating film 7 is smoothly shaped and further etched using the mini-LOCOS insulating film 7 as a mask. Are suppressed and formed smoothly. Moreover, as described above, the tip of the mini-LOCOS insulating film is connected to the first LOCOS
Insulating film 2A, than was positioned on the inclined portion of the second LOCOS insulating film 2B, corner B shown in FIG. 6, becomes an acute angle, and since having a further inclination bottom surface of the bead Burke mini LOCOS insulating film , The corners B become sharper.

Next, hydrofluoric acid (for example, HF: H 2 O =
1:25) and the first other than immediately below the floating gate 7
After half-etching the gate insulating film 3 of FIG.
A silicon oxide film of about 150 ° is formed by VD.
That is, the second gate insulating film 10 is formed between the LOCOS oxide film 7 and the control gate 9 as shown in FIG.

Finally, a 1500 ° polysilicon film, 1
A 500 ° WSix film is sequentially formed, and extends from the upper portion to the side portion of the floating gate 8 via the second gate insulating film 10 (extending in the vertical direction with respect to the plane of FIG. 5). As described above, the control gate 9 is formed, impurities are implanted into the semiconductor substrate 1 using the floating gate 8 and the control gate 9 as a mask to form the source region S and the drain region D, and the split gate type flash memory is formed.

[0024]

Next, a second embodiment will be described. As shown in FIG. 17, the present embodiment is a method for manufacturing a nonvolatile semiconductor memory device in which an N-channel TR and a P-channel TR are formed together on the right side. The explanation will be made with reference to the cross-sectional views. First, an N well 51 for a P-channel TR is formed on a P-type semiconductor substrate 50, and then a poly-Si 53 of about 700 ° is formed on an insulating film 52.
A silicon nitride film 54 of about 1500 ° is sequentially stacked,
The silicon nitride film 54 is etched through a photoresist PR having an opening corresponding to the OCOS oxide film 55. That is, the LOCOS oxide film indicated by reference numeral 55 and the LOCOS oxide film 2 in FIG. 1 are formed. (Refer to FIG. 7, FIG. 1, and FIG. 5 above.) Subsequently, after removing the photoresist PR, the LOCOS oxide films 55, 2
A and 2B are formed, and a silicon nitride film 54 and poly-Si 53 are formed.
Is removed by etching. (Refer to FIG. 8 above.) Subsequently, a poly-Si 56 (reference numeral 4 in the previous embodiment) of about 1500 °, a silicon nitride film 57 (reference numeral 5 in the previous embodiment) of about 500 ° and a photoresist PR are laminated on the entire surface. And mini L to be formed on the floating gate
In order to form the OCOS oxide film 58 (reference numeral 7 in the previous embodiment), the photoresist PR is patterned so that the corresponding portion of the poly-Si 56 is exposed, and the silicon nitride film 57 is opened through the photoresist PR. . Thereafter, P is ion-implanted through the opening. The conditions are a dose of about 2.5E14 / cm2 and an acceleration of 25 KeV. Here, this impurity may be introduced before the formation of the silicon nitride film 57.

In the drawing, the impurity partially implanted into this region is indicated by a chain line. Then, using the silicon nitride film 57 as a mask, the polysilicon film 56 exposed in the opening is selectively oxidized to form a mini LOCOS oxide film 58 (reference numeral 7 in the previous embodiment). Form.

Here, as in the previous embodiment, the mini LOCO
The tip of the S oxide film 58 (7) has a first LOCOS oxide film and a second LO oxide film formed together with the LOCOS oxide film 55.
The COS oxide films 2A and 2B are located at the inclined portions and are sharpened as shown at the corner B in FIG. Subsequently, the silicon nitride film 57 is removed to expose the poly Si 56 on which the mini LOCOS oxide film 58 is formed. (Refer to FIG. 10 above.) The step of removing the silicon nitride film 57 here is the same as that of the previous embodiment, so that the description is omitted.

Subsequently, the exposed mini-LOCOS oxide film 58
With buffered hydrofluoric acid (HF: H2O: NH4F =
1:40:20) and this mini LOCOS
The upper surface of oxide film 58 is shaved by about 100 ° to 300 °. In other words, the outer periphery of the mini-LOCOS oxide film 58 is cut by cutting by about 100 ° to 300 °, and the second LOC
The shape of the OS oxide film 58 is made relatively smooth by removing the jaggedness of the outer peripheral portion, and is shaped substantially into an ellipse.

Subsequently, the etched mini LOC
Using the OS oxide film 58 as a mask, there is a step of etching the polysilicon film 56 to form a floating gate 59 (reference numeral 8 in the previous embodiment). When the ECR etcher is employed, the polysilicon film 56 is etched under the conditions of Cl2 gas at a flow rate of 80 sccm, O2 gas at a flow rate of 5 sccm, pressure of 5 mTorr, PF power of 50 W, and magnetron of 250 mA, exposing the LOCOS oxide film 55.

The shape of the side wall of the floating gate 59 formed in this manner is the same as that of the mini-LOCOS oxide film 5.
8 is smooth and etched using the LOCOS oxide film 58 as a mask, so that the formation of streaks can be suppressed and the LOCOS oxide film 58 can be formed smoothly. As described above, FIG.
Is formed. Then, hydrofluoric acid (for example, H
F: H2 O = 1: 25), and the first gate insulating film other than immediately below the floating gate 59 is half-etched.
(Refer to FIG. 11 above.) Then, a silicon oxide film formed by CVD is
Å formed. This is formed between the LOCOS oxide film 58 and the control gate 61 to be formed by reference numeral 60 (reference numeral 10 in the previous embodiment) shown in FIG. (See FIG. 12 above.) Then, BF2 is applied to the active regions of the N-channel TR and the P-channel TR for adjusting the threshold voltage by 1.6E.
After implanting at a dose of about 12 / cm 2 at an acceleration of 90 KeV, the insulating film in this active region is etched through a photoresist (not shown), and then a gate insulating film is formed again in this active region.

By this oxidation, an insulating film X indicated by a dotted line in FIG. 4 is formed. That is, in order to form or adjust the thickness of the gate insulating film of the N-channel TR and the P-channel TR,
Floating gate 59 of nonvolatile semiconductor memory device
Are the second gate insulating film 60 and the floating gate 5
9 is oxidized from the boundary to the inside of the floating gate.

Subsequently, a poly-Si film of about 1000.degree.
Is deposited by an LPCVD method, P is doped with a diffusion source POC13, and an insulating film 62 made of a 1000 ° WSix film and a silicon insulating film is deposited. Further, the insulating film 62 and the WSix film are patterned using a photoresist (not shown) as a mask.
And training, with an insulating film 62 and control gate 61 so as to extend toward the side from the top of the floating gate 60 through the gate insulating film 60, N-channel TR of the gate insulating film 63, the gate 64 , A gate insulating film 65 and a gate 66 of the P channel TR. (See FIG. 13 above.) Subsequently, after removing the photoresist used in the previous step, the photoresist PR is patterned so that the source region 67 (S) of the nonvolatile semiconductor memory device is exposed, and P is set to 5 × E15 /
Ion implantation is performed at a dose of about cm ^{2 and} an acceleration of 60 KeV. (See FIG. 14 above.) Subsequently, after removing the photoresist PR used in FIG.
An OS film is deposited, and the control gate, N-channel TR and P-channel T are formed by isotropic dry etching.
A spacer is formed on the gate of R. Thereafter, P is applied to the drain region 68 of the planned non-volatile semiconductor memory device and the planned source / drain 69 and 70 of the N-channel TR by using a photoresist (not shown) at a dose of about 8 × E13 / cm ² .
Ion implantation is performed at an acceleration of 40 KeV.

Therefore, using the floating gate 59 and the control gate 61 as a mask, impurities are implanted into the semiconductor substrate to form a split gate type flash memory having a source region and a drain region, and an N type is next to the flash memory.
Source / drain is formed using the gate of the channel TR as a mask. (Refer to FIG. 15 above.) Further, poly Si is formed on the entire surface at about 1000 °, and electrodes 71, 72, 73 and 74 are formed as shown in the figure.
(Refer to FIG. 16 above.) Finally, as shown in FIG.
(4) After deposition and flow, a contact is opened in the BPSG film to form electrodes 75 and 76.

[0034]

As is apparent from the above configuration, first, first, the end of the floating gate is connected to the first LOCO.
Since the protrusions of the floating gate become sharper and the tunnel current easily flows from the floating gate to the control gate by being located at the inclined portions of the S oxide film and the second LOCOS oxide film, the number of rewrites can be improved. .

Second, the edge of the mini-LOCOS oxide film is
First LOCOS oxide film and second LOCOS oxide film
Of that is positioned in the inclined portion, the protruding portion of the floating gate becomes more acute as before, by easily tunnel current flows from the floating gate to the control gate, the improvement of the number of times of rewriting can be realized. Third, an oxidation-resistant film exposing a silicon oxide film located between the first LOCOS oxide film and the second LOCOS oxide film is formed, and the silicon oxide film is oxidized through the oxidation-resistant film. A step of forming a mini-LOCOS oxide film by etching and a step of etching the silicon oxide film using the LOCOS oxide film as a mask to form a floating gate, thereby sharpening the upper end (projection) of the floating gate. Was completed.

That is, since the mini-LOCOS oxide film grows from the end of the oxidation-resistant film as shown in FIG.
By forming an oxidation resistant film exposing the silicon film between the S oxide film and the second LOCOS oxide film, the mini LOCOS film can be formed.
The end of the oxide film is formed on the slope of the LOCOS oxide film,
The end of the floating gate becomes sharper.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a nonvolatile semiconductor memory device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the first embodiment of the present invention.

FIG. 3 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the first embodiment of the present invention.

FIG. 4 is a sectional view illustrating the method for manufacturing the nonvolatile semiconductor memory device according to the first embodiment of the present invention.

FIG. 5 is a plan view of a nonvolatile semiconductor memory device.

FIG. 6 is a diagram illustrating sharpening of a floating gate.

FIG. 7 is a sectional view illustrating the method for manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating the method for manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 9 is a sectional view illustrating a method for manufacturing a nonvolatile semiconductor memory device according to a second embodiment of the present invention.

FIG. 10 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating the method for manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 12 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 13 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 14 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 15 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 16 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 17 is a sectional view illustrating the method of manufacturing the nonvolatile semiconductor memory device according to the second embodiment of the present invention.

FIG. 18 is a sectional view illustrating a method for manufacturing a conventional nonvolatile semiconductor memory device.

FIG. 19 is a sectional view illustrating a method for manufacturing a conventional nonvolatile semiconductor memory device.

FIG. 20 is a cross-sectional view illustrating a method for manufacturing a conventional nonvolatile semiconductor memory device.

FIG. 21 is a sectional view illustrating a method for manufacturing a conventional nonvolatile semiconductor memory device.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-219278 (JP, A) JP-A-9-45799 (JP, A) JP-A 8-204160 (JP, A) JP-A 9-204 116121 (JP, A) JP-A-7-122656 (JP, A) JP-A-7-288314 (JP, A) JP-A 8-97306 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/8247 H01L 27/115 H01L 29/788 H01L 29/792

Claims (1)

(57) [Claims] 1. A floating gate and control
Having a gate to transfer the electrons accumulated in the floating state.
Split gate type that pulls out to the control gate
In the method of manufacturing a nonvolatile semiconductor device according to the above, the semiconductor substrate of one conductivity type is vertically elongated and has a predetermined interval.
LOCOS oxide film and second LO
A COS oxide film; the first LOCOS oxide film;
2 located between the LOCOS oxide films and on the semiconductor substrate.
Forming a gate insulating film formed on the gate insulating film, the first LOCOS oxide film,
And forming a silicon film on the second LOCOS oxide film.
That step and the second LOCOS acid and the first LOCOS oxide film
Having an opening on the silicon film located between the
Forming an oxidation-resistant film, and oxidizing the silicon film via the oxidation-resistant film;
Of the first LOCOS oxide film and the second LOCOS oxide film
Mini LOCOS oxidation so that the tip is located on the slope
Forming a film, and forming the silicon using the mini-LOCOS oxide film as a mask.
Process to form floating gate by etching film
The mini-LOCOS oxide film and the floating gate
Forming an insulating film so as to cover the gate, and a part of the floating gate through the insulating film.
Form a control gate that overlaps and extends downward
And an end of the control gate and the floating gate.
The semiconductor so that it overlaps the end of the gate
Forming a diffusion region on the substrate.
Of manufacturing a non-volatile semiconductor storage device.