JP3326756B2 - Apparatus for detecting abnormal parts of electronic equipment board and probe used for the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is effectively used to identify a failure point of an electronic network mounted on a board of an electronic apparatus, and detects an abnormality at each node (test point) of the electronic network. The present invention relates to a location detecting device and a probe used for the device.

[0002]

2. Description of the Related Art A "signature analysis method" is known as a failure diagnosis technique for an electronic network. This is because a pseudo random pattern is generated using a linear feedback shift register as a test pattern generating means, and the shift operation is repeated while sequentially inputting test results to the input of the shift register, and the final value of each shift stage of the shift register becomes It is determined to be a specific value (signature) corresponding to the input pattern sequence (test result). Therefore, the value of a non-defective product is stored, and the pass / fail of the circuit network is determined by collation.

[0003]

In the above-mentioned prior art, it is necessary to incorporate a part or all of a test circuit for specifying a fault location in the equipment itself. Also, for an electronic network that does not have this built-in, there is no means for easily detecting an abnormal point for specifying a defective point, and a relatively expensive means that requires specialized knowledge is used. There was only.

Further, the above-mentioned "signature analysis method" is mainly intended for a logic circuit including a microprocessor circuit, and cannot be used for an analog circuit. Therefore, there is a problem that it is necessary to use in combination with another technique in order to identify a failure point in a general network including an analog circuit. An object of the present invention is to make it possible to specify a faulty part of an analog circuit as well as a logic circuit, and furthermore, it is possible to configure an abnormal place detecting device of an electronic equipment board which can be configured at very low cost, and to use the same. It is to provide a probe.

[0005]

According to the present invention, an average voltage of a signal at a test point of an electronic circuit mounted on a board is detected by a probe, and the test point at which the probe detects the voltage is used. Is input by the input means. Reference data is stored in the memory for each test point identification information, and the detected voltage from the probe is compared with reference data obtained by referring to the memory based on the input identification information, and the determination result is obtained. Will be notified. The input means, the memory, the comparison means, and the notification means are held in the main body. According to the invention of claim 2, the probe can detect the peak voltage of the signal at the test point.

According to the third aspect of the present invention, the probe is electrically contacted with each test point of the electronic circuit network mounted on the board, and the average voltage of the signal of the test point input from the probe is detected. Further, identification information for identifying a test point with which the probe is in contact is input, reference data is stored in a memory for each identification information of each test point, and in a state where the probe is in contact with the test point, the detected average voltage is detected. Is compared with reference data obtained by referring to the memory based on the input identification information, and the determination result is reported. The average detection means, the input means, the memory, the comparison means, and the notification means are held in the main body.

According to a fourth aspect of the present invention, in the third aspect of the present invention, the peak voltage detecting means of the signal of the test point input from the probe is provided in the main body, and the comparison between the peak voltage and the reference data is performed. . According to a fifth aspect of the present invention, in the second or fourth aspect, the peak detecting means detects a positive peak voltage and a negative peak voltage after passing through the capacitor,
The mark ratio is calculated from the detected peak voltage and the detected average voltage, and the mark ratio is compared with reference data of the mark ratio of the corresponding test point stored in the memory in advance.

According to a sixth aspect of the present invention, in the first or second aspect, each input signal from a test point is converted into a pulse having a predetermined width and a predetermined amplitude in the probe, and the average voltage of the converted pulse is obtained. Is detected. According to the invention of claim 7, in the invention of claim 3 or 4, each signal inputted from the probe to the main body is converted into a pulse having a predetermined width and a predetermined amplitude, and further, the average voltage of the converted pulse is detected. You.

According to an eighth aspect of the present invention, in any one of the first to seventh aspects, a unique number (ID number) is stored in a memory as identification information of a test point, and a board test is performed as the input means. A means is attached to the probe to optically read a unique number attached to or near the point itself. According to the ninth aspect of the present invention, in any one of the first to seventh aspects, the position coordinates are stored in a memory as test point identification information, and when the probe is positioned on the board, the position coordinates are used as input means. Is detected by the position digitizer and supplied to the main body.

According to a tenth aspect of the present invention, in any one of the first to seventh aspects, the memory also stores the position coordinates of each test point on the board, and the probe is moved on the board to perform each test. The moving contact is automatically performed by sequentially reading the position coordinates of the test point. According to an eleventh aspect of the present invention, in any one of the first to seventh aspects of the present invention, the plurality of probes are held in the same arrangement as the positions where the test points of the board can be located. The signal or voltage from the probe is taken in a predetermined order while being in contact with the test point.

According to a twelfth aspect of the invention, in any one of the first to seventh aspects, a mode such as a reference data setting mode or a test data acquisition mode is specified, and the reference data setting mode is specified. , Test point identification information and reference data are input, and the reference data is stored in the memory for each identification information.

[0012]

FIG. 1 shows an embodiment of the present invention. The probe 12 is connected to the main body 11 of the abnormality detecting device of the present invention. The probe 12 has a needle-like contact 14 protruding from the tip of a pen-like body 13, and the contact 14 can be brought into electrical contact with a test point of an electronic network mounted on a board (not shown). In this embodiment, an average detection circuit 15 and a peak detection circuit 16 are housed in a body 13 in this embodiment, and the average detection circuit 15 can detect an average voltage of a signal at a test point with which a contact 14 is in contact. The peak voltage of the signal at the test point can be detected by the peak detection circuit 16. In this embodiment, a ground contact portion 17 protrudes from the body 13 in parallel with the contact 14.

As shown in FIG. 2A, for example, the average detection circuit 15 includes a resistor 1 connected to a terminal 18 connected to the contact 14.
9 is connected, and the other end of the resistor 19 is connected to the capacitor 2.
1 is grounded. The resistor 19 and the capacitor 21 constitute the average detection circuit 15. In this example, the output side of the average detection circuit 15, that is, the connection point between the resistor 19 and the capacitor 15 is connected to a buffer 22 having a high input impedance. In FIG. 1, the average detection circuit 15 includes the buffer 22.

In the peak detection circuit 16, for example, as shown in FIG. 2B, an AC coupling circuit 23 is connected to a terminal 18 connected to the contact 14. That is, one end of a DC blocking capacitor 24 is connected to the terminal 18, the other end of the capacitor 24 is grounded through a resistor 25, and
6 and the other end of the diode 26 is grounded through a smoothing capacitor 27. Also, if necessary,
A switch 30 for discharging the capacitor 27 shown by a dotted line in FIG. 2B may be used. A buffer (not shown) may be inserted between the terminal 18 and the AC coupling circuit 23 for the purpose of increasing the input impedance. The capacitors 24 and 27, the resistor 25, and the diode 26 constitute the peak detection circuit 16. In this example, the output side of the peak detection circuit 16, that is, the connection point of the diode 26 and the capacitor 27 is connected to a buffer 28 having a high input impedance, and the configuration including the buffer 28 is the peak detection circuit 16 in FIG.

In FIG. 1, the output side of the average detection circuit 15
The output side of the peak detection circuit 16 is connected to the lead 2
It is connected to the main body 11 through 8, 29. The positive side of the DC power supply 31 in the main body 11 is connected to the probe 1 through the lead wire 32.
2 is connected to the power supply terminals of the buffers 22 and 28 of the average detection circuit 15 and the peak detection circuit 16, and the ground side of the power supply 31 is connected to the ground side of the average detection circuit 15 and the peak detection circuit 16 via the lead 33. It is connected to the contact part 17. The lead wires 28, 29, 32, and 33 are one cord 34.

The main body 11 controls the microprocessor 35
In this case, an AD converter 37, a memory 38, a display 39, a buzzer 41, a mode selector 42, a switch selector 43, switches 45 and 46, Position drive unit 4
7 is connected. Reference data is stored in the memory 38 for each piece of identification information for identifying each test point. Memory 38
For example, as shown in FIG. 2C, the unique number (ID number) is used as identification information of one test point for each address.
And the position coordinates (x, y) of the test point on the board are
Further, the average voltage value and the peak voltage value in the normal state are stored. The average voltage value and the peak voltage value are referred to as reference data.

Writing to the memory 38 is performed, for example, as follows. The mode selector 42 is operated to set the mode to the reference data setting mode.
Set to the side. By operating the keyboard of the input unit 48, the values known in advance are converted into the ID number, the position coordinates (x, y),
The average voltage value and the peak voltage value are input in this order, and each input data is stored in the memory 38 by the microprocessor 35.
Write to. Alternatively, a bus is connected to an external database through the input unit 48, and position coordinates, normal voltages (logical values, etc.) according to ID numbers are obtained from data used when designing an electronic circuit network of the board by a CAD (design apparatus using an electronic computer). Transfer data and input. In this case, the microprocessor 35 calculates an average voltage and a peak voltage from the input data and writes the calculated average voltage and peak voltage in the memory 38. FIG.
A ROM in which data shown in C is written in advance may be detachably mounted on the main body 11 according to the board to be inspected.

Further, using a board that is operating normally as a model, an ID number assigned near the test point of the board or assigned to the test point itself is input by operating the keyboard of the input unit 48. Probe 1 at the test point.
2 are brought into contact with each other, and the respective outputs of the average detection circuit 15 and the peak detection circuit 16 at that time are written in the memory 38. At this time, the switch selection unit 43 is controlled to control the switches 49 and 51.
Are alternately turned on, the output voltages of the average detection circuit 15 and the peak detection circuit 16 are alternately acquired, and the acquired voltage is adjusted by AD.
The data is converted into digital data by the converter 37 and written into the memory 38. This writing is performed for each test point. At this time, the position coordinates are not written. As shown in FIG. 3A, a video camera (for example, a CCD camera) 52 is attached to the body 13 of the probe 12, and the video camera 52
The ID number assigned to the board or the test point is photographed, the video output is input to the image processing unit 53 provided in the main body 11 through the code 34, the photographed ID number is recognized, and the ID number is switched. It may be taken into the microprocessor 35 through 45.

The test point requires an area where the contact 14 of the probe is in sufficiently good electrical contact.
As shown in B, a part of the wiring pattern 55 on the board 54 is enlarged to a circular land shape to be a test point 56. Solder plating is preferably used in order to avoid contact failure due to oxidation of the surface of the test point 56. ID number 5 next to test point 56
7 is entered on the board 54. For an existing board, it may be connected to an original test point and a plate-like test terminal may be attached as a test point 56 to the board 54 in parallel with the test point as shown in FIG. 3C, for example. On the upper surface of this test point 56, ID
The number 57 is assigned. As shown in FIG. 3D, the center of the test point 56 of the terminal may be recessed toward the board 54 so that the contact 14 can be easily contacted. Video camera 5
In the case where the ID number 57 is read by using the ID number 57,
May be written in a bar code.

In the case of the automatic inspection, for example, as shown in FIG. 4, the probe 12 is mounted on an xy movable mechanism (one type of position digitizer) 58, and the probe 12 freely moves on the board 54, and an arbitrary test point is set. You will be able to contact them as well. A rectangular fixing frame 59 is provided on the periphery of the board 54.
Are arranged at appropriate intervals, and both ends of the y-direction moving shaft 61 are attached to one opposing side of the fixed frame 59 so as to be movable along that side. An x-direction moving body 62 is movably attached, and the probe 12 is held by the x-direction moving body 62 movably perpendicular to the board 54. The movement of the y-direction moving shaft 61 and the movement of the x-direction moving body 62 are respectively moved by, for example, a pulse motor (not shown).
With the probe 12 positioned above, the probe 12 is moved to the board 54 side to make contact with the test point 56.

An origin mark 63 and a full scale mark 64 are provided on the board 54, and these marks are read by an optical reading means mounted on the x-direction moving body 62 to know the reference of the position coordinates. In FIG. 1, position coordinate data is given from a microprocessor 35 to a position drive unit 47, and the position drive unit 47 moves the y-direction moving shaft 61 and the x-direction moving body 62 according to the coordinate data, and the probe 12 is moved. The microprocessor 35 moves and positions on the coordinates specified on the board. On the other hand, when a position digitizer is used as the input means of the identification information, its mechanism may be the same as that shown in FIG. 4, and an encoder or the like may be attached instead of the pulse motor. In this case, the amount of movement of the y-direction moving shaft 61 and the amount of movement of the x-direction moving body 62 are input to the position coordinate conversion unit 65, and the position coordinates of the probe 12 are obtained as identification information.
6, and is taken into the microprocessor 35.

Writing of the above-mentioned reference data in the memory 38
Is pushed by the xy movable mechanism 58 as a position digitizer.
The lobe 12 is connected to each test point 56 on the normal model board 54.
May be sequentially contacted. In this case, the ID number is
Not remembered. Mode selection unit 4 to identify the fault location
2 is set to the test data acquisition mode, and the test point 56
The contact 14 of the probe 12 is brought into contact. At test point 56
If a DC signal (including power supply voltage) appears,
The pressure becomes the output of the average detection circuit 15 as it is. Test point 5
In the state where a logic signal appears at 6, an average detection circuit
As shown in FIG.
Is high level V_HThe high level V_HIs output,
In the case of a pulse signal of duty D, as shown in FIG.
Average voltage V_L+ D (V_H-V_L) (V_LIs low level)
Is output, and in the case of a pulse signal having the mark ratio M, FIG.
As shown in FIG._L+ M (V_H-V _L) Is output
And low level V_LIf the low level V_LIs output
You.

When an analog signal appears at the test point 56, for example, even if the output analog signal of the operational amplifier is periodic, the time constant of the average detection circuit 15 is set to a time longer than the period if the analog signal is periodic. By doing so, the output of the average detection circuit 15 is obtained as a certain eigenvalue. For example by passing a double integration waveform signal average detection circuit 15 as shown in FIG. 5B, and its low level V _L, the specific average voltage V _M intermediate the high level V _H is outputted.

Therefore, in any case of the DC coupling signal, the operation state at the test point 56 can be grasped from the output voltage of the average detection circuit 15. In the case of an AC coupling signal, that is, a capacitor coupling signal or a zero gloss signal, the average voltage is always 0 V regardless of the signal amplitude. However, in the peak detection circuit 16 (FIG. 2B), the DC signal of the test point 56
6, the positive side is rectified in this example and the capacitor 27 is charged. The capacitor 27 is charged positive peak value V _P of the AC signal to 0V. Diode 2 is correct
6 forward voltage drop value smaller V _R capacitor 2
7 voltage. Therefore, the operation status of the AC signal at the test point can be known from the output of the peak detection circuit 16.

When the probe 12 is manually brought into contact with the test points 56, the ID number is input to the input section 48 for each test point.
Use the keyboard to input. The microprocessor 35 takes in the ID number, and
, The switches 49 and 51 are sequentially turned on, the output voltage of the average detection circuit 15 and the output voltage of the peak detection circuit 16 are sequentially acquired and converted into digital values, respectively. Each average voltage value and peak voltage value of the reference data corresponding to the number is compared with each of the acquired output voltages, and it is determined whether or not there is a deviation by a predetermined value or more. It is conceivable to use the AD converter 37 having a medium performance having an accuracy of 8 to 10 bits and a response time of 1 to 10 μS.

The operating level of the logic element has a wide allowable range. For example, the low level of the TTL is 0 to 0.8 V and the high level is 2.7 to 5.0 V. Therefore, a normal value is expected to vary each time the element changes, and the average voltage also varies accordingly. For this reason, a certain margin is provided for the failure determination, and a measured value falling within the range of (reference data) ± (tolerance) is regarded as normal, and a value outside this range is regarded as abnormal. In this case, when the environmental temperature changes, it is necessary to take into account the temperature fluctuation of the measured value, for example, ± 1%, ± 3%, ± 5%, ± 10%.
% Or ± 20% may be selected by operating the keyboard of the input unit 48.

Depending on the test point 56, only the output voltage of the average detection circuit 15 or only the output voltage of the peak detection circuit 16 may be checked. The result of the comparison between the measured value and the reference data is reported by the reporting means. The notification method includes an audible notification, a visible notification, and a combination thereof.
The audible notification causes the buzzer 41 to simply sound "peep" when it is normal, and causes the buzzer 41 to sound "beep" when abnormal. As the visual notification, for example, as the display unit 39,
As shown in FIG. 5C, light emitting diodes (LEDs) 66 are arranged and provided, and an ID is provided near each light emitting diode 66.
Number 57 and ID number 5 of the checked test point 56
The light emitting diode 66 at 7 is simply lit continuously (shown as a black circle in the figure) in a normal state, blinks (shown as a hatched line in the figure) in an abnormal state, and is turned off (shown as a white circle in the figure) when it is not checked.

The display by the display unit 39 is shown in FIG.
In addition to the display shown in (1), a numerical display of about 5 digits of the segment light emitting diode may be provided, and the numerical display may be used to estimate the location of the failure after the comparison judgment and display the result as a part number or the like. Further, the display shown in FIG. 5C and the numeral display section may be realized by a liquid crystal display or a CRT display. Audible notification may be used in combination with any visible notification.
When the probe 12 is moved by the xy movable mechanism 58 to make contact with the test point or when another position digitizer is used, the liquid crystal display or the CRT display is usually adopted. In the case of manual operation, one of the notification means is used. Is adopted.

In the above description, the ID number 57 of the test point 56 to be brought into contact with the probe 12 is manually input by the keyboard, but may be automatically input by the position digitizer. For example, FIG. 6A shows another type of position digitizer. The position digitizer 66 is provided with a rectangular fixed frame 67 corresponding to its peripheral portion on the board 54, and the light emitting elements 68 on the inner surface of two adjacent sides of the fixed frame 67 at unit distance intervals along each side. Is mounted on each of the opposing sides thereof, and a light receiving element 71 that receives the light 69 emitted from the light emitting element 68 is mounted. Fixed frame 6
When the probe 12 is brought into contact with the test point 56 on the board 54 in 7, the two light receiving elements (71 _x2 and 71 _{y2 in the} illustrated example) which are blocked by the probe 12 and light does not reach,
The contact position (2, 2) of the probe 12 is detected, and the position coordinates are taken into the microprocessor 35 from the position digitizer 66 connected to the position coordinate conversion unit 65. In this case, the reference data of the test point having the position coordinates that match the read position coordinates is read from the memory 38.

As shown in FIG. 6B, for example, as shown in FIG. 6B, each of the probe 12 and the main body 11 is brought close to each test point 56 of the board 54 so as to be grounded.
2 is provided in the same manner as the test point 56, and the contact 14 of the probe 12 and the
6 and the ground point 72 at the same time. If the signal frequency of the electronic network is low, for example, x shown in FIG.
When the y movable mechanism 58 is used, the fixed frame 59, the y direction moving shaft 61, and the x direction moving body 62 are made of a conductive material, and when the probe 12 is held by the x direction moving body 62, the peripheral surface of the probe 12 Is brought into contact with the x-direction moving body 62, and is connected to the ground plane on the board 54 through the fixing frame 59. Alternatively, as shown in FIG. 4B, a ground wire 73 is led out from the probe 12 and connected to the ground plane of the board 54. The ground conductor 73 is slack so as not to hinder the movement of the probe 12.

Alternatively, the probe 12 or the x-direction moving body 62 may be moved by hand to bring the probe 12 into contact with the test point 56 without driving the xy movable mechanism 58 with a motor. At this time, each moving position of the y-direction moving shaft 61 and the x-direction moving body 62 is converted into a signal by an encoder, a potentiometer, or the like, and sent to the position coordinate conversion unit 65 of the main body 11.

Next, a case will be described in which the normality / abnormality of each test point is automatically determined. As shown in FIG. 6C, first, N is set to 1
(S ₁ ), the position coordinates (x, y) at which the number of the test point 56 is N (= 1) are read from the memory 38 (S ₂ ). The position coordinates (x, y) are set in the position drive unit 47 in FIG. 1 and the probe 12 is moved to the position coordinates (x, y) in FIG. contacting a 12 (S _3). Converts average detection circuit 15, the output V _M of the peak detection circuit 16, the V _R to capture a digital value (S _4), these V _M, stores the determined result compared to V _R and the reference data (S ₅₎ . N is incremented by 1 to N (S ₆ ), and N is P + 1 (P is the number of all test points 56)
Is checked if they match, and if they do not match, step S ₂
Returning to (S _7), and ends with the notification of the determination result for all test points stored so far, if match (S _8). In this case, the input means is a reading position driving unit 4 from the memory 38.
7 by setting the position coordinates.

Alternatively, as shown in FIG. 7A by attaching the same reference numerals to the parts corresponding to FIG. 1, the same number of probes 12 as the number of test points 56 are prepared, and
At the position corresponding to the coordinates of, as shown in FIG. 7B. The holding plate 74 is moved to the Z position
Is moved to the board 54 side so that the probes 12 can be simultaneously brought into contact with the respective test points 56. The detected voltage V _M from the probe 12, V _R is connected to the AD converter 37 through the lead wires 28 and 29 are switches S ₁ to S _2P respectively supplied.

With the ID numbers of all the test points and the reference data being input to the memory 38, first, as shown in FIG. 7C, the Z position driving unit 75 is controlled to connect the P probes 12 to the corresponding test points. 56 (S ₁ ). The switches S ₁ controls the switch selector 43 is turned on only one switch in order to convert the detection voltage at that time into a digital value by the AD converter 37 (S _2). The detected 2P voltages are compared with the corresponding reference data, and the determination result is notified to the notification unit 40 (the display unit 39 and the buzzer 4 in FIG. 1).
Is notified by 1) (S _3). In this case, the input means also serves as the sequential selection of the switch selector 43.

In the above description, the probe 12 has the peak detection circuit 1
In 6, only the voltage of one peak (the positive peak in the embodiment) is detected, but the other peak voltage may also be detected. For example, as shown in FIG. 8A with the same reference numerals assigned to parts corresponding to FIG.
A negative peak detection circuit 76 is connected to a connection point between the negative peak detection circuit 16 and the positive peak detection circuit 16. That is, the cathode of the diode 77 is connected to the anode side of the diode 26, and the anode of the diode 77 is grounded through the capacitor 78 and connected to the high input impedance buffer 79.

The average voltage V obtained from the buffer 22
_MAnd the positive peak V obtained from the buffer 28_PPAnd ba
Negative peak V obtained from buffer 79_PnFrom, body 1
In one microprocessor 35, the high level V_H=
V_M+ V_PPAnd low level V_L= V _M+ V_Pn(V_Pn<0)
And the mark ratio M (including the duty ratio D) (V_M−
V_Pn) / (V_PP-V_Pn) And
And the corresponding reference data obtained in advance
I do. As described above, for example, the low level V_L,
High level V_HHas a large tolerance for
And variation between lots
The average voltage V_MJudgment by only
You. However, the mark ratio M (or duty ratio D) is also found.
If a comparison is made, V_H, V_LAre equal and the mark rate
Waveforms with equal M are, for example, (a), (b),
Although there are countless as shown in (c), the wave of (a) is normal.
The probability that the shape becomes a waveform of (b) or (c) due to a fault is
Very small. Therefore this V_H, V_L, M
To determine test point abnormalities more accurately.
Can be.

However, in order to detect an abnormality when the frequency is different but the mark rate M is the same, for example, as shown in FIG. 9A, the probe 12 has an average detection circuit 15, a peak detection circuit 16 and a frequency detection section 81. Is provided. For example, each signal from the terminal 18 is converted into a pulse having a constant pulse width by a monostable multivibrator 82, and the pulse having the constant pulse width is sliced by a slicer 83 into a pulse having a constant amplitude of V _{1 at} a low level and V _{2 at} a high level. is, the sliced pulse resistor is supplied to the averaging circuit 84 consisting of a capacitor, it is averaged and the average voltage V _F is supplied to the main body 11.

[0038] The average voltage V _F test point 56, i.e. becomes proportional to the frequency of the signal at the terminal 18. Therefore,
The average prepared in advance reference data for voltage V _F, by comparing determined reference data measurements V _F, can be reliably detected abnormality of the test points. Although the electric circuit is provided in the probe 12 in the above description, the electric circuit may be provided in the main body 11. For example, as shown in FIG. 9B, the parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and the probe 12 has only a contact 14 and a grounding contact part 17 (this includes the above-mentioned foil-shaped one) on its body. The average detection circuit 15 and the peak detection circuit 16 are provided
1, the probe contact 14 and the ground contact portion 17 are connected to the average detection circuit 15 and the peak detection circuit 16 through leads 85 and 86, respectively.
The other configuration is the same as that of FIG. 1 and the operation is the same. 9B, the peak detection circuit 16 may detect both the positive peak and the negative peak in addition to detecting only one peak. FIG.
A frequency detection unit 81 shown in FIG. Probe 1
As described above, the input of the identification information to the test point 56 contacted by 2 may be performed by a keyboard, by optical reading, by a position digitizer, or the like. Further FIG.
Each test point can be automatically detected as described in C. Similarly, as shown in FIG. 7A, a plurality of probes are provided to automatically test each test point. Can also. Further, means for optically reading the ID number can be attached to the probe 12. When each detection circuit is provided on the main body 11 side, the average value circuit 84 can also be used as the average detection circuit 15 by switching a switch. Further, the average detection circuit 1 is switched by switching the switch.
5 and the capacitor 27 of the peak detection circuit 16 can be shared.

If the electronic network on the board is only a logic signal, that is, a DC coupling signal (including a power supply signal), the peak detection circuit 16 may be omitted in the above description. That is, only the average detection circuit 15 or the frequency detection unit 81 added to the probe 12 or the probe 12
1 is used. In the above description, whether or not each test point is normal or abnormal is determined by the main body 11, but this determination may be performed by an inspector. That is, the average detection circuit 15, or the average detection circuit 1 and the peak detection circuit 16, or the probe 12 provided with the frequency detection section 81, or the average detection circuit 1
5 and the probe 12 provided with the frequency detection unit 81 are brought into contact with each test point, and the output of the probe 12 at that time, that is, the output voltage of the average detection circuit 15, the output voltage of the peak detection circuit 16, and the output of the frequency detection unit 81 The voltage may be measured by, for example, a digital voltmeter, and the inspector may use the brain to make a comparison between the measured value and reference data for the test point in a document prepared in advance.

As a document in this case, for example, as shown in FIG. 10A, a paper 91 has a similar shape to the board 54, and a connector display 92 corresponding to the connector of the board 54 is displayed at one end thereof. Blocks 93A and 93 having similar shapes and arrangements corresponding to the blocks A, B, C and D obtained by structurally and electrically dividing the net.
B, 93C and 93D are drawn on the paper 91, and the test points 56 of the input terminals and output terminals thereof are also designated by the symbols 9 in the same arrangement.
4 and the ID number 57 of each test point 56 is similarly written on the sheet 91. Further, in each test point display 94, when measuring the output voltage of the average detection circuit 15, DC is input when measuring the output voltage of the average detection circuit 15, and when the output voltage of the peak detection circuit 16 is measured, AC is input in the corresponding test point display 94. A reference data display 95 for the normal operation is attached. Also in the connector display 92, each corresponding contact is displayed, and reference data display during normal operation is added to the contact display. In this way, the probe 12 is brought into contact with the test point of the actual board or the contact portion of the connector, and the reference data for the measured voltage at that time can be easily known from the document.

In such a measurement, since the voltage measured by the digital voltmeter is only one input, the output of the average detection circuit 15 and the output of the peak detection circuit 16 are switched by a switch and supplied to the digital voltmeter. That means
The switch is provided on the probe 12. FIG.
As shown in FIG. 0B, the output side of the resistor 19 of the average detection circuit 15 and the output side of the diode 26 of the peak detection circuit 16 are switched by the switch 96 and connected to the capacitor 21, so that the capacitor 21 is shared. And switch 9
6 can be switched to detect the average voltage or the peak voltage.

The procedure for identifying a fault location is as follows. It is assumed that all necessary reference data has been input to the abnormal location detecting apparatus according to the present invention, and that there is only one failure location of the electronic device to be inspected. Also, the latter bidirectional CPU data bus is self-checked by the microprocessor built in the electronic device and is assumed to be normal, and the power supply is assumed to be normal. (1) Identification of defective board When there are a plurality of boards, first, which board has a failure is identified. The method is to sequentially check signals coming into and out of each board, for example, at the connector, and find a board whose input signal is normal but whose output signal is abnormal. For this purpose, it is convenient if information such as the connector pin number and the type of input / output is input at the stage of inputting the reference data. (2) Identification of a failed block When a failed board is found, the probe 12 is brought into contact with the test point 56 of the board using a getter (extender) or a drawer code. The test point corresponds to a divided test point (the test point instruction may be a document or may be indicated on the display of the main body). Also in this case, a block in which the input signal is normal and the output signal is abnormal (large fault block) is searched. When a large fault block is found, the process proceeds to the detection of a faulty block and a faulty small block. (3) Specifying a failed part If the block division in (2) is performed based on six blocks, a failed part can be specified with a detail of 1/6 ³ = 1/216 in ^three searches. This means that when 216 parts are mounted, it can be determined at the level of one part. (4) Confirmation of a failed component Even if a failed component can be almost specified, it cannot be said that there is no error determination. Care must be taken, especially after finding a failed part, which will require replacement of the part. If the other party is an LSI having a large number of pins, certain identification is required. Therefore, finally, a signal check is performed on all the pins of the corresponding part to confirm whether the input signal is normal and the output signal is just abnormal.

[0043]

According to the present invention, the following effects can be obtained. A single probe can detect a DC voltage, an average voltage of a logic signal, and a peak voltage of an AC signal, which is efficient. If data on test points (DC voltage value, AC voltage value and ID number or position coordinates) and other data on board connector and each component (pin number and I / O terminal distinction) are prepared, With or without knowledge, tailoring black-boxed blocks makes it possible to find fault locations and generalize or generalize the work of identifying fault locations that previously required advanced electrical technology. , The effect is immeasurable.

For a particular network, the basis is to determine that the network is faulty when the input signal is normal and the output signal is abnormal, but this determination is quite intuitive and It is logical (except that there is an exception; if there is a cause of failure at the input of the next network, a determination error will occur. You only have to suspect the parts). Therefore, it is also possible to program and automate the procedure for searching for a fault location itself. This leads to labor saving of the work for identifying the failure location.

Normally, in specifying a failure location at a site, a voltmeter, an ohmmeter, an oscilloscope, and sometimes a logic analyzer are required. However, if a fault location specifying device according to the present invention is used, these instruments are hardly needed, so that a significant reduction in equipment costs and labor savings in carrying the instruments can be realized. In a certain product, there are two phases in which the failure location needs to be specified, one of which is when component mounting is completed and the board is operated for the first time, and the second is maintenance after shipment. At present, the two phases have a common purpose in terms of fault location, but the countermeasures are not unified. In other words, board testers and special jigs are often used during production, but they are not suitable for field (on-site) service. Must be polished and they can be said to be generating significant double investment overall.

By using the concept of specifying a fault location using the present invention, it is possible to unify the fault location specifying device during production and maintenance. This is because if all the data relating to the test points are determined at the time of production (or at the time of design), it can be used for maintenance as it is. As a trend in the world, resource saving is called out,
Speaking of electronic devices, one of the issues is maintenance by users. However, on the contrary, some electronic devices are becoming more and more complicated and the problems are far away. For this situation, the fault location concept using the present invention provides a very effective solution. There are two reasons.
One is that electronic equipment manufacturers will actively release data on test points and data on fault location. Because they don't drain any circuit design know-how (because only black boxes and voltage values). Second, no special technique is required to chase the fault.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the invention of claim 2;

2A is a connection diagram illustrating an example of the average detection circuit 15, FIG. 2B is a connection diagram illustrating an example of the peak detection circuit 16, and FIG.
FIG. 5 is a diagram showing an example of a storage state in the inside.

3A is an external view showing a probe provided with ID number reading means, FIG. 3B is a plan view showing an example of test points on a board, and FIG.
And D respectively show other examples, (a) is a plan view,
(B) is a sectional view.

FIG. 4 shows an example of an xy movable mechanism 58, where A is a plan view and B
Is a front view.

5A is a diagram showing the relationship between various states of a logic signal and the output of the average detection circuit 15, FIG. 5B is a diagram showing the relationship between the double integrated waveform signal and the output of the average detection circuit 15, and FIG. FIG. 7 is a diagram illustrating a display example of a display unit 39.

FIG. 6A is a plan view showing another example of the position digitizer, and FIG.
Is a side view showing the contact between the probe test point and the ground point,
C is a flowchart showing a processing example when one probe is automatically brought into contact with each test point.

7A is a block diagram showing an embodiment of the present invention in which each test point signal is captured by a plurality of probes, FIG. 7B is a front view showing an example of the relationship between the probes and the board, and FIG. It is a flowchart shown.

8A is a connection diagram showing another example of the internal configuration of the probe 12, and FIG. 8B is a waveform diagram showing an example in which the waveform is different at the same mark rate.

FIG. 9A is a connection diagram showing still another example of the internal configuration of the probe 12, and FIG. 9B is a block diagram showing an embodiment of the third invention.

10A is a diagram showing an example of a document in which reference data is described, and FIG. 10B is a connection diagram showing another example of a circuit in the probe 12. FIG.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G01R 31/28-31/3193 G01R 1/06-1/073 G01R 31/02 G01R 19/00-19 / 32

Claims (16)

(57) [Claims] 1. A probe having an average detecting means for detecting an average voltage of a signal at a test point of an electronic network mounted on a board, and identification information for identifying a test point at which the probe detects a signal is input. Input means, a memory for storing reference data for each piece of identification information of each test point, and a comparison between a detected voltage from the probe and reference data obtained by referring to the memory based on the inputted identification information. Comparing means, notifying means for notifying a result of the comparison determination, connected to the probe, the input means, the memory,
An abnormality detection device for an electronic device board, comprising: a main body holding the comparing means and the notifying means. 2. The apparatus according to claim 1, wherein the probe is provided with peak detecting means for detecting a peak voltage of the signal at the test point. 3. A probe electrically connected to each test point of an electronic network mounted on a board, means for inputting identification information for identifying a test point contacted by the probe, and an input from the probe. Average detection means for detecting an average voltage of the signal at the test point, a memory for storing reference data for each of the identification information of the test points, and a state in which the probe is in contact with the test point, from the average detection means. Comparing means for comparing the detected voltage with reference data obtained by referring to the memory based on the input identification information; notifying means for notifying the result of the comparison; and connecting to the probe, Means for detecting an abnormal portion of an electronic device board, comprising: a main body holding means, the average detecting means, the memory, the comparing means, and the notifying means. 4. The apparatus according to claim 1, wherein said main body is provided with peak detecting means for detecting a peak voltage of a signal at said test point input from said probe, and said comparing means detects said peak with said probe in contact with said test point. 4. The apparatus according to claim 3, wherein a detection voltage from the means is also compared with the reference data. 5. The peak detecting means for detecting a positive peak voltage and a negative peak voltage after AC coupling, wherein the positive peak voltage and the negative peak voltage detected by the main body are detected by the main body. 3. The apparatus according to claim 2, further comprising means for calculating a mark rate from the average voltage, and means for comparing and determining the calculated mark rate with reference data of a mark rate of a corresponding test point stored in the memory in advance. 4. The device for detecting an abnormal part of an electronic device board according to 4. 6. The probe includes means for converting each signal from the test point into a pulse having a predetermined width and a predetermined amplitude, and means for detecting an average voltage of the converted pulse. Item 3. An abnormality detection device for an electronic device board according to item 1 or 2. 7. The main body includes means for converting each signal from a test point input from the probe into a pulse having a predetermined width and a predetermined amplitude, and means for detecting an average voltage of the converted pulse. 5. The apparatus for detecting an abnormal part of an electronic device board according to claim 3, wherein 8. A unique number is stored in the memory as identification information of each test point, and the input means is attached to the probe, and the input means is provided at or near the test point itself on the board. 8. The apparatus according to claim 1, further comprising means for optically reading the unique number. 9. The memory stores the position coordinates as identification information of each test point, and the input means is a position digitizer that detects the position coordinates when the probe is positioned on the board. 8. The device according to claim 1, wherein the electronic device board has an abnormality. 10. The memory also stores the position coordinates of each test point on the board, the movable holding means for moving the probe on the board to make contact with the test point, and each test point. 8. The electronic apparatus according to claim 1, further comprising: means for sequentially reading the position coordinates from the memory, setting the position coordinates in the movable holding means, and sequentially bringing the probe into contact with the test point. Device for detecting abnormal parts of the board. 11. A plurality of said probes, said plurality of probes being held in the same arrangement as the possible positions of test points on said board, and contacting said probes with a plurality of test points on said board. 8. The electronic apparatus board according to claim 1, further comprising means for taking a signal or a voltage from the probe into the main body in a predetermined order in a state where the probe is made to be in an abnormal state. apparatus. 12. A mode designating means for designating a mode such as a reference data setting mode or a test data acquisition mode, and identification information of a test point and its reference data in a state where the reference data setting mode is designated by the mode designating means. 8. An apparatus according to claim 1, further comprising means for inputting the reference data, and means for storing the input reference data in the memory for each piece of identification information. . 13. A body that can be held and moved, a contact that protrudes from the body and that can make electrical contact with a test point, and an average voltage of an input signal received from the contact and housed in the body. An average detection means for detecting, and a probe for detecting an abnormal portion of an electronic device board, comprising: 14. The probe according to claim 13, wherein peak detection means for detecting a peak voltage of an input signal from the contact is accommodated in the body. 15. The probe according to claim 14, wherein said peak detecting means detects a positive peak voltage and a negative peak voltage after AC coupling. 16. A device housed in the body and configured to convert an input signal from the contact into a pulse having a predetermined width and a predetermined amplitude, and to detect an average voltage of the converted pulse. The probe for detecting an abnormal part of an electronic device board according to claim 13.