JP3325317B2 - Semiconductor device used for COG type liquid crystal module - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a face-down type semiconductor device in which electrodes of a semiconductor element are directly connected to a wiring portion of a substrate, and more particularly to an improvement in a semiconductor device used for a COG type liquid crystal module.

[0002]

2. Description of the Related Art As a semiconductor device having a semiconductor element mounted on a substrate, many types such as a liquid crystal module and an EL panel have been developed, and a thin means for connecting an electrode of the semiconductor element to a wiring portion on the substrate has been used. In addition to a wire bonding method using a wire, a face-down method in which an electrode of a semiconductor element is directly connected to a wiring portion of a substrate is also known (for example, see Japanese Patent Publication No. 2-7180). In this face-down method, conductive connection protrusions are formed on the electrodes of the semiconductor element, and the corresponding wiring portions are arranged on the substrate on which the pattern is formed with an adhesive material interposed therebetween. The adhesive material is cured in this pressurized state, and a metal, conductive paste, rubber connector, or the like is used for the connection projection, and a light-curable resin, a thermosetting resin, or the like is used for the adhesive material. Since it is easy to make the connection projections fine, it is more suitable for high-density mounting with a narrow wiring pitch than the wire bonding method.

However, as the connection projections become finer, the degree of parallelism between the substrate and the semiconductor element when the semiconductor element is overlaid on the substrate and pressurized becomes more important. There is a problem that connection failure is likely to occur. When the arrangement of the connection projections is not symmetrical with respect to the center of the semiconductor element, the manner in which the pressing force is applied is unbalanced and the parallelism is likely to be deteriorated. It is liable to cause a connection failure. FIG. 2 shows an example of an arrangement in which such a connection failure easily occurs. As shown in the figure, when the connection projection 2 is formed along the upper and lower and right side edges of the semiconductor element 1 and the connection projection 2 is not formed on the left side edge 1a,
Since the pressing force is likely to be applied to the side edge 1a, the left and right connection protrusions 2 on the upper and lower edges are sufficiently pressed, but the right connection protrusion 2 tends to be insufficient in the pressing force and connection failure is likely to occur. It becomes.

The above-mentioned parallelism can be confirmed by the degree of collapse of the connection projections, so that the degree of parallelism can be adjusted. For example, in the case of a liquid crystal module having a transparent substrate and electrodes, the degree of collapse of the connection projections is determined. It can be visually observed.
However, when the electrode is formed of a transparent material such as ITO, a metal material such as gold, silver, and aluminum is laminated on the surface to reduce contact resistance and wiring resistance.
A portion where the metal material is not laminated is left for confirmation, and the display performance of the liquid crystal module may be adversely affected by the presence of the portion having high resistance.

[0005]

SUMMARY OF THE INVENTION The present invention focuses on this point. In particular, it is an object of the present invention to make it easy to check the parallelism in a semiconductor device used for a COG type liquid crystal module so that the parallelism can be easily obtained. It was done as.

[0006]

According to the present invention, in order to achieve the above object, according to the present invention, a semiconductor element for driving a liquid crystal having connection projections is provided on a glass substrate having a corresponding wiring portion with an adhesive material interposed therebetween. In a semiconductor device having a structure in which a semiconductor element is mounted on a glass substrate by hardening the adhesive material and mounting the semiconductor element on the glass substrate, the semiconductor element is separated from the conductive connection projection formed on the electrode. A projection for checking parallelism is provided on the outer peripheral portion, a transparent electrode having a metal layer is formed on the glass substrate corresponding to each projection for connection, and further there is no transparent electrode corresponding to the projection for checking parallelism. An adhesive portion is provided. The above-mentioned projection for parallelism confirmation,
For example, they are provided at four corners on the outer periphery of the semiconductor element.

[0007]

The portion where the parallelism checking projection is provided can be left transparent without any problem of contact resistance, so that the degree of collapse can be visually checked and the parallelism can be adjusted correctly.

[0008]

Next, an embodiment of the present invention will be described with reference to FIG. FIG. 1A is a plan view of a semiconductor element showing the arrangement of connection projections and projections for checking parallelism, and FIG. 2B is a cross-sectional view showing the relationship between electrodes of the semiconductor element and wiring portions of a glass substrate.

The semiconductor element 1 is an IC element for driving a liquid crystal. Metal connection projections 2 are formed on electrodes 3 which are formed at a constant pitch along upper, lower, left and right side edges. . Correspondingly, the glass substrate 4 has ITO
Is formed, and a thin metal layer 6 such as gold is formed on the surface of the transparent electrode 5 by plating or the like. Also, at four corner portions of the semiconductor element 1,
A projection 7 for checking parallelism is provided separately from the connection projection 2. Since the parallelism checking protrusion 7 is not intended for electrical connection, it is provided directly on the main body of the semiconductor element 1, and the glass substrate 4 has a bonding portion 4 a without the transparent electrode 5 correspondingly. Is provided. The semiconductor element 1 is connected to the glass substrate 4 by aligning the two and arranging them in parallel as shown in FIG. 2 (b), and then applying an adhesive material (not shown) such as photo-curing or thermo-curing between them. This is performed by hardening the adhesive material while applying pressure while interposed therebetween, so that the parallelism checking protrusion 7 is directly bonded to the bonding portion 4a.

This embodiment is constructed as described above, and when bonded in a state where the parallelism is kept good, the respective parallelism checking projections 7 are crushed in exactly the same state. The degree of parallelism can be confirmed by visually observing the degree of collapse, and it is easy to adjust the parallelism from the result. In this embodiment, since the connection projections 2 are arranged symmetrically, there is no imbalance in the manner in which the pressing force is applied, and the parallelism can be easily checked and adjusted. When a plurality of semiconductor devices 1 of different types are mounted, the operation can be performed continuously without adjusting the parallelism each time the type of product is changed, and a favorable result that no connection failure occurs can be obtained. Was.

According to the present invention, the portions of the connection projections 2 for the purpose of electrical connection do not need to be transparent, so that a metal layer 6 is provided on all of them to perform connection with low contact resistance and wiring resistance. Can be. Also, a projection 7 for checking the parallelism
Since the material is not originally intended for electrical connection, the material does not need to be conductive. However, in practice, it can be formed simultaneously with the same material when forming the connection projection 2 for electrical connection.

[0012]

As is apparent from the above embodiment, in the present invention, a projection for confirming the parallelism is provided on the outer peripheral portion of the semiconductor element in addition to the conductive connection projection formed on the electrode. Since the portion on which the parallelism checking protrusion is provided can be made transparent, the degree of crushing can be visually observed through a glass substrate, and the degree of parallelism can be confirmed from the degree of crushing, and it can be easily adjusted properly if necessary. . Therefore, in a semiconductor device used for a COG liquid crystal module manufactured by a face-down method, a connection failure caused by a parallelism failure can be eliminated, and the yield can be improved.

[Brief description of the drawings]

FIG. 1 is a plan view and a sectional view of an embodiment of the present invention.

FIG. 2 is a plan view of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Connection projection 3 Electrode 4 Glass substrate 4a Adhesion part 5 Transparent electrode 6 Metal layer 7 Parallelism confirmation projection

Continuation of the front page (56) References JP-A-63-117437 (JP, A) JP-A-3-119740 (JP, A) JP-A-63-12142 (JP, A) JP-A-1-238148 (JP) JP-A-64-24434 (JP, A) JP-A-3-159144 (JP, A) JP-A-5-67647 (JP, A) JP-A-6-45402 (JP, A) 2-36036 (JP, U) Actually open sho 59-20633 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/60

Claims (2)

(57) [Claims] 1. A liquid crystal driving semiconductor element having connection projections formed thereon is disposed on a glass substrate having a corresponding wiring portion with an adhesive material interposed therebetween, and is positioned and pressed, and the adhesive material is cured. In a semiconductor device having a structure in which a semiconductor element is mounted on a glass substrate, a projection for checking the degree of parallelism is provided on an outer peripheral portion of the semiconductor element separately from the conductive connection projection formed on the electrode. A transparent electrode having a metal layer is formed corresponding to each connection projection, and an adhesive portion without the transparent electrode is provided corresponding to the parallelism confirmation projection. A semiconductor device used for a module. 2. The semiconductor device used in a COG type liquid crystal module according to claim 1, wherein said parallelism checking projections are provided at four corners on the outer periphery of the semiconductor element.