JP3316998B2 - Thin film connector and semiconductor chip mounting method using the same - Google Patents

Thin film connector and semiconductor chip mounting method using the same

Info

Publication number
JP3316998B2
JP3316998B2 JP3511294A JP3511294A JP3316998B2 JP 3316998 B2 JP3316998 B2 JP 3316998B2 JP 3511294 A JP3511294 A JP 3511294A JP 3511294 A JP3511294 A JP 3511294A JP 3316998 B2 JP3316998 B2 JP 3316998B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
thin
film
supporter
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3511294A
Other languages
Japanese (ja)
Other versions
JPH07245327A (en
Inventor
秀弥 橋井
保 大和田
泰博 米田
貴志男 横内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3511294A priority Critical patent/JP3316998B2/en
Publication of JPH07245327A publication Critical patent/JPH07245327A/en
Application granted granted Critical
Publication of JP3316998B2 publication Critical patent/JP3316998B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は間にハンダバンプを介在
させて半導体チップを印刷配線基板に実装する方法に係
り、特に半導体チップの高集積度化を可能にする薄膜コ
ネクタと半導体チップの実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for mounting a semiconductor chip on a printed wiring board with solder bumps interposed therebetween, and more particularly, to a thin film connector and a method for mounting a semiconductor chip which enable high integration of the semiconductor chip. About.

【0002】現在、単位面積当たりの接続ピン数が極め
て多い高集積度半導体チップの実装では従来のワイヤボ
ンディングに代えて、接続ピンの数が多くても接続の容
易なTAB方式やフリップチップ方式等の実装方法が極
く一般的に利用されている。
At present, in mounting a highly integrated semiconductor chip having a very large number of connection pins per unit area, instead of the conventional wire bonding, a TAB method, a flip chip method, etc., which can be easily connected even if the number of connection pins is large. Is very commonly used.

【0003】特に、接続ピンの数が多い半導体チップを
ハンダバンプを介して印刷配線基板上に実装するフリッ
プチップ方式は、接続ピンの数に関係無く全ての接続ピ
ンを同時に接続できることから実装に要する時間が短縮
される等の点で優れている。
[0003] In particular, the flip-chip method in which a semiconductor chip having a large number of connection pins is mounted on a printed wiring board via solder bumps requires all the connection pins simultaneously regardless of the number of connection pins. It is excellent in that it is shortened.

【0004】しかし、半導体チップの集積度を高めるに
は接続ピンの配列ピッチを縮小して単位面積当たりの接
続ピン数を増加し、半導体チップにおいて発生した熱を
効率よく伝播して印刷配線基板を介し放熱する等の冷却
手段を考慮する必要がある。
However, in order to increase the degree of integration of the semiconductor chip, the arrangement pitch of the connection pins is reduced to increase the number of connection pins per unit area. It is necessary to consider cooling means such as radiating heat.

【0005】しかるに、フリップチップ方式による従来
の実装方法では接続ピン数の増加と放熱効率向上の両立
が困難である。そこで、配列ピッチを縮小し接続ピン数
の増加を可能にすると共に放熱効率の向上を図った実装
方法の確立が望まれている。
However, in the conventional mounting method using the flip chip method, it is difficult to achieve both an increase in the number of connection pins and an improvement in heat radiation efficiency. Therefore, it is desired to establish a mounting method that reduces the arrangement pitch, enables an increase in the number of connection pins, and improves the heat radiation efficiency.

【0006】[0006]

【従来の技術】図4は従来の実装方法を示す側断面図で
ある。フリップチップ方式により半導体チップを印刷配
線基板上の所定の位置に実装する従来の方法には図4
(a) に示す如く、エポキシ系の熱硬化性接着材11中にハ
ンダボール12を適当に分散させた異方性導電フィルム1
を利用する場合がある。
2. Description of the Related Art FIG. 4 is a side sectional view showing a conventional mounting method. FIG. 4 shows a conventional method of mounting a semiconductor chip at a predetermined position on a printed wiring board by a flip chip method.
As shown in (a), an anisotropic conductive film 1 in which solder balls 12 are appropriately dispersed in an epoxy-based thermosetting adhesive material 11.
May be used.

【0007】即ち、異方性導電フィルム1を挟んで半導
体チップ3を印刷配線基板2上に搭載し加熱すると共に
加圧することで、熱硬化性接着材11が軟化してハンダボ
ール12が半導体チップ3の接続ピン31と印刷配線基板2
上の電極21の間に挟まれる。
That is, the semiconductor chip 3 is mounted on the printed wiring board 2 with the anisotropic conductive film 1 interposed therebetween, and is heated and pressed, so that the thermosetting adhesive 11 is softened and the solder balls 12 are 3 connection pin 31 and printed wiring board 2
It is sandwiched between the upper electrodes 21.

【0008】かかる状態で更に加熱すると熱硬化性接着
材11が硬化して半導体チップ3が印刷配線基板2上に固
着されると共に、半導体チップ3の接続ピン31と印刷配
線基板2上の電極21が間に介在させたハンダボール12に
よって電気的に接続される。
When the thermosetting adhesive 11 is further heated in this state, the thermosetting adhesive 11 is hardened to fix the semiconductor chip 3 on the printed wiring board 2, and the connection pins 31 of the semiconductor chip 3 and the electrodes 21 on the printed wiring board 2 are fixed. Are electrically connected by a solder ball 12 interposed therebetween.

【0009】また、フリップチップ方式によって半導体
チップを印刷配線基板上に実装する別の方法として図4
(b) に示す如く、例えば、印刷配線基板2上に予め塗布
された熱硬化性接着材4を介して半導体チップ3を押し
付け所定の位置に固着する。
FIG. 4 shows another method of mounting a semiconductor chip on a printed wiring board by a flip chip method.
As shown in (b), for example, the semiconductor chip 3 is pressed and fixed at a predetermined position via a thermosetting adhesive material 4 previously applied on the printed wiring board 2.

【0010】半導体チップ3の接続ピン31にはハンダボ
ール12が付着していて押し付けると印刷配線基板2上の
電極21に当接する。この状態で加熱することによりハン
ダボール12が溶融し接続ピン31と電極21の間はハンダを
介して電気的に接続される。
The solder balls 12 adhere to the connection pins 31 of the semiconductor chip 3 and, when pressed, contact the electrodes 21 on the printed wiring board 2. By heating in this state, the solder ball 12 is melted and the connection pin 31 and the electrode 21 are electrically connected via the solder.

【0011】なお、印刷配線基板2と半導体チップ3の
接合部が露出しているため水分等が侵入すると接続不良
等が発生する。そこで図示の如く印刷配線基板2と半導
体チップ3の接合部を取り囲むように樹脂5を充填する
ことによって保護している。
Since the junction between the printed wiring board 2 and the semiconductor chip 3 is exposed, when moisture or the like enters, a connection failure or the like occurs. Therefore, protection is provided by filling the resin 5 so as to surround the joint between the printed wiring board 2 and the semiconductor chip 3 as shown.

【0012】[0012]

【発明が解決しようとする課題】異方性導電フィルムを
利用する上述の方法は半導体チップの全面が異方性導電
フィルムを介して印刷配線基板に接し、熱伝導率の高い
熱硬化性接着材を用いることによって半導体チップにお
いて発生した熱を効率よく逃がすことができる。
According to the above-mentioned method using an anisotropic conductive film, the entire surface of a semiconductor chip is in contact with a printed wiring board via the anisotropic conductive film, and a thermosetting adhesive having high thermal conductivity is provided. , Heat generated in the semiconductor chip can be efficiently released.

【0013】しかし、熱硬化性接着材中にハンダボール
を適当に分散させているためハンダボールの間隔の制御
が極めて困難で、接続ピンの配列ピッチ縮小のため分布
密度を高くすると隣接するハンダボール間でリークが生
じるという問題があった。
However, since the solder balls are appropriately dispersed in the thermosetting adhesive, it is extremely difficult to control the interval between the solder balls. There is a problem that a leak occurs between them.

【0014】また、熱硬化性接着材で接着する方法は間
にハンダボールが介在しないため接続ピンの配列ピッチ
を縮小できるが、熱硬化性接着材に接する面積が小さく
半導体チップで発生した熱を効率よく逃がすことができ
ないという問題があった。
In the method of bonding with a thermosetting adhesive, the arrangement pitch of connection pins can be reduced because no solder balls are interposed therebetween, but the area in contact with the thermosetting adhesive is small and the heat generated by the semiconductor chip is reduced. There was a problem that it was not possible to escape efficiently.

【0015】本発明の目的は配列ピッチを縮小し接続ピ
ン数の増加させると共に放熱効率の向上を図った実装方
法を提供することにある。
An object of the present invention is to provide a mounting method in which the arrangement pitch is reduced, the number of connection pins is increased, and the heat radiation efficiency is improved.

【0016】[0016]

【課題を解決するための手段】図1は本発明になる薄膜
コネクタを示す側断面図である。なお全図を通し同じ対
象物は同一記号で表している。
FIG. 1 is a side sectional view showing a thin film connector according to the present invention. The same object is denoted by the same symbol throughout the drawings.

【0017】上記課題は耐熱性接着フィルムに斜面で囲
まれフィルムを貫通する複数の錐状孔63が形成されたサ
ポータ61と、ハンダまたは導電性樹脂で形成され粒径が
錐状孔63の狭口64より大きい複数の導電性ボール62とを
具え、2枚のサポータ61が有する錐状孔63の広口65側を
対向させて形成された空間に導電性ボール62を嵌挿し、
サポータ61同士を仮接合して錐状孔63間に導電性ボール
62を挟持してなる本発明の薄膜コネクタによって達成さ
れる。
The above-mentioned problem is caused by a supporter 61 in which a plurality of conical holes 63 are formed on a heat-resistant adhesive film and surrounded by a slope and penetrate the film. With a plurality of conductive balls 62 larger than the opening 64, the conductive balls 62 are inserted into a space formed by facing the wide opening 65 side of the conical hole 63 of the two supporters 61,
Temporarily join the supporters 61 to each other to form conductive balls between the conical holes 63.
This is attained by the thin-film connector of the present invention comprising the pin 62.

【0018】[0018]

【作用】耐熱性接着フィルムに斜面で囲まれフィルムを
貫通する複数の錐状孔を設けたサポータと、ハンダまた
は導電性樹脂で形成され粒径が錐状孔の狭口より大きい
複数の導電性ボールとを具え、2枚のサポータが有する
錐状孔の広口側を対向させて形成された空間に導電性ボ
ールを嵌挿し、サポータ同士を仮接合して錐状孔間に導
電性ボールを挟持してなる本発明の薄膜コネクタによっ
て、ハンダボールの間隔が高精度に制御され接続ピンの
配列ピッチを縮小することが可能になる。
A supporter having a plurality of conical holes surrounded by a slope and penetrating the film, and a plurality of conductive materials formed of solder or conductive resin and having a particle size larger than the narrow opening of the conical holes. A conductive ball is inserted into a space formed with the wide-open sides of the conical holes of the two supporters facing each other, and the supporters are temporarily joined to sandwich the conductive balls between the conical holes. According to the thin film connector of the present invention, the interval between the solder balls is controlled with high precision, and the arrangement pitch of the connection pins can be reduced.

【0019】しかも、印刷配線基板に実装された半導体
チップは全面が耐熱性接着フィルムを介して印刷配線基
板に接しており、熱伝導率の高い熱可塑性接着材を用い
ることによって半導体チップにおいて発生した熱を効率
よく逃がすことができる。即ち、配列ピッチを縮小し接
続ピン数の増加させると共に放熱効率の向上を図った実
装方法を実現することができる。
Moreover, the entire surface of the semiconductor chip mounted on the printed wiring board is in contact with the printed wiring board via the heat-resistant adhesive film, and is generated in the semiconductor chip by using a thermoplastic adhesive having a high thermal conductivity. Heat can be efficiently released. That is, it is possible to realize a mounting method in which the arrangement pitch is reduced, the number of connection pins is increased, and the heat radiation efficiency is improved.

【0020】[0020]

【実施例】以下添付図により本発明の実施例について説
明する。なお、図2は本発明になる薄膜コネクタの他の
実施例を示す側断面図、図3は本発明になる実装方法を
示す側断面図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 2 is a side sectional view showing another embodiment of the thin film connector according to the present invention, and FIG. 3 is a side sectional view showing a mounting method according to the present invention.

【0021】本発明になる薄膜コネクタは図1に示す如
く耐熱性の接着フィルムに複数の錐状孔63が形成された
サポータ61を有し、45度の斜面で囲まれ接着フィルムを
貫通する錐状孔63はマスクを介し KrFエキシマレーザ等
を利用して形成されている。
As shown in FIG. 1, the thin film connector according to the present invention has a supporter 61 in which a plurality of conical holes 63 are formed in a heat-resistant adhesive film, and is surrounded by a 45-degree slope and penetrates the adhesive film. The hole 63 is formed using a KrF excimer laser or the like via a mask.

【0022】それぞれ複数の錐状孔63を具えた2枚のサ
ポータ61は組立に際し錐状孔63の広口65側が互いに対向
するよう重ねられ、それぞれの錐状孔63間にハンダで形
成された粒径が50μm の導電性ボール62を嵌挿して部分
的に熱を加え仮接合される。
The two supporters 61 each having a plurality of conical holes 63 are overlapped so that the wide-opening 65 side of the conical holes 63 faces each other during assembly, and particles formed by solder between the conical holes 63 are formed. A conductive ball 62 having a diameter of 50 μm is inserted and partially heated and temporarily joined.

【0023】サポータ61が有する45度の斜面で囲まれた
錐状孔63は広口65側における直径がほぼ60μm になるよ
う形成されており、嵌挿された粒径が50μm の導電性ボ
ール62がサポータ61を仮接合したあとで錐状孔63の狭口
64から脱落することはない。
The conical hole 63 of the supporter 61, which is surrounded by a 45-degree slope, is formed to have a diameter of about 60 μm on the wide mouth 65 side, and a conductive ball 62 having a particle diameter of 50 μm inserted therein is formed. After temporarily joining the supporter 61, the narrow opening of the conical hole 63
Never drop out of 64.

【0024】本発明の他の実施例の場合は図2に示す如
く耐熱性の接着フィルムに複数の錐状孔63が形成された
サポータ61を有し、45度の斜面で囲まれ接着フィルムを
貫通する錐状孔63はマスクを介し KrFエキシマレーザ等
を利用して形成されている。
In the case of another embodiment of the present invention, as shown in FIG. 2, a heat-resistant adhesive film has a supporter 61 having a plurality of conical holes 63 formed therein. The penetrating conical hole 63 is formed using a KrF excimer laser or the like via a mask.

【0025】前記実施例と異なり本実施例は錐状孔63の
狭口64側が開口するサポータ61の面に薄膜ハンダ層66が
被着されており、導電性ボールに代えてサポータ61上の
薄膜ハンダ層66から狭口64を通して錐状孔63の内部にハ
ンダ層67を成長させている。
In this embodiment, unlike the above embodiment, the thin film solder layer 66 is applied to the surface of the supporter 61 in which the narrow opening 64 side of the conical hole 63 is open, and the thin film on the supporter 61 is replaced with the conductive ball. A solder layer 67 is grown inside the conical hole 63 from the solder layer 66 through the narrow opening 64.

【0026】それぞれ複数の錐状孔63を具えた2枚のサ
ポータ61は組立に際し錐状孔63の広口65側が互いに対向
するよう重ねられ、相対する錐状孔63の内部に成長させ
たハンダ層67が溶融したとき容易に一体化するよう部分
的に熱を加え仮接合される。
The two supporters 61 each having a plurality of conical holes 63 are stacked so that the wide-opening 65 side of the conical holes 63 face each other during assembly, and a solder layer grown inside the conical holes 63 facing each other. When 67 is melted, it is partially joined by applying heat so that it is easily integrated.

【0027】なお、2枚のサポータ61を組み立て仮接合
するとサポータ61に被着された薄膜ハンダ層66が表面に
露出しているが、極めて薄いため半導体チップを実装す
る際に印加される熱により寸断され接続ピン間の短絡や
リークを生じることはない。
When the two supporters 61 are assembled and temporarily joined, the thin solder layer 66 adhered to the supporters 61 is exposed on the surface. However, since the thin solder layer 66 is extremely thin, heat is applied when mounting the semiconductor chip. There is no short circuit or leakage between the connection pins due to shredding.

【0028】本発明になる実装方法は図3(a) に示す如
く上述の薄膜コネクタ6を半導体チップ3と印刷配線基
板2との間に挟み、図3(b) に示す如く半導体チップ3
を介し薄膜コネクタ6に圧力と熱を印加することでサポ
ータ61同士が本接合される。
In the mounting method according to the present invention, as shown in FIG. 3A, the above-mentioned thin film connector 6 is sandwiched between the semiconductor chip 3 and the printed wiring board 2, and as shown in FIG.
By applying pressure and heat to the thin film connector 6 through the supporters 61, the supporters 61 are permanently joined.

【0029】そのとき印加される熱で半導体チップ3と
薄膜コネクタ6、薄膜コネクタ6と印刷配線基板2が接
合されると共に、溶融して錐状孔63の狭口64から外に押
し出された導電性ボール62によって接続ピン31と電極21
の間が電気的に接続される。
The semiconductor chip 3 and the thin film connector 6 and the thin film connector 6 and the printed wiring board 2 are joined by the heat applied at that time, and the conductive material melted and extruded out of the narrow opening 64 of the conical hole 63. Connection pin 31 and electrode 21 by conductive ball 62
Are electrically connected.

【0030】例えば、耐熱性のポリイミドフィルムから
なるサポータ61は 200℃の熱を10分印加することによ
って仮接合され、2.0MPAの圧力を加え 270℃の熱を1分
印加するとサポータの本接合や半導体チップの印刷配線
基板への接合が行われる。
For example, the supporter 61 made of a heat-resistant polyimide film is temporarily joined by applying 200 ° C. heat for 10 minutes. When a pressure of 2.0 MPa is applied and the 270 ° C. heat is applied for 1 minute, the supporter 61 is completely bonded. The bonding of the semiconductor chip to the printed wiring board is performed.

【0031】また、熱硬化性接着材中にハンダボールを
分散させる従来の方法では導電性ボールの間隔が 100μ
m 程度必要であるが、 KrFエキシマレーザ等による錐状
孔63の形成は高精度化が可能で導電性ボールの間隔を30
μm 程度にまで縮小できる。
In the conventional method of dispersing solder balls in a thermosetting adhesive, the distance between conductive balls is 100 μm.
m, but the formation of the conical hole 63 using a KrF excimer laser or the like can be performed with high precision and the spacing between the conductive balls should be 30
It can be reduced to about μm.

【0032】このように接着フィルムに斜面で囲まれフ
ィルムを貫通する複数の錐状孔を設けたサポータと、ハ
ンダまたは導電性樹脂で形成され粒径が錐状孔の狭口よ
り大きい複数の導電性ボールとを具え、2枚のサポータ
が有する錐状孔の広口側を対向させて形成された空間に
導電性ボールを嵌挿し、サポータ同士を仮接合して錐状
孔間に導電性ボールを挟持した本発明の薄膜コネクタに
よって、ハンダボールの間隔が高精度に制御され接続ピ
ンの配列ピッチを縮小することが可能になる。
A supporter having a plurality of conical holes penetrating the film surrounded by a slope in the adhesive film and a plurality of conductive members formed of solder or conductive resin and having a particle size larger than the narrow opening of the conical holes. The conductive balls are inserted into the space formed with the wide-open sides of the conical holes of the two supporters facing each other, and the supporters are temporarily joined to form a conductive ball between the conical holes. With the thin film connector of the present invention sandwiched between the solder balls, the interval between the solder balls is controlled with high precision, and the arrangement pitch of the connection pins can be reduced.

【0033】しかも、印刷配線基板に実装された半導体
チップは全面が異方性導電フィルムを介して印刷配線基
板に接しており、熱伝導率の高い熱可塑性接着材を用い
ることによって半導体チップにおいて発生した熱を効率
よく逃がすことができる。即ち、配列ピッチを縮小し接
続ピン数の増加させると共に放熱効率の向上を図った実
装方法を実現することができる。
Moreover, the entire surface of the semiconductor chip mounted on the printed wiring board is in contact with the printed wiring board via the anisotropic conductive film, and is generated in the semiconductor chip by using a thermoplastic adhesive having a high thermal conductivity. The heat generated can be efficiently dissipated. That is, it is possible to realize a mounting method in which the arrangement pitch is reduced, the number of connection pins is increased, and the heat radiation efficiency is improved.

【0034】[0034]

【発明の効果】上述の如く本発明によれば配列ピッチを
縮小し接続ピン数の増加させると共に放熱効率の向上を
図った実装方法を提供することができる。
As described above, according to the present invention, it is possible to provide a mounting method in which the arrangement pitch is reduced, the number of connection pins is increased, and the heat radiation efficiency is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明になる薄膜コネクタを示す側断面図で
ある。
FIG. 1 is a side sectional view showing a thin film connector according to the present invention.

【図2】 本発明になる薄膜コネクタの他の実施例を示
す側断面図である。
FIG. 2 is a side sectional view showing another embodiment of the thin film connector according to the present invention.

【図3】 本発明になる実装方法を示す側断面図であ
る。
FIG. 3 is a side sectional view showing a mounting method according to the present invention.

【図4】 従来の実装方法を示す側断面図である。FIG. 4 is a side sectional view showing a conventional mounting method.

【符号の説明】[Explanation of symbols]

2 印刷配線基板 3 半導体チップ 6 薄膜コネクタ 21 電極 31 接続ピン 61 サポータ 62 導電性ボール 63 錐状孔 64 狭口 65 広口 66 薄膜ハンダ層 67 ハンダ層 2 Printed wiring board 3 Semiconductor chip 6 Thin film connector 21 Electrode 31 Connection pin 61 Supporter 62 Conductive ball 63 Conical hole 64 Narrow opening 65 Wide opening 66 Thin solder layer 67 Solder layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 横内 貴志男 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (56)参考文献 特開 平5−251505(JP,A) 特開 平4−312774(JP,A) 特開 平5−6920(JP,A) 特開 平4−19971(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 311 H01L 23/12 H05K 1/18 H05K 3/32 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Takashi Yokouchi 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-5-251505 (JP, A) JP-A-4- 312774 (JP, A) JP-A-5-6920 (JP, A) JP-A-4-19971 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/60 311 H01L 23/12 H05K 1/18 H05K 3/32

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 耐熱性接着フィルムに斜面で囲まれ該フ
ィルムを貫通する複数の錐状孔(63)が形成されたサポー
タ(61)と、ハンダまたは導電性樹脂で形成され粒径が該
錐状孔(63)の狭口(64)より大きい複数の導電性ボール(6
2)とを具え、 2枚のサポータ(61)が有する該錐状孔(63)の広口(65)側
を対向させて形成された空間に該導電性ボール(62)を嵌
挿し、該サポータ(61)同士を仮接合して該錐状孔(63)間
に該導電性ボール(62)を挟持してなることを特徴とする
薄膜コネクタ。
1. A supporter (61) which is surrounded by a slope on a heat-resistant adhesive film and has a plurality of conical holes (63) penetrating the film, a supporter (61) formed of solder or conductive resin and having a particle diameter of A plurality of conductive balls (6
2), and the conductive ball (62) is inserted into a space formed with the wide-opening (65) sides of the conical holes (63) of the two supporters (61) facing each other. (61) A thin-film connector characterized by comprising temporarily bonding the conductive balls (62) between the conical holes (63).
【請求項2】 耐熱性接着フィルムに斜面で囲まれ該フ
ィルムを貫通する複数の錐状孔(63)が形成されたサポー
タ(61)と、該サポータ(61)に被着した薄膜ハンダ層(66)
から狭口(64)を通し錐状孔(63)内に成長させたハンダ層
(67)を有し、 該錐状孔(63)の広口(65)が対向するよう2枚の該サポー
タ(61)を重ね仮接合してなることを特徴とする薄膜コネ
クタ。
2. A supporter (61) in which a plurality of conical holes (63) penetrating the heat-resistant adhesive film and surrounded by a slope are formed, and a thin-film solder layer ( 66)
Layer grown in a conical hole (63) through a narrow opening (64)
(67) A thin film connector comprising two supporters (61) overlapped and temporarily joined so that the wide ports (65) of the conical holes (63) face each other.
【請求項3】 請求項1または請求項2記載の薄膜コネ
クタ(6) を半導体チップ(3) と印刷配線基板(2) とで挟
み、該半導体チップ(3) を介して該薄膜コネクタ(6) に
圧力を加え加熱することでサポータ(61)間を本接合し、
且つ、該サポータ(61)を介して該半導体チップ(3) を該
印刷配線基板(2) に接合すると共に、 導電性ボール(62)またはハンダ層(67)を溶融させて錐状
孔(63)の狭口(64)から該薄膜コネクタ(6) の外に押し出
し、該半導体チップ(3) の接続ピン(31)を該印刷配線基
板(2) の電極(21)に接続することを特徴とする薄膜コネ
クタを用いた半導体チップの実装方法。
3. The thin-film connector (6) according to claim 1 or 2 is sandwiched between a semiconductor chip (3) and a printed wiring board (2), and the thin-film connector (6) is inserted through the semiconductor chip (3). ), The supporter (61) is fully joined by applying pressure and heating.
Further, the semiconductor chip (3) is joined to the printed wiring board (2) via the supporter (61), and the conductive ball (62) or the solder layer (67) is melted to form the conical hole (63). ) Is pushed out of the thin-film connector (6) from the narrow opening (64), and the connection pins (31) of the semiconductor chip (3) are connected to the electrodes (21) of the printed wiring board (2). A semiconductor chip mounting method using a thin film connector.
JP3511294A 1994-03-07 1994-03-07 Thin film connector and semiconductor chip mounting method using the same Expired - Lifetime JP3316998B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3511294A JP3316998B2 (en) 1994-03-07 1994-03-07 Thin film connector and semiconductor chip mounting method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3511294A JP3316998B2 (en) 1994-03-07 1994-03-07 Thin film connector and semiconductor chip mounting method using the same

Publications (2)

Publication Number Publication Date
JPH07245327A JPH07245327A (en) 1995-09-19
JP3316998B2 true JP3316998B2 (en) 2002-08-19

Family

ID=12432858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3511294A Expired - Lifetime JP3316998B2 (en) 1994-03-07 1994-03-07 Thin film connector and semiconductor chip mounting method using the same

Country Status (1)

Country Link
JP (1) JP3316998B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09153516A (en) * 1995-11-30 1997-06-10 Sumitomo Bakelite Co Ltd Semiconductor device and ic chip inspecting method
JP5018399B2 (en) * 2007-10-26 2012-09-05 富士通株式会社 Circuit board manufacturing method

Also Published As

Publication number Publication date
JPH07245327A (en) 1995-09-19

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