JP3307736B2 - Image data transfer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION This invention relates to an image data transfer OkuSo location, and more particularly, when transferring video to the display memory, any portion of the image data to the display memory in scaled linearly transfer for the image data transfer OkuSo location which to perform the.

[0002]

2. Description of the Related Art Conventionally, when transferring an image to a display memory, a clock obtained by dividing a clock for reading data by N is applied to a clock for writing data, or a clock applied to a counter for reading data. There is an image data transfer method in which transfer is performed with reduction or enlargement depending on whether a clock for data writing divided by N is given to the data.

FIG. 7 is a block diagram of a conventional image data transfer apparatus. In the figure, 31 is a decoder (video signal → digital RGB), 32 is a frequency divider, 33 is an X-axis address counter, and 34 is a frequency divider. , 35 are Y-axis address counters, 36
Is a V-RAM access controller, 37 is a V-RAM
It is. Reduction is performed based on a dot clock generated by the decoder 31 (a clock generated using a PLL based on a horizontal synchronization signal) and an RGB digital signal of an image based on the dot clock.

[0004] First, a dot clock from the decoder 31 is input to a frequency divider 32 and divided by an arbitrary frequency dividing ratio. At this time, if the frequency division is not performed, the dot clock and the count value of the X-axis address counter 33 correspond to one-to-one and are written to the V-RAM 37 by the V-RAM access controller 36 without being reduced. For example, 2
In the case of frequency division, since the dot clock and the count value of the counter correspond to two to one, only one write operation and address count-up are performed for every two dot clocks. Means that the data reduced to 1/2 has been transferred.

The above description relates to the reduction in the X-axis direction. In the Y-axis direction, the clock supplied to the frequency divider 34 is not a dot clock but an X-axis address counter 33.
(A pulse generated when the X-axis data ends and moves to the next lower line, even if the horizontal synchronization signal is picked up from the decoder 31)
The basic operation is exactly the same. Although not shown, the X-axis address counter is cleared at the timing of the horizontal synchronization signal, and the Y-axis address counter is cleared at the timing of the vertical synchronization signal.

[0006]

As described above, in a conventional image data transfer apparatus, an arbitrary position and an arbitrary length can be set.
It is not possible to linearly define the magnification of enlargement / reduction over a range of, for example, 0.7 times, 0.8 times, 0.9 times, 1 time, 1.times.
And so, such as 1-fold, rather it is fine specified, and, expansion
There is a problem that it is not possible to perform both large and small scales .

The present invention has been made in view of such circumstances, and has an address counter for reading video data.
(That is, the digital image data is read from the decoder.
And a write address counter (that is, a counter for writing to the line memory).
The read image data is read out, and the display memory VR is read.
Count-up control of AM)
(That is, enlargement / reduction control) can be set arbitrarily as necessary.
A memory for enlargement / reduction control that can be set
And by, on the basis of the content of the 該制patronage memory, and its object is to provide an image data transfer OkuSo location that makes it possible to control arbitrarily in each dot.

[0008]

Means for Solving the Problems The present invention, in order to achieve the above object, the decoders that convert the digital signals (1) the input video signal, the output from the decoder
A line memory write control unit for inputting digital signalized image data , and the line memory write control unit
Write instruction is a write address me by the control of
In, a line memory in which the image data is written, the
Reads image data written to the line memory
A display control unit for reading and inputting according to the
At the write address specified by the control of the control unit,
The image data read from the line memory is written
Image data having a display memory for displaying
In the data transfer device, the line memory is written in the X-axis direction.
Whether or not the writing address can be sequentially and automatically updated based on the dot clock obtained from the decoder is determined on the X-axis.
Over any number of dots at any dot position in the
Control to reduce the image data in the X-axis direction.
X-axis reduction operation unit for performing the operation , and the X-axis direction of the line memory
Of the read address from the display control unit.
Whether to automatically update sequentially based on the clock
At an arbitrary dot position in the X-axis direction for an arbitrary number of dots
Over a serial, by controlling the X-axis magnification control for performing expansion of the X-axis direction of the image data, the line memory
The stored image data of one line is transferred to the display control unit.
Enables writing to the display memory by control
No, at any line position in the Y-axis direction, any number of lines
By controlling over minutes, the Y of the image data is controlled.
The Y-axis reduction operation section that performs reduction in the axial direction and the next line
Image data to be written to the line memory is started.
1 line stored in the line memory
Of the same image data under the control of the display control unit.
To the next write address in the Y-axis direction of the display memory.
Even if the writing operation is performed on any line in the Y-axis direction
Repeat for any number of lines at a location
( 2 ) a control unit for controlling each of the operation units; a Y-axis enlargement operation unit for enlarging the image data in the Y-axis direction by controlling whether or not the image data is enlarged; in (1), the X-axis reduction operation unit, the decoders
A first dot counter which counts up based on the dot clocks derived pressurized et al, the line memory X
The write address in the axial direction is based on the dot clock.
X-axis reduction control data indicating whether or not automatic updating is possible
Data in the line memory under the control of the control unit.
Any address corresponding to the axis write address
Writable and said first dot counter
Is stored at the address indicated by the counter value output from
X-axis reduction control data can be sequentially read out.
And X-axis reduction control serial memory that can, the X-axis reduction control read et whether the X-axis reduction control serial memory
Automatic update based on the dot clock according to data
Is determined by determining whether the X-axis
Be composed of a line memory address counter which generates the write address direction, further, (3) the
In (1) or (2) , the X-axis enlargement operation unit includes:
Count-up operation based on the display dot clock
And X-axis address counter sequentially generating the group <br/> quasi address in the X-axis direction for writing to the display memory by the previous
The read address of the line memory in the X-axis direction is
Automatic update based on the display dot clock
The X-axis enlargement control data indicating the propriety is transmitted to the control unit
Read address in the X-axis direction of the line memory.
Can be written to any address corresponding to the
The counter output from the X-axis address counter
For the X-axis enlargement control stored at the address indicated by the value
Sequentially serial memory for X-axis expansion control data can be read, read from the X-axis expansion control serial memory
According to the detected X-axis enlargement control data,
Determines whether automatic updating is possible based on the display dot clock
This makes it possible to read the line memory in the X-axis direction.
A second dot counter for generating a dress ; and ( 4 ) in any one of the above (1) to (3) , wherein the Y-axis reduction operation unit is a line memory. To
Completion of the operation to store one line of image data
Line counter that counts the line clock that indicates
And the image data for one line stored in the line memory.
Indicates whether data can be written to the display memory.
The Y-axis reduction control data is stored in the previous
Corresponding to the write address in the Y-axis direction of the display memory.
Can be written to any address
Address indicated by the counter value output from the in-counter
Sequentially read the Y-axis reduction control data stored in the
A serial memory for Y-axis reduction control
The Y read from the Y-axis reduction control serial memory.
Write to the display memory according to the axis reduction control data.
By determining whether or not the writing operation is possible, the display menu is displayed.
Y-axis for generating a reference write address in the Y-axis direction of the memory
And ( 5 ) the address counter.
(1) In any one of (1) to (4), the Y-axis enlargement operation unit may store one line of image data in the line memory.
A line clock indicating that the operation of storing
The line counter to count and the image for the next line
Until image data starts to be written to the line memory
During the period, the same amount of data for one line stored in the line memory is stored.
One image data is written next to the display memory in the Y-axis direction.
Operation for repeatedly writing to the embedded address
The Y-axis enlargement control data indicating the availability is transmitted to the control unit.
The write address in the Y-axis direction of the display memory.
Can be written to any address corresponding to the
In addition, the counter value output from the line counter is displayed.
The Y-axis enlargement control data stored at the address
Can be read out sequentially.
Memory and read from the Y-axis enlargement control serial memory.
Based on the Y-axis enlargement control data
Repeated writing to the next address in the Y-axis direction of the memory
By deciding whether or not to operate, the display memory
Y-axis address for generating reference write address in Y-axis direction
And a counter .

[0009]

The read address counter (that is, the line address)
Memory address counter) and a write address counter (ie, a read address from the line memory ).
Because you can specify a count-up control of generating the second dot counter that) optionally in dot units and linear scaling in real time, i.e., 0.7 times, 0.8 times,
An arbitrary enlargement / reduction ratio such as 0.9 times, 1 time, or 1.1 times can be set, and the enlarged / reduced image data is stored in an arbitrary position on the display memory in an arbitrary size (dot). The size can be specified in units). Furthermore, since performed independently count-up control of the read address counter and an address counter for writing, when the paste it in the display memory scaling to the image data, some parts are enlarged, and there parts and the reduction and expansion to the condition, such as reduction and displays can be mixed.

[0010]

Embodiments will be described below with reference to the drawings. FIGS. 1 and 2 are block diagrams for explaining an embodiment of an image data transfer apparatus according to the present invention, and are system blocks for transferring video data while scaling. In the figure, 1 is a dot counter, 2 is a serial memory for X-axis reduction control, 3 is a line memory address counter,
4 is a decoder (video signal → digital RGB), 5 is a line memory write control unit, 6 and 7 are line memories (buffer memories), 8 is a line counter, 9 is a Y-axis reduction control serial memory, 10 is a dot counter, 11
Is a serial memory for Y-axis enlargement control, 12 is a serial memory for X-axis enlargement control, 13 is a Y-axis counter enable control unit, 14 is a Y-axis address counter, 15 is a Y-axis write start position, 16 is an X-axis address counter, 17 is an X-axis writing start position, 18 is a comparator, 19 is a Y-axis display position correction adder, 20 is a comparator, 21 is an X-axis display position correction adder, 22 is the number of Y-axis writing dots, 2
3 is the number of dots written on the X axis, 24 is the X and Y axis coordinate synthesizing unit, 25 is a V-RAM access controller, and 26 is V
-RAM (display memory).

A line which is a read address counter
Memory address counter 3 and Y-axis address counter 1
4 is a counter for performing a reduction operation (reduction is
When the read address is generated, the count-up of the address counter is stopped at an arbitrary data position, so that the data is read over the same address in the line memories 6 and 7 or the display memory V−
A read operation to the RAM 26 is thinned out to perform a reduction operation), and an X-axis address which is a write address counter is used.
The scale counter 16 and the Y-axis address counter 14 are counters for performing an enlargement operation (expansion is performed when image data is written to the display memory V-RAM 26 when data is written).
The counting of the read address counters of the line memories 6 and 7 for reading the data is stopped, and the display memory V-
A plurality of dots of the RAM 26 or a display memory V-
Speed up the increment of the write address counter to RAM 26
Before reading the next line data, the display memory V
A plurality of lines of -RAM26, realized by output the same data). The Y-axis address counter 14
This is a counter for performing both enlargement and reduction operations.
The counter used when performing the reduction operation is a read address counter, and it is a counter that operates when reading the data that is sent in order. This is a counter for operating a write destination address when writing data to be written.

The decoder 4 converts an input video signal into digital signal image data . The line memory write controller 5 receives the output signal of the decoder 4 and writes image data to the line memories 6 and 7. The X-axis reduction operation units 1, 2, and 3 are written by the line memory writing control unit 5.
The write addresses of the line memories 6 and 7
Based on the dot clock obtained from the decoder 4
Whether or not the automatic update can be performed sequentially
In preparative position, over several minutes any dots, from <br/> to control, performs a reduction in the X-axis direction of the image data, the line memory 6 through the line memory write control section 5,
7 stores the reduced data. X-axis enlargement operation unit 10, 1
2, 16, 17, 20, 21, 23 are line memories
The read addresses 6, 7 are assigned to the display control unit, that is, V-RA.
Display dot clock from the M access controller 25
(Ie, the writing dot clock shown in FIG. 1).
Whether or not to automatically update sequentially in the X-axis direction
At the dot position of for an arbitrary number of dots
Thus, the image data stored in the line memories 6 and 7 is read, and the image data is enlarged in the X-axis direction. The Y-axis reduction operation units 8, 9 , and 14 include a line memory 6,
7 is stored in the display control unit.
That is, under the control of the V-RAM access controller 25,
Performing the operation of writing to the display memory V-RAM 26
Whether or not it is possible to determine whether or not any line
By controlling for several minutes, the image data is reduced in the Y-axis direction, and the Y-axis enlargement operation units 8, 11 , and 14 are reduced.
Is the image of one line stored in the line memories 6 and 7.
The data is transferred to a display control unit, that is, a V-RAM access control.
The display memory V-RAM 26 under the control of the
Operation at any line position in the Y-axis direction
Controlling the possibility of repeating over several minutes
Thus, the image data is enlarged in the Y-axis direction. display
The control unit, that is, the V-RAM access controller 25
PU (microprocessor), display memory V-RA
M26 not display control only, constitute also a control unit for controlling each of the respective operating unit that operates independently
You. The display memory V-RAM 26 is a display control unit, that is, V-RAM.
The image data is connected to the RAM access controller 25 and the scaled data of the image data is transferred.

The operation of the video data will be described with reference to FIGS. 1 and 2 in accordance with the flow in which video data is reduced and enlarged and transferred. The video input source is NTSC (National
Television System Committee color system) Video signal. The video signal is decomposed by the decoder 4 into digital RGB signals and input to the line memory write control unit 5. The line memory writing control unit 5 writes data to the line memories 6 and 7. At this time, an operation related to reduction is performed according to the following procedure.

Dot counter 1 (that is, the first dot counter)
Counter) is the dot clock obtained from the decoder 4.
Is performed regularly count up me along. Line memory address counter 3, line counter 8, dot counter 10 composed of a normal synchronous counter
The same applies to the Y-axis address counter 14 (that is, the second dot counter) . The dot counter 1 (immediately
Chi, count address first dot counter) is generated, and the address of the X-axis reduction control serial memory 2
Output . The X-axis reduction control serial memory 2 includes:
In response to said address input and outputs a 1-bit data, the write address of the contents of the X-axis reduction control serial memory 2 (i.e., to the line memories 6 and 7
Automatically updating based on the dot clock.
X-axis reduction control data indicating whether or not control is possible
The MPU (microprocessor) forming the part,
Any address (ie, writing to line memories 6 and 7)
(Arbitrary address corresponding to the address) . The same applies to the Y-axis reduction control serial memory 9, Y-axis expansion control serial memory 11, and X-axis expansion control serial memory 12. The capacity of the X-axis reduction control serial memory 2 requires bits (address space) corresponding to the number of X-coordinate dots of an input image.

The count-up control of the line memory address counter 3 is performed based on the data from the X-axis reduction control serial memory 2. The data output from the X-axis reduction control serial memory 2 is a line memory. It is connected to the count enable signal of the address counter 3 and can arbitrarily thin out arbitrary dot data. That is, X-axis reduction of the X-axis reduction control serial memory 2
Active data as a small control data (i.e., Haile
When "1" indicating a bell is read, the line memory address counter 3 becomes active and the next dot is read.
Count up in the door clock (ie, automatic update) is,
On the other hand, X-axis reduction control of the serial memory 2 for X-axis reduction control
Negative data as use data (ie, the low level
In the case shown, "0") is read, the line memory address counter 3 becomes negative, the line memory address counter 3 also comes the next dot black <br/> click is not counted up. Thus, when the line memory address counter 3 has not been counted up, to become the next data is written to the same address of the server Ffamemori 6,7, the negative data is the line memory address counter 3 , The video data obtained simultaneously with that data is thinned out, and the video data is thinned out and reduced.

FIGS. 3 and 4 are diagrams for explaining the above-mentioned operation in an easy-to-understand manner. FIGS. 3 (a) to 3 (e) are timing charts at the time of reduction, that is, the basic operation of reduction transfer in the X-axis direction. FIG. 4 is a timing chart illustrating the contents of the buffer memory at the time of reduction, that is, the buffer memories, ie, the line memories 6 and 7 as a result of the reduction transfer.
FIG. 9 is a diagram showing how video data is captured with respect to FIG.

The image data read from the decoder 4 shown in FIG. 3B is sent in synchronization with the dot clock shown in FIG.
Orderly counts, the X-axis reduction control data corresponding to each dot from the X-axis reduction control serial memory 2,
The data is sequentially read out according to the control memory address shown in FIG. The line memory address counter 3 counts up based on the X-axis reduction control data, but the count-up (ie, automatic update) is prohibited by the X-axis reduction control data shown in FIG. In this case, since the counting is not performed as indicated by the buffer address in FIG. 3 (e), the dot data of the portion where the counting was not performed is stored in the buffer memory, that is, the line memory.
It is not written to the li and li . That is, as shown in FIG.
Are shown in "B + 1", "B + 4", "B + 8" shown in FIG. 3 (e)
The read data “D1” in FIG.
“D5 and D6” and “D11” are thinned out. X-axis reduction control of the X-axis reduction control serial memory 2
The data is used not only to prohibit the count-up of the line memory address counter 3 but also as a signal for prohibiting writing so as not to generate a useless writing cycle.

[0018] Even without writing is prohibited, Rye
Memory address counter 3 counts up (ie,
Dot data not automatically updated) is stored in the buffer memo.
Although only valid dot data is overwritten at the same address in the line memories 6 and 7, there is no actual harm to the X-axis access with the buffer memory, but there is no waste in the Y-axis access without the buffer memory. When the access is performed, the MPU or the like correspondingly accesses the display memory V-RAM 26.
Time for access to is, so would reduced by the amount to be written twice, wasteful access are not be performed. By a series of these operations, as shown in FIG. 4, the input image data is reduced (specified bits are thinned out) and buffer memories, ie, line memories 6 and 7 are reduced.
Is stored in.

The reason why there are two line memories 6 and 7 is that the input video signal and the display memory have different read and write speeds, and are provided to absorb the speed difference. It is. This line memory is necessary and not special even in a transfer device that does not perform a normal enlargement / reduction operation.

Next, a buffer memoryThat is, line memory
Display memory from 6,7V-RAMData is transferred to 26
In the following procedure, enlargement processing in the X-axis direction is performed according to the following procedure.
Will be Transfer data from buffer memories 6 and 7
The counter used as the reference is an X-axis address counter 16
And the X-axis address counter 16 isDisplay control section
The display from the V-RAM access controller 25
Dot clock (ie, the writing dot shown in FIG. 1)
Clock)Always count up regularly(Automatic
update)The operation of the display memoryV-RAMWritten on 26
Generate a reference address for writing. X-axis address
The reference address generated by the counter 16 is the X-axis display position.
In the position correction adder 21, the X-axis writing start position 1
7 plusIn the display memory V-RAM 26X
This is the coordinate value of the axis. This is displayed when transferring to the display screen.
This is for setting the display position arbitrarily.

The value of the X-axis address counter 16 is
It is also input to the comparator 20 and is compared with the X-axis write dot number 23. This is the display memory V-RAM 2
6 controls how many dots of video data are written in the X-axis direction. Further, the address value of the X-axis address counter 16 is also input as the address value of the X-axis enlargement control serial memory 12. X read from the X-axis enlargement control serial memory 12
The axis expansion control data is stored in the buffer memory ,
The read addresses of the addresses 6 and 7 are
Indicates whether or not automatic updating is possible based on the
MPU (microprocessor) constituting the control unit
Depending on an arbitrary address (ie, line memory).
(Arbitrary addresses corresponding to read addresses 6 and 7)
Can be written to. Serial memo for X-axis expansion control
Li 12, <br/> dot counter 10 indicating a read address for reading the image data from the buffer memory or line memories 6 and 7 (i.e., the second dot counter) is connected to the enable terminal of the According to the content of the X-axis enlargement control data , the display dot clock is used.
In this case, whether or not the automatic update is possible is determined, and the count-up control of the dot counter 10 is performed, whereby the enlargement operation is performed.

FIGS. 5 and 6 are diagrams for explaining the above-mentioned operation in an easily understandable manner. FIGS. 5A to 5E are timing charts at the time of enlargement, that is, basic operations of the enlargement transfer in the X-axis direction. FIG. 6 is a diagram showing the contents of the display memory at the time of enlargement, that is, how the result of the enlargement transfer is written to the display memory V- RAM 26 in an easy-to-understand manner. is there.

The write control memory address and write memory address shown in FIG. 5B correspond to the write dot clock (ie, the display dot clock) shown in FIG.
The write control memory address is a dot counter 10 (ie, the second dot) which is a write counter.
Indicates the address of the X-axis expansion control serial memory 12 stored the X-axis expansion control data for controlling the Tokaunta), whereas, the write memory address X-axis address Ca
And the output of the display memory V-RA.
Indicates a memory address for writing to M26 . The write control memory address read from the address indicated, X-axis expansion control data for controlling the write counter or dot counter 10 for reading the write data from the line memory 6, 7, FIG. 5 (c ) Is the write control memory data .
If the memory data is active data (ie, high level
In the case of "1" shown in FIG.
The counter 10 counts up orderly (that is, the display
Automatically updated according to the dot clock) , and the data is transferred as it is.

The write control memory data isNegative
Data (ie, "0" indicating low level)At the timetable
In the display memory V-RAM 26The data to writeLa
From in-memory 6,7To readDotcounter1
0Address,That is,Reading of FIG. 5 (d)OutBuffalo
Because the dress does not count up,Display memory
To the V-RAM 26Write data is, Line memory
6,7NextAddress dataDo not go to. Therefore, X
At any address in the axis expansion control serial memory 12
The X-axis enlargement control data to negative data
It is possible to write to the line memories 6 and 7Data
Transfer by hanging anywhereIs possible. Immediately
As shown in FIG. 6, “E + 1” and “E +” in FIG.
5C corresponding to the periods indicated by “4” and “E + 8”.
+1, C + 2 "," C + 5, C + 6, C + 7 "," C + 1
1, C + 12 "5 (e)As the same data
"D1" "D4" "D8", Respectively, display memory
V-RAM 26To consecutive write addressesrepetition
handThe written data is transferred. Toes
AndTo the display memory V-RAM 26Write memory
dressX-axis address counter 16 indicatingButThe display window
According to the clockCount up regularly
Where the data to be writtenLine memo
On li 6,7By sending it while hanging at any position
Ri (readOutCounterThat is, the dot counter 10Any
By stopping at the position), sending the same data multiple times,
You are performing an enlargement operation. As a result, as shown in FIG.
To the write address (the address actually written)
Data (expanded data) is enlarged and transferred
You.

The enlargement / reduction transfer in the Y-axis direction is basically performed in the same manner. However, it should be noted that since the input signal is input in interlace, the initial value of the Y-axis line counter 8 is set to 0 and 1 in the odd field and the even field. In this case, it is necessary to insert a dummy count assuming that the even field data follows the odd field data.

The operation of enlarging / reducing in the Y-axis direction will be briefly described below. As for the enlargement, an operation for accelerating the count-up of the Y-axis address counter 14 and the line counter 8 based on the Y-axis enlargement control data of the Y-axis enlargement control serial memory 11 is performed. After that, the serial memory for Y-axis enlargement control
11 of the Y-axis expansion control data is active data (immediate
Chi is showing a high level "1"), when written to perform a count-up extra, until the next line data is sent, by further advancing the count-up, a further transfer operation And display memory V
-Enlargement operation is performed by writing the same line data over a plurality of lines in the RAM 26 as well. That is, the Y axis
The enlargement control data is the image data for the next line.
Before writing to the line memories 6 and 7 starts,
Same for one line stored in line memories 6 and 7
Display the image data at the next address of the display memory V-RAM 26
Indicates whether or not the operation of repeatedly writing to
Thus, the Y-axis expansion is controlled by the control of the MPU constituting the control unit.
Any address of the large control serial memory 11 (ie,
Write address in the Y-axis direction of the display memory V-RAM 26
Write arbitrary data to any address corresponding to
Can be included. Thus, one line of image data is
Indicates that the operation of storing in line memories 6 and 7 is completed.
Line clock (ie, for the line count shown in FIG. 2)
The clock indicated by the line counter 8 that counts the clock
Serial memo read for Y-axis enlargement control
Display memo based on the Y-axis enlargement control data
Re-determined whether repetitive write operation to V-RAM 26 is possible
By setting, the Y-axis of the display memory V-RAM 26
Y-axis address counter that outputs the write address in the direction
Data is automatically updated in line with the line clock
To generate a write address, or
Image data is written to the line memories 6 and 7 and opened.
Before starting, regardless of the line clock,
To write to the next address
Perform one of the operations. Here, early next address
When the line counter 8 is updated,
Serial memory for Y-axis expansion control
The read operation of the address next to 11 is started, and Y of the image is started.
Control is performed so that axial expansion is performed continuously.

For the reduction , the Y-axis address counter 14 and the V-RAM access controller 25 are used based on the Y-axis reduction control data in the Y-axis reduction control serial memory 9.
Is controlled to perform a reduction operation by thinning out writing of unnecessary line data. At this time, the thinned line is not written twice, and during that time, the access to the display memory V- RAM 26 is stopped, thereby reducing the MPU access time.
Allocate more time, the display memory V-RAM
26 to improve the throughput of the MPU. Immediately
The Y-axis reduction control data is stored in the line memories 6 and 7.
The stored image data for one line is stored in a display memory.
This indicates whether or not an operation of writing to the V-RAM 26 is possible.
Control of the MPU constituting the control unit reduces the Y-axis.
Any address of the small control serial memory 9 (that is,
Address in the Y-axis direction of the display memory V-RAM 26
Write arbitrary data to any address corresponding to
Can be taken. Thus, one line of image data is
Indicates that the operation of storing in in-memory 6 and 7 is completed.
The line clock (ie, the line count clock shown in FIG. 2)
The count indicated by the line counter 8 that counts the lock
Memory for Y-axis reduction control read by data value
9 based on the Y-axis reduction control data of No. 9
-To determine whether a write operation to the RAM 26 is possible or not
From the display memory V-RAM 26 in the Y-axis direction.
The Y-axis address counter 14 that outputs the
Naturally, writing and updating automatically with the line clock
Generate an address or stop automatic renewal
Then, the access to the display memory V-RAM 26 is stopped.
Perform one of the following operations. As described above, the transfer operation is performed while scaling.

[0028]

As is apparent from the above description, according to the present invention, since the enlargement / reduction of image data is performed in dot units , the enlargement / reduction ratio can be arbitrarily set finely.
Can further each operation unit that controls the scaling each other
Since it is possible to operate independently, it is possible to mix enlargement and reduction, so that there is no limitation on magnification and the like as in the past, and interpolation processing and the like can be performed in advance because the next processing can be read ahead. Furthermore, since scaling can coexist, various special processes can be easily performed only by rewriting the memory for counter control.

[Brief description of the drawings]

FIG. 1 is a configuration diagram (part 1) for explaining an embodiment of an image data transfer device according to the present invention;

FIG. 2 is a configuration diagram (part 2) illustrating an embodiment of an image data transfer device according to the present invention.

FIG. 3 is a timing chart when image data is reduced in the X-axis direction in the present invention.

FIG. 4 is a diagram showing the contents of a buffer memory when image data is reduced in the present invention.

FIG. 5 is a timing chart when the image data is enlarged in the X-axis direction in the present invention.

FIG. 6 is a diagram showing the contents of a display memory when image data is enlarged in the present invention.

FIG. 7 is a diagram for explaining a conventional image data transfer device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Dot counter, 2 ... X-axis reduction control serial memory, 3 ... line memory address counter, 4 ... decoder (video signal → digital RGB), 5 ... line memory write control unit, 6, 7 ... line memory (buffer memory) ), 8 ... line counter, 9 ... serial memory for Y-axis reduction control, 10 ... dot counter, 11 ... serial memory for Y-axis enlargement control, 12 ... serial memory for X-axis enlargement control, 13 ... Y-axis counter enable control unit , 14 ... Y-axis address counter, 15 ... Y-axis writing start position, 16
... X-axis address counter, 17 ... X-axis write start position, 18 ... comparator, 19 ... Y-axis display position correction adder, 20 ... comparator, 21 ... X-axis display position correction adder, 22 ... Y-axis write dot Number, 23: Number of dots written on the X axis, 24: X and Y axis coordinate synthesizing unit, 25: V-
RAM access controller, 26... V-RAM (display memory).

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) G09G 5/00 H04N 5/262 H04N 1/393

Claims (5)

(57) [Claims] 1. An input video signal is converted into a digital signal.
And a digital signal output from the decoder.
Line memory to input image data converted to
Writing control unit and control of the line memory writing control unit
The write address specified by the write
A line memory to which image data is written,
The image data written to the memory is
A display control unit that reads and inputs the same
Write to the write address specified by the control.
The image data read from the memory
Data transfer device having a display memory for displaying
The write address of the line memory in the X-axis direction.
Dress to the dot clock obtained from the decoder
Whether or not to automatically update based on the X-axis
Control at an arbitrary dot position for an arbitrary number of dots.
X-axis to reduce image data in the X-axis direction
Reduction operation unit and reading of the line memory in the X-axis direction
The address is displayed by the display dot clock from the display control unit.
Whether or not to automatically update sequentially based on the
Over any number of dots at any dot position
Control to enlarge the image data in the X-axis direction.
An X-axis enlargement operation unit, and one line stored in the line memory
The image data for the IN is moved forward by the control of the display control unit.
Whether the operation of writing to the display memory is enabled or disabled
At any line position in any direction, over any number of lines,
By controlling, the image data is reduced in the Y-axis direction.
Axis operation unit for performing
Until the data is written to the line memory.
The same image for one line stored in the line memory
The image data is stored in the display menu under the control of the display control unit.
Write to the next write address in the
Operation is performed at an arbitrary line position in the Y-axis direction.
Controls whether to repeat over a desired number of lines
To enlarge the image data in the Y-axis direction.
A Y-axis enlargement operation unit, a control unit that controls each of the operation units,
Image data transfer apparatus characterized by having a. 2. An apparatus according to claim 1, wherein said X-axis reduction operation section is provided with said decoder.
Count up based on the dot clock obtained
The first dot counter to be performed and the X axis of the line memory
Direction write address based on the dot clock
X-axis reduction control data indicating whether or not Rukoto be automatically updated Te
The X axis of the line memory is controlled by the control unit.
Write to any address corresponding to the write address in the
And the first dot counter
Stored in the address indicated by the counter value output from the
X-axis reduction control data can be sequentially read out.
X-axis reduction control serial memory and X-axis reduction control
The X-axis reduction control data read from the serial memory.
The automatic update based on the dot clock
By determining whether or not the X-axis of the line memory is
Memory address for generating the write address for
2. The image data transfer device according to claim 1, further comprising a counter . 3. An X-axis magnifying operation unit, wherein the display dot is
Display by count-up operation based on clock
The reference addresses in the X-axis direction for writing to the
Next generation X-axis address counter and line memory
The read address in the X-axis direction of the
X-axis indicating whether or not to automatically update sequentially based on the
The enlargement control data is transmitted to the
A function corresponding to the read address in the X-axis direction of the in-memory
At any address, and the X-axis address
Address indicated by the counter value output from the dress counter
The X-axis enlargement control data stored in the
A serial memory for X-axis enlargement control
The X-axis expansion control read from the serial memory
According to the X-axis enlargement control data, the display dot
By determining whether to allow automatic updates based on
Generate a read address in the X-axis direction of the line memory
3. The image data transfer device according to claim 1, further comprising a second dot counter . 4. The operation in which the Y-axis reduction operation unit stores one line of image data in the line memory is completed.
Line cow counting line clock
And the one-line image stored in the line memory.
Whether writing operation of image data to the display memory is possible or not.
The Y-axis reduction control data shown in FIG.
The write address in the Y-axis direction of the display memory.
Can be written to any corresponding address, and
The value indicated by the counter value output from the line counter
The Y-axis reduction control data stored in the
Serial memory for Y-axis reduction control that can be read next
Read from the Y-axis reduction control serial memory.
The display memory according to the Y-axis reduction control data
By determining whether a write operation to the
Generate a reference write address in the Y-axis direction of the display memory.
That the image data transfer device according to any one of claims 1 to 3, characterized in that it consists of a Y-axis address counter. 5. The system according to claim 5, wherein the Y-axis enlargement operation unit is configured to control the line memo.
The operation of storing one line of image data in the memory is completed.
Line cow counting line clock
And the image data for the next line
Until the writing to memory starts, the line memo
Display the same image data for one line stored in the memory
The next write address in the Y-axis direction of the
Y-axis enlargement control that indicates whether repetitive writing is possible
The display data is stored in the display memo under the control of the control unit.
Any address corresponding to the write address in the
Address and the line counter
Is stored at the address indicated by the counter value output from
The Y-axis enlargement control data can be sequentially read out.
Serial memory for Y-axis enlargement control and Y-axis enlargement control
For the Y-axis enlargement control read from the serial memory
Based on the data, the next in the Y-axis direction of the display memory
It is necessary to determine whether or not the address can be repeatedly written.
With this, the reference writing in the Y-axis direction of the display memory is performed.
The image data transfer device according to any one of claims 1 to 4, further comprising a Y-axis address counter for generating an address .