JP3303639B2 - Method for producing copper-based lead material for semiconductor - Google Patents

Method for producing copper-based lead material for semiconductor

Info

Publication number
JP3303639B2
JP3303639B2 JP32302395A JP32302395A JP3303639B2 JP 3303639 B2 JP3303639 B2 JP 3303639B2 JP 32302395 A JP32302395 A JP 32302395A JP 32302395 A JP32302395 A JP 32302395A JP 3303639 B2 JP3303639 B2 JP 3303639B2
Authority
JP
Japan
Prior art keywords
semiconductor
temperature
annealing
lead material
elongation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP32302395A
Other languages
Japanese (ja)
Other versions
JPH09165658A (en
Inventor
洋二 三谷
照雄 草野
尚志 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
THE FURUKAW ELECTRIC CO., LTD.
Original Assignee
THE FURUKAW ELECTRIC CO., LTD.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by THE FURUKAW ELECTRIC CO., LTD. filed Critical THE FURUKAW ELECTRIC CO., LTD.
Priority to JP32302395A priority Critical patent/JP3303639B2/en
Publication of JPH09165658A publication Critical patent/JPH09165658A/en
Application granted granted Critical
Publication of JP3303639B2 publication Critical patent/JP3303639B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、内部残留応力が小
さくエッチング加工性に優れた半導体用銅系リード材の
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a copper-based lead material for semiconductors having a small internal residual stress and excellent etching workability.

【0002】[0002]

【従来の技術】半導体用リード材(リードフレーム等)
には、一般に銅合金や42アロイ等が用いられている。
前記半導体用リード材は、例えば、銅合金鋳塊を熱間圧
延した後、冷間圧延と中間焼鈍を繰返し、最終中間焼鈍
後の仕上げ調質圧延により所望の板厚に仕上げた後、伸
び率0.4%以上でテンションレベラーを掛けて形状を
修正し、次いでプレス又はエッチングにより所定形状に
加工して製造される。エッチング加工の際、ダイパット
部(半導体チップを接合する箇所)にディンプルを形成
して半導体チップの接合性を高めるようにしている。し
かし、このようなテンションレベラーで形状を修正する
方法では、内部残留応力が大きくなる為、エッチング加
工の際にダイパット部に反りが生じ、その反りが許容値
を超えると半導体チップの接合性が低下し、ワイヤーボ
ンディングの信頼性が著しく低下するという問題があっ
た。そこで、仕上げ調質圧延後、伸び率0.2%以上の
テンションレベラーを掛け、次いで低温焼鈍又は連続焼
鈍を施す方法、或いは低温焼鈍又は連続焼鈍後、更にテ
ンションレベラー又はローラーレベラーを掛ける方法が
提案された(実開昭63-86851号公報)。ここで、低温焼
鈍とはバッチ式低温焼鈍のことであり、連続焼鈍とは走
間焼鈍のことである。
2. Description of the Related Art Lead materials for semiconductors (lead frames, etc.)
In general, a copper alloy, a 42 alloy, or the like is used.
The semiconductor lead material is, for example, after hot rolling a copper alloy ingot, repeating cold rolling and intermediate annealing, after finishing to a desired thickness by finish temper rolling after final intermediate annealing, elongation rate It is manufactured by modifying the shape by applying a tension leveler at 0.4% or more, and then processing it into a predetermined shape by pressing or etching. At the time of etching, dimples are formed in the die pad portion (locations where the semiconductor chips are bonded) to improve the bonding property of the semiconductor chips. However, in the method of correcting the shape with such a tension leveler, since the internal residual stress increases, the die pad portion warps during the etching process, and if the warpage exceeds an allowable value, the bonding property of the semiconductor chip deteriorates. However, there has been a problem that the reliability of wire bonding is significantly reduced. Therefore, a method in which a tension leveler having an elongation of 0.2% or more is applied after finish temper rolling and then low-temperature annealing or continuous annealing is applied, or a method in which a tension leveler or roller leveler is applied after low-temperature annealing or continuous annealing is proposed. (Japanese Utility Model Application Laid-Open No. 63-86851). Here, low-temperature annealing refers to batch-type low-temperature annealing, and continuous annealing refers to annealing during running.

【0003】[0003]

【発明が解決しようとする課題】近年、電子機器の小型
化、高集積度化の一環として、半導体用リード材でも薄
肉化が進み、より内部残留応力の小さいリード材が要求
されるようになった。しかし、前記提案の方法によって
も、形状が良好で、且つ前記要求を満足するリード材を
安定して得ることは困難であった。このようなことか
ら、本発明者等は、内部残留応力を小さくする方法につ
いて研究を行い、テンションレベラーでの伸び率を低め
ても形状を良好に保持できることを知見し、更に研究を
重ねて本発明を完成させるに到った。本発明は、内部残
留応力が小さくエッチング加工性に優れた半導体用銅系
リード材の製造方法の提供を目的とする。
In recent years, as a part of miniaturization and high integration of electronic devices, lead materials for semiconductors have also become thinner, and lead materials having smaller internal residual stress have been required. Was. However, it has been difficult to stably obtain a lead material which has a good shape and satisfies the above-mentioned requirements even by the method proposed above. From these facts, the present inventors conducted research on a method of reducing internal residual stress, and found that the shape could be maintained well even when the elongation at the tension leveler was reduced. The invention has been completed. An object of the present invention is to provide a method for producing a copper-based lead material for a semiconductor having a small internal residual stress and excellent etching workability.

【0004】[0004]

【課題を解決するための手段】請求項1記載の発明は、
仕上げ調質圧延後の半導体リード材用銅合金に、伸び率
0.1%より大きく0.2%未満でテンションレベラー
を掛け、次いで200〜500℃の温度で5〜300分
間加熱する低温焼鈍又は300〜800℃の温度で5秒
〜5分間加熱する連続焼鈍を施すことを特徴とする半導
体用銅系リード材の製造方法である。
According to the first aspect of the present invention,
Elongation rate of copper alloy for semiconductor lead material after finish temper rolling
Low-temperature annealing at a temperature of 200 to 500 ° C. for 5 to 300 minutes or continuous annealing at a temperature of 300 to 800 ° C. for 5 seconds to 5 minutes by applying a tension leveler at more than 0.1% and less than 0.2%. A method for producing a copper-based lead material for semiconductors.

【0005】請求項2記載の発明は、仕上げ調質圧延後
の半導体リード材用銅合金に、伸び率0.1%より大き
0.2%未満でテンションレベラーを掛け、次いで2
00〜500℃の温度で5〜300分間加熱する低温焼
鈍又は300〜800℃の温度で5秒〜5分間加熱する
連続焼鈍を施し、次いで伸び率0.2%未満でテンショ
ンレベラー又はローラーレベラーを掛けることを特徴と
する半導体用銅系リード材の製造方法である。
According to a second aspect of the present invention, a copper alloy for a semiconductor lead material after finish temper rolling has an elongation of more than 0.1%.
Applying tension leveler Ku less than 0.2%, then 2
Low-temperature annealing at a temperature of 00 to 500 ° C for 5 to 300 minutes or continuous annealing at a temperature of 300 to 800 ° C for 5 seconds to 5 minutes, and then a tension leveler or a roller leveler with an elongation of less than 0.2%. A method for producing a copper-based lead material for a semiconductor, comprising:

【0006】[0006]

【発明の実施の形態】請求項1記載の発明において、仕
上げ調質圧延後の半導体リード材用銅合金にテンション
レベラーを掛けるのは、条の形状を修正する為で、その
ときの伸び率を0.1%より大きく0.2%未満に限定
した理由は、伸び率を0.1%以下にすると条の形状が
十分に修正されず、伸び率を0.2%以上にするとテン
ションレベラーによる内部残留応力が大きく加わり、こ
の内部残留応力が次の低温焼鈍工程で十分に解放されな
い為である。又テンションレベラーを掛けた後に低温焼
鈍又は連続焼鈍を施すのは内部残留応力を解放する為で
ある。前記低温焼鈍の条件を200〜500℃の温度で
5〜300分間に限定した理由は200℃未満でも5分
未満でも、内部残留応力が十分に解放されずエッチング
加工の際にダイパット部に反りが生じる為である。又5
00℃を超えると条の軟化が酷くなり十分な強度が得ら
れなくなる為である。又300分を超えては生産性が低
下して実用的でなくなる為である。連続焼鈍の場合の温
度と時間の限定理由も、低温焼鈍の場合と同じである。
尚、この発明では、低温焼鈍又は連続焼鈍後にテンショ
ンレベラーやローラーレベラー等は掛けない。
In the invention according to claim 1, the tension leveler is applied to the copper alloy for the semiconductor lead material after the finish temper rolling in order to correct the shape of the strip, and the elongation at that time is reduced. The reason for limiting to greater than 0.1% and less than 0.2% is that if the elongation is 0.1% or less, the shape of the strip will
When the elongation is not sufficiently corrected and the elongation is 0.2% or more, a large internal residual stress is applied by the tension leveler, and the internal residual stress is not sufficiently released in the next low-temperature annealing step. The reason why low-temperature annealing or continuous annealing is performed after the tension leveler is applied is to release internal residual stress. The reason for limiting the conditions of the low-temperature annealing to a temperature of 200 to 500 ° C. for 5 to 300 minutes is that even if the temperature is lower than 200 ° C. or less than 5 minutes, the internal residual stress is not sufficiently released and the die pad portion is warped during etching. It is because it occurs. 5
If the temperature exceeds 00 ° C., the softening of the strip becomes severe and sufficient strength cannot be obtained. On the other hand, if the time exceeds 300 minutes, the productivity is lowered and it is not practical. The reason for limiting the temperature and time in the case of continuous annealing is the same as in the case of low-temperature annealing.
In the present invention, a tension leveler, a roller leveler or the like is not applied after low-temperature annealing or continuous annealing.

【0007】請求項2記載の発明において、請求項1記
載の発明で得られた低温焼鈍又は連続焼鈍後の条(リー
ド材)に、更にテンションレベラー又はローラーレベラ
ーを掛ける理由は、条の長手方向と幅方向の反りを修正
する為である。そのときのテンションレベラーの伸び率
を0.2%未満とした理由は、伸び率を0.2%以上に
すると内部残留応力が大きくなり、エッチング加工時の
ダイパット部の反りが大きくなる為である。前記低温焼
鈍又は連続焼鈍後の条の反りの修正には、必ずしも張力
を必要とせず、従って、条に張力が加わらないローラー
レベラーも使用できる。尚、この時のレベラーは製造工
程途中の幅広条の段階で行っても、スリッター後の幅狭
の段階で行っても良い。
In the invention according to claim 2, the reason why the tension leveler or the roller leveler is further applied to the strip (lead material) after low-temperature annealing or continuous annealing obtained in the invention according to claim 1 is that in the longitudinal direction of the strip. And to correct the warp in the width direction. The reason why the elongation percentage of the tension leveler at that time is less than 0.2% is that if the elongation percentage is 0.2% or more, the internal residual stress increases, and the warpage of the die pad portion during etching processing increases. . For correcting the warpage of the strip after the low-temperature annealing or the continuous annealing, tension is not necessarily required, and therefore, a roller leveler that does not apply tension to the strip can also be used. The leveling at this time may be performed at the stage of wide strip in the middle of the manufacturing process or at the stage of narrowing after slitting.

【0008】[0008]

【実施例】以下に、本発明を実施例により詳細に説明す
る。 (実施例1) Snを0.25wt%、Crを0.30wt%含有し、
残部銅と不可避的不純物からなる銅合金を常法により溶
解鋳造して鋳塊とし、この鋳塊を熱間圧延後面削し、次
いで冷間圧延と焼鈍を繰り返し、最終焼鈍後、加工率4
0%の仕上げ調質圧延を行って厚さ0.2mmの銅合金
条を得た。次に前記銅合金条にテンションレベラーを掛
け、次いで低温焼鈍又は連続焼鈍を施して半導体用銅系
リード材を製造した。前記テンションレベラーでの伸び
率と、低温焼鈍又は連続焼鈍での焼鈍条件は種々に変化
させた。
The present invention will be described below in detail with reference to examples. (Example 1) Sn contained 0.25 wt% and Cr 0.30 wt%,
A copper alloy consisting of the remaining copper and unavoidable impurities is melt-cast by a conventional method to form an ingot, and the ingot is hot-rolled and then surface-cut, and then cold-rolled and annealed repeatedly.
Finish passivation rolling of 0% was performed to obtain a copper alloy strip having a thickness of 0.2 mm. Next, a tension leveler was applied to the copper alloy strip, followed by low-temperature annealing or continuous annealing to produce a copper-based lead material for a semiconductor. The elongation percentage in the tension leveler and the annealing conditions in low-temperature annealing or continuous annealing were variously changed.

【0009】得られた各々の半導体用銅系リード材につ
いて、急峻度、カール、内部残留応力、ダイパット部の
反り量、引張強さを調べた。急峻度は、板のうねりの高
さを、そのピッチで除した百分率で示した。カールは長
さ1mの材料を壁につり下げ、その下端と壁までの距離
で表した。内部残留応力は、条の表面をエッチングによ
り所定厚さ除去し、そのときの反りを測定して内部残留
応力分布を求め、その分布の最大引張残留応力で表し
た。ダイパット部の反り量はダイパット部のサイズが2
0×20mmの材料をディンプル面積を全面積の10
%、ディンプル深さを条の厚さの50%でエッチングし
てダイパット中央部と周囲の高さの差で表した。製造条
件を表1に、試験結果を表2にそれぞれ示す。
With respect to each of the obtained copper-based lead materials for semiconductors, steepness, curl, internal residual stress, amount of warpage of the die pad portion, and tensile strength were examined. The steepness was expressed as a percentage of the undulation height of the plate divided by the pitch. The curl hangs a 1 meter long material on a wall and expresses it as the distance from the lower end to the wall. The internal residual stress was obtained by removing the surface of the strip by a predetermined thickness by etching, measuring the warpage at that time, obtaining the internal residual stress distribution, and expressing the distribution as the maximum tensile residual stress. The amount of warpage of the die pad part is 2
The dimple area of the material of 0 × 20 mm is
% And the dimple depth was etched at 50% of the thickness of the strip, and expressed by the difference between the height of the center of the die pad and the periphery. The manufacturing conditions are shown in Table 1 and the test results are shown in Table 2.

【0010】[0010]

【表1】 [Table 1]

【0011】[0011]

【表2】 [Table 2]

【0012】表2より明らかなように、本発明例品(N
o.1〜6)はいずれも、条の形状(急峻度、カール)
及び引張強さが従来品(No.14)と同等であり、内
部残留応力とダイパット部の反り量が従来品(No.1
4)に較べて著しく優れるものであった。これに対し、
比較例品のNo.7、8、11、12は、仕上げ調質圧
延後のテンションレベラーでの伸び率が大きかった為、
No.9、13は低温焼鈍又は連続焼鈍での温度が低す
ぎた為、いずれも内部残留応力が大きく残り、ダイパッ
ト部の反り量が増加した。No.10は低温焼鈍が高温
でなされた為必要強度が得られなかった。
As is clear from Table 2, the sample of the present invention (N
o. 1 to 6) are all strip shapes (steepness, curl)
And the tensile strength is equivalent to that of the conventional product (No. 14), and the internal residual stress and the warpage of the die pad portion are the same as those of the conventional product (No. 1).
It was remarkably superior to 4). In contrast,
No. of the comparative example product 7, 8, 11 and 12 had a large elongation at the tension leveler after finish temper rolling,
No. In Nos. 9 and 13, the temperature in the low-temperature annealing or the continuous annealing was too low, so that the internal residual stress remained large, and the warpage of the die pad portion increased. No. In No. 10, required strength was not obtained because low-temperature annealing was performed at high temperature.

【0013】(実施例2) 実施例1で得た低温焼鈍又は連続焼鈍後の半導体用銅系
リード材に、更にテンションレベラー又はローラーレベ
ラー(R.L.)を掛けて半導体用銅系リード材を製造
した。前記テンションレベラーでの伸び率は種々に変化
させた。得られた各々の半導体用銅系リード材につい
て、急峻度、カール、内部残留応力、ダイパット部の反
り量、引張強さを、実施例1と同じ方法により調べた。
製造条件を表3に、試験結果を表4にそれぞれ示す。
(Example 2) The copper-based lead material for a semiconductor after the low-temperature annealing or the continuous annealing obtained in the example 1 is further subjected to a tension leveler or a roller leveler (RL). Was manufactured. The elongation at the tension leveler was varied. With respect to each of the obtained copper-based lead materials for semiconductors, the steepness, curl, internal residual stress, amount of warpage of the die pad portion, and tensile strength were examined in the same manner as in Example 1.
The manufacturing conditions are shown in Table 3, and the test results are shown in Table 4.

【0014】[0014]

【表3】 [Table 3]

【0015】[0015]

【表4】 [Table 4]

【0016】表4より明らかなように、請求項2記載の
発明例品(No.15〜18)は、焼鈍後更にレベラー
又はローラーレベラーを掛けた為、いずれも、条の形状
(急峻度、カール)及び引張強さが請求項1記載の発明
例品に較べてより良好なものとなった。しかし、比較例
品のNo.19、20は焼鈍後のレベラーの伸び率が大
き過ぎた為、いずれも内部残留応力が大きく残り、ダイ
パット部の反り量が増加した。
As is clear from Table 4, the invention examples (Nos. 15 to 18) according to claim 2 were further subjected to a leveler or a roller leveler after annealing. (Curl) and tensile strength were better than those of the invention sample of claim 1. However, no. In Nos. 19 and 20, since the elongation percentage of the leveler after annealing was too large, the internal residual stress remained large and the warpage of the die pad portion increased.

【0017】[0017]

【発明の効果】以上に述べたように、本発明によれば、
内部残留応力が小さくエッチング加工性に優れた半導体
用銅系リード材が得られ、工業上顕著な効果を奏する。
As described above, according to the present invention,
A copper-based lead material for a semiconductor having a small internal residual stress and excellent in etching workability can be obtained, and has an industrially remarkable effect.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−270945(JP,A) 特開 平4−94815(JP,A) 特開 平7−227620(JP,A) (58)調査した分野(Int.Cl.7,DB名) C22F 1/00 - 3/02 H01L 23/48 H01L 23/50 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-270945 (JP, A) JP-A-4-94815 (JP, A) JP-A-7-227620 (JP, A) (58) Field (Int.Cl. 7 , DB name) C22F 1/00-3/02 H01L 23/48 H01L 23/50

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 仕上げ調質圧延後の半導体リード材用銅
合金に、伸び率0.1%より大きく0.2%未満でテン
ションレベラーを掛け、次いで200〜500℃の温度
で5〜300分間加熱する低温焼鈍又は300〜800
℃の温度で5秒〜5分間加熱する連続焼鈍を施すことを
特徴とする半導体用銅系リード材の製造方法。
1. A tension leveler is applied to the copper alloy for a semiconductor lead material after the finish temper rolling at an elongation of more than 0.1% and less than 0.2%, and then at a temperature of 200 to 500 ° C. for 5 to 300 minutes. Low temperature annealing or 300-800
A method for producing a copper-based lead material for a semiconductor, comprising performing continuous annealing by heating at a temperature of 5C for 5 seconds to 5 minutes.
【請求項2】 仕上げ調質圧延後の半導体リード材用銅
合金に、伸び率0.1%より大きく0.2%未満でテン
ションレベラーを掛け、次いで200〜500℃の温度
で5〜300分間加熱する低温焼鈍又は300〜800
℃の温度で5秒〜5分間加熱する連続焼鈍を施し、次い
で伸び率0.2%未満でテンションレベラー又はローラ
ーレベラーを掛けることを特徴とする半導体用銅系リー
ド材の製造方法。
2. A copper alloy for a semiconductor lead material after finish temper rolling is applied with a tension leveler at an elongation of more than 0.1% and less than 0.2%, and then at a temperature of 200 to 500 ° C. for 5 to 300 minutes. Low temperature annealing or 300-800
A method for producing a copper-based lead material for a semiconductor, comprising: performing continuous annealing by heating at a temperature of 5 ° C. for 5 seconds to 5 minutes; and then applying a tension leveler or a roller leveler at an elongation of less than 0.2%.
JP32302395A 1995-12-12 1995-12-12 Method for producing copper-based lead material for semiconductor Expired - Lifetime JP3303639B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32302395A JP3303639B2 (en) 1995-12-12 1995-12-12 Method for producing copper-based lead material for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32302395A JP3303639B2 (en) 1995-12-12 1995-12-12 Method for producing copper-based lead material for semiconductor

Publications (2)

Publication Number Publication Date
JPH09165658A JPH09165658A (en) 1997-06-24
JP3303639B2 true JP3303639B2 (en) 2002-07-22

Family

ID=18150267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32302395A Expired - Lifetime JP3303639B2 (en) 1995-12-12 1995-12-12 Method for producing copper-based lead material for semiconductor

Country Status (1)

Country Link
JP (1) JP3303639B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5011586B2 (en) * 2005-09-30 2012-08-29 Dowaメタルテック株式会社 Copper alloy sheet with improved bending workability and fatigue characteristics and its manufacturing method
JP6386936B2 (en) * 2015-02-26 2018-09-05 京セラ株式会社 Method of manufacturing electrode member for pressure contact type semiconductor device

Also Published As

Publication number Publication date
JPH09165658A (en) 1997-06-24

Similar Documents

Publication Publication Date Title
JP5312920B2 (en) Copper alloy plate or strip for electronic materials
JP2010007174A (en) Cu-Ni-Si-BASED ALLOY PLATE OR BAR FOR ELECTRONIC MATERIAL
JP2812869B2 (en) Plate material for electrical and electronic parts for half-etching and method for producing the same
JPH0790520A (en) Production of high-strength cu alloy sheet bar
JPH01272733A (en) Lead frame material made of cu alloy for semiconductor device
JP3303639B2 (en) Method for producing copper-based lead material for semiconductor
CN117551910A (en) Cu-Ni-Si copper alloy strip and method for producing same
JP4225733B2 (en) Terminal, connector, lead frame material plate
JP2003286527A (en) Copper or copper alloy with low shrinkage percentage, and manufacturing method therefor
JP6762333B2 (en) Cu-Ni-Si based copper alloy strip
JPS6012421B2 (en) Manufacturing method of lead wire material
JP2000015331A (en) Manufacture of cupric lead material for semiconductor
JP2812879B2 (en) Plate material for electric and electronic parts and method for producing the same
JPH0867914A (en) Production of ic lead frame material
JP6309331B2 (en) Cu-Fe-P copper alloy sheet having excellent half-etching characteristics and method for producing the same
JPH06163780A (en) Manufacture of lead frame
JP2585168B2 (en) Method for producing high strength low linear expansion Fe-Ni alloy wire
JP2869031B2 (en) Method of manufacturing lead material for semiconductor
JP3869199B2 (en) Manufacturing method of copper-based lead material for semiconductor
JPH04268055A (en) Manufacture of copper alloy for lead frame
JPH1140730A (en) Lead frame member superior in uniformity of plating thickness and manufacture thereof
JP2020015986A (en) Cu-Ni-Si-BASED COPPER ALLOY STRIP AND MANUFACTURING METHOD THEREFOR
JPH0813101A (en) Iron-nickel alloy for electronic parts, excellent in hot workability
JPS5943972B2 (en) Manufacturing method of lead frame material for Ag plating
JP3117852B2 (en) Fe-Cu alloy IC lead frame and method of manufacturing the same

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090510

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100510

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110510

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110510

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120510

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120510

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130510

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140510

Year of fee payment: 12

EXPY Cancellation because of completion of term