JP3297775B2 - Video data recording device and video data reproducing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video data recording device and a video data reproducing device which are preferably provided in a recording system and a reproducing system of, for example, a digital video tape recorder device and a digital video camera device. The present invention relates to a video data recording device and a video data reproducing device which are simplified and omit a memory for shuffling and deshuffling to simplify the overall configuration.

[0002]

2. Description of the Related Art Conventionally, there is known a digital video tape recorder as shown in FIG. 4 for digitally recording and reproducing video information.

This digital video tape recorder apparatus has a recording system 75 for digitally recording video information and a reproduction system 76 for digitally reproducing the recorded video information.
It is composed of

In such a digital video tape recorder, when recording video information, the input terminal 5
Luminance data (Y) and two color difference data (RY, BY) are supplied to a blocking / shuffling circuit 54 via input terminals 1 to 53.

The above-mentioned blocking and shuffling circuit 54
First, as shown in FIG.
Each of the color difference data is similarly divided into blocks of 8 pixels × 8 pixels (RY blocks, BY blocks), as well as being divided into blocks of 8 pixels × 8 pixels (Y blocks).
Then, four Y blocks and one RY block (CR block) at the same position as the Y block,
One macro block is formed from the BY block (CB block), and the shuffling video RAM 72 as a frame memory is write-controlled so that the macro block is sequentially written. As a result, one frame of macroblock is written in the shuffling video RAM 72.

Next, for example, when so-called NTSC video information (525 lines / 60 Hz) is supplied as the video information, the blocking / shuffling circuit 5 is used.
4, when a macroblock for one frame is written in the shuffling video RAM 72, the storage area of the shuffling video RAM 72 is vertically divided into five first to fifth areas as shown in FIG. At the same time, each area is divided horizontally into ten blocks (this block is hereinafter referred to as a super block). This one super block is formed of, for example, a total of 27 macro blocks.

[0007] As the video information, a so-called PA
When video information of the L system (625 lines / 50 Hz) is supplied, the blocking and shuffling circuit 54, when a macroblock of one frame is written in the video RAM 72 for shuffling, the video RAM 72 for shuffling. Is vertically divided into first to fifth five regions, and each region is horizontally divided into twelve super blocks.

Next, the blocking and shuffling circuit 54, as shown in FIG.
The first macroblock M of the superblock
B ₅₁ , the first macro block MB ₁₁ of the first super block in the first area, the first macro block MB ₄₁ of the ninth super block in the fourth area, and the first macro block MB ₄₁ of the second area. most superblock first macroblock MB ₂₁ of 7, etc. to read out the third third very first macro blocks written into the shuffling video RAM72 in the order of the macro blocks MB ₃₁ superblock area As described above, one macroblock is read out from each area according to a predetermined shuffling rule, and one frame of video data is shuffled. Then, one fixed-length data (segment data) is formed by a total of five macroblocks read one by one from each of the above areas, and this is supplied to a discrete cosine transform circuit (DCT circuit) 55.

By performing such a shuffling process, the data amount of each fixed-length data can be averaged.

The DCT circuit 55 generates Y data, RY data, and B data of each macro block for each of the fixed-length data.
-Y data is converted on the frequency axis, and this is
7

The quantization circuit 77 performs a compression process by quantizing each fixed-length data converted on the frequency axis, and supplies this to the framing circuit 56.

[0012] The framing circuit 56 shown in FIG.
When the fixed-length data that has been subjected to the above-described compression processing is supplied, the data is temporarily stored in a framing memory. In FIG. 7A, the hatched dotted line indicates the data band of each data.

Next, the framing circuit 56 shown in FIG.
As shown in (b), a predetermined threshold level is compared with the data band of each data of the fixed-length data, and data in the same macroblock that is equal to or higher than the threshold level is detected as shown by the diagonally left line in the figure. 1 pass processing is performed.

Next, the framing circuit 56 collects data at the threshold level or higher within the same macroblock detected by the one-pass processing, and assembles the data into the same macroblock as shown in FIG. , The data below the threshold level is divided and allocated so as not to exceed the threshold level. Then, a two-pass process for detecting data at or above the threshold level is performed again.

Next, the framing circuit 56 collects data at or above the threshold level detected by the two-pass processing, and assembles the data into different macroblocks as shown by black squares in FIG. A three-pass process is performed for dividing and assigning data below the threshold level so as not to exceed the threshold level.

When the three-pass processing is completed and all the data falls below the threshold level, the framing circuit 56 reads the fixed-length data from the framing memory and supplies it to the deshuffling circuit 57.

The deshuffling circuit 57 writes and controls the deshuffling video RAM 73 so that each fixed length data read from the framing memory is written. Then, each data written in the deshuffling video RAM 73 is read out in accordance with a deshuffling rule reverse to the shuffling process performed in the blocking and shuffling circuit 54, whereby the one frame video data is deshuffled. And supplies it to the recording encoding circuit 58.

The recording and encoding circuit 58 performs a predetermined encoding process suitable for recording on the deshuffling-processed video data, and supplies the video data to a recording head 60 via an amplifier circuit 59.

The recording head 60 is a so-called rotary head, and magnetically records the video data on a video tape 61 diagonally.

When the video data is recorded on a video tape while being shuffled, a series of video data is recorded while being dispersed, and is a rotary head like the recording head 60 at the time of fast forward reproduction or rewind reproduction. The reproducing head 62 scans the recording track diagonally, and can reproduce only a part of the recorded data, which causes a problem that the reproduced image is disturbed. However, by recovering and recording a series of video data by the deshuffling process as described above, it is possible to prevent such inconvenience and obtain a clear reproduced image.

Next, the video data thus recorded on the video tape 61 is reproduced by the reproduction system 76.

That is, at the time of reproducing the video data, the video data recorded on the video tape 61 is reproduced by the reproduction head 62 and supplied to the reproduction / decoding circuit 64 via the amplification circuit 63. Reproduction / decoding circuit 6
4 performs a decoding process on the video data, and supplies the video data to the shuffling circuit 65.

The shuffling circuit 65 once writes the decoded video data for one frame in the video RAM 73 for deshuffling, and writes the written video data in accordance with the same shuffling rule as the blocking and shuffling circuit 54. By reading,
The video data is subjected to a shuffling process and supplied to a deframing circuit 66.

The deframing circuit 66 forms decompressed fixed-length data on the video data recorded by the framing process in the framing circuit 56 for each fixed-length data. This is supplied to the inverse quantization circuit 78.

The inverse quantization circuit 78 performs an inverse quantization process on the fixed length data using an inverse quantization coefficient corresponding to the quantization coefficient used in the quantization process on the fixed length data. And expands it by an inverse DCT circuit (IDC
(T circuit) 67.

The IDCT circuit 67 performs an inverse DCT process on each data of the macroblocks forming the fixed length data to reproduce the video data before the compression process, and sends it to a deblocking / deshuffling circuit 68. Supply.

The deblocking / deshuffling circuit 68 performs a deshuffling process reverse to the shuffling process performed by the shuffling circuit 65 on the video data, and performs one macroblock of the video data subjected to the deshuffling process. The Y data, RY data, and BY data are reproduced by performing a deblocking process every time, and these are output through the output terminals 69 to 71.

Since such a digital video tape recorder apparatus digitally records and reproduces video data, there is an advantage that image quality is less deteriorated and a good reproduced image can be obtained.

[0029]

However, the above-mentioned digital video tape recorder apparatus can obtain a good reproduced image, but at least two frame memories (shuffling) are required for shuffling and deshuffling. Video RAM 72 for ring and video RA for deshuffling
M73) is required, and there is a problem in that the apparatus itself becomes larger due to an increase in the number of parts and a complicated circuit configuration, and the cost increases.

The present invention has been made in view of the above-mentioned problems, and can reduce the memory capacity for shuffling and deshuffling, reduce the number of parts, simplify the circuit configuration, and can reduce the number of components. It is an object of the present invention to provide a video data recording device and a video data reproducing device capable of reducing the size and cost of the video data.

[0031]

According to the present invention, there is provided a video data recording apparatus comprising: a low-pass filter for removing high-frequency components from video data at the stage of performing a framing process so that no data above a threshold level exists; Block means for dividing the video data from the low-pass filter into data blocks each having a predetermined number of pixels, collecting a predetermined number of the data blocks, forming a processing unit block, and outputting the processed unit block.

Also, an orthogonal transformation means for performing orthogonal transformation processing for each processing unit block from the blocking means and outputting the result, and a quantization processing for each processing unit block subjected to orthogonal transformation processing by the orthogonal transformation means. And a quantizing means for performing compression and output. Further, the level of each data block forming the processing unit block from the quantization means is compared with a predetermined threshold level, and data at or above the threshold level is converted into data blocks at or below the threshold level within the same data block. And framing means for performing framing processing that is divided and assigned so as not to exceed the threshold level.

Further, a recording data forming means for forming recording data of a recording unit from the processing unit block subjected to the framing processing by the framing means, and a recording means for recording the recording data from the recording data forming means on a recording medium And

Further, the video data recording apparatus according to the present invention has a discrete cosine / conversion circuit as the orthogonal transformation means.

Next, a video data reproducing apparatus according to the present invention is a video data reproducing apparatus for reproducing recorded data recorded by the video data recording apparatus according to the present invention, and reproduces recorded data from a recording medium. And a processing unit block forming unit that reproduces the processing unit block subjected to the framing process from the recording data reproduced by the reproducing unit.

A deframing means for performing a deframing process for restoring the processing unit block with data at or above the threshold level allocated in the same data block to the original data before being allocated; Inverse quantization means for subjecting the processing unit block from the deframing means to inverse quantization processing and expanding and outputting the result, and inverse orthogonal transform means for applying the inverse orthogonal transformation processing to the processing unit block from the inverse quantization means and outputting the result. And

A deblocking means for reproducing a plurality of data blocks each having a predetermined number of pixels from the processing unit block from the inverse orthogonal transform means, and reproducing and outputting video data from the data blocks. A low-pass filter that performs processing to reduce image deterioration due to loss of high frequency components to video data reproduced by the deblocking means and outputs the processed data.

Further, in the video data reproducing apparatus according to the present invention, since the recording data recorded on the recording medium is subjected to discrete cosine and conversion processing by the orthogonal transform means at the time of recording, The inverse orthogonal transform means includes an inverse orthogonal cosine transform unit that performs an inverse discrete cosine transform process on the processing unit block that has been subjected to the discrete cosine transform process.

[0039]

According to the video data recording apparatus of the present invention, first, when the low-pass filter performs the framing processing described later, the video data supplied from the outside is set so that there is no data above a predetermined threshold level. And removes the high-frequency component and supplies it to the blocking means.

The blocking means divides the video data from which the high-frequency component has been removed into data blocks each having a predetermined number of pixels, and collects a predetermined number of the data blocks to form a processing unit block. It is supplied to orthogonal transform means.

The orthogonal transform means is constituted by, for example, a so-called discrete cosine transform circuit. The orthogonal transform means performs orthogonal transform processing for each processing unit block from the blocking means to convert the processed data into a frequency axis. Supply to the quantization means.

As the orthogonal transform means, other than the above,
Other orthogonal transform means such as so-called Hadamard transform means, KL transform means, slant transform means, etc. can also be used.

The quantizing means compresses by applying a quantizing process to each of the processing unit blocks converted on the frequency axis, and supplies this to the framing means.

The framing means compares the level of each data block forming the processing unit block from the quantizing means with a predetermined threshold level, and converts data equal to or higher than the threshold level into the same data block. A framing process is performed to divide and assign data blocks below the threshold level so as not to exceed the threshold level, and supply the data blocks to the recording data forming means.

The data subjected to the framing processing has been subjected to the low-pass filter so that the high-frequency components have been removed so that the framing processing is completed within the same data block. It is possible to prevent data of a level or higher from being present.

The recording data forming means forms recording data of a recording unit from the processing unit block subjected to the framing processing, and supplies the recording data to the recording means.

The recording means records the recording data from the recording data forming means on a recording medium.

In the above-mentioned framing process, it is normal to perform a process of allocating data that is equal to or higher than the threshold level even if the data is allocated in the same data block to a different data block. Then, by the above low-pass filter,
After the assignment in the same data block, the high-frequency component of the video data is removed in advance so that there is no data above the threshold level.Therefore, it is possible to omit the framing process to assign to the different data block. As a result, the framing process can be simplified.

Further, the high frequency component of the video data is removed,
Since the framing process is completed within the same data block, the information amount of the processing unit block can be averaged. Therefore, it is not necessary to perform shuffling processing and deshuffling processing in order to average the information amount of the processing unit block, and the shuffling circuit, deshuffling circuit, and memory for performing the shuffling processing and deshuffling processing are completely provided. Can be omitted.

Further, by simplifying the framing process and reducing the number of the shuffling circuit, the deshuffling circuit, and the memory, the size of the device itself can be reduced, the cost can be reduced, and the power consumption can be reduced.

In the framing means, when the allocation within the same data block is performed,
If there is data at or above the threshold level, for example, it is not used.

Next, a video data reproducing apparatus according to the present invention reproduces recorded data recorded by the above-mentioned video data recording apparatus, and the reproducing means reproduces the recorded data from the recording medium. Is supplied to the processing unit block forming means.

The processing unit block forming means reproduces the processing unit block which has been subjected to the framing processing from the recording data, and supplies this to the deframing means.

The deframing means performs a deframing process on the processing unit block, in which data above the threshold level allocated in the same data block is returned to the original data before the allocation. Is supplied to the inverse quantization means.

The inverse quantization means performs an inverse quantization process on the processing unit block by using an inverse quantization coefficient corresponding to the quantization coefficient used in the quantization means of the video data recording device. Decompress and supply this to the inverse orthogonal transform means.

The inverse orthogonal transform means includes, for example, an inverse discrete cosine transform circuit corresponding to the discrete cosine transform circuit provided in the video data recording apparatus. , Inverse discrete cosine conversion processing, and supplies the result to deblocking means.

The deblocking means reproduces a plurality of data blocks each having a predetermined number of pixels from the processing unit block from the inverse orthogonal transform means, and reproduces video data from this data block. Supply to low pass filter.

The low-pass filter subjects the video data reproduced by the deblocking means to a process for reducing the deterioration of the image due to the loss of the high frequency band, and outputs the processed data.

Since the video data reproducing apparatus can simplify the deframing process in the deframing means, the apparatus itself can be reduced in size, low cost and low power consumption by simplifying the circuit configuration and reducing the number of parts. Can be achieved.

In order to perform the simple framing process, even if the high-frequency component of the video data is removed and recorded, the low-pass filter causes the video data to be degraded due to the lack of the high-frequency component. Can be output after being subjected to a process of reducing For this reason, it is possible to make the deterioration of the reproduced image inconspicuous.

[0061]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a video data recording apparatus and a video data reproducing apparatus according to the present invention will be described below in detail with reference to the drawings.

As shown in FIG. 1, a video data recording device and a video data reproducing device according to the present invention are composed of a recording system 1 and a reproducing system 21 of a so-called digital video tape recorder device.
Respectively.

In FIG. 1, a recording system 1 of a digital video tape recorder according to this embodiment has an input terminal 2 to which luminance data (Y) and two color difference data (BY, RY) are supplied. And a low-pass filter (LPF) 5 for removing high-frequency components from each of the data so that a three-pass process described later is not required.

The recording system 1 forms a macroblock composed of predetermined pixels from each data supplied from the low-pass filter 5, and collects a predetermined number of the macroblocks to form fixed-length data for output. When performing the blocking and the deblocking described later, for example, the blocking / deblocking video RAM 14 in which the data for one frame is stored, and the fixed-length data from the blocking circuit 6 Discrete cosine transform (DC
T) a DCT circuit 7 for performing processing and outputting the processed data.

The recording system 1 includes the DCT circuit 7
A quantizing circuit 13 for performing a quantization process on the fixed-length data from the multiplexing unit, and subjecting the compressed fixed-length data to a simple framing process including a one-pass process and a two-pass process, which will be described later, for output. Simple framing circuit 8
And a recording / encoding circuit 9 for performing an encoding process suitable for recording on the fixed-length data to form video data.

The recording system 1 comprises an amplification circuit 10 for amplifying the video data from the recording encoding circuit 9 with a predetermined gain and outputting the amplified data, and a so-called rotary head. A recording head 11 for obliquely recording video data on a video tape 12.

On the other hand, the reproducing system 21 is a rotary head like the recording head 11 and reproduces the video data recorded on the video tape 12.
2 and an amplifier circuit 23 for amplifying the video data reproduced by the reproduction head 22 with a predetermined gain.

The reproduction system 21 includes a reproduction / decoding circuit 24 for decoding the video data encoded and recorded by the recording / encoding circuit 9, and a reproduction / decoding circuit 24 for decoding the decoded video data. It has a simple deframing circuit 25 that performs deframing processing reverse to that of the simple framing circuit 8 to reproduce fixed-length data.

Further, the reproducing system 21 performs an inverse quantization process on the fixed-length data by performing an inverse quantization process opposite to that of the quantization circuit 13 and expands the fixed-length data and an inverse quantization process. I which performs inverse discrete cosine transform (IDCT) processing on the fixed-length data, which is the reverse of that of the DCT circuit 7
And a DCT circuit 26.

Further, the reproducing system 21 forms a luminance data and two color difference data from the fixed length data subjected to the IDCT processing, and outputs the same.
And a low-pass filter (LPF) 28 that removes high-frequency noise components from the luminance data and the two color difference data and outputs them through output terminals 29 to 31.

Next, the operation of the digital video tape recorder according to the present embodiment having such a configuration will be described.

First, when video data is recorded by the digital video tape recorder according to this embodiment, Y data and BY data are supplied to the LPF 5 via the input terminals 2 and 3.
Data and RY data are provided.

In the simple framing process performed by the simple framing circuit 8, the LPF 5 moves the video data of the high frequency component equal to or higher than the threshold level.
The high-frequency component is removed from each of the above data so as to move within the same macroblock (to avoid two-pass processing) and supply the same to the blocking circuit 6.

As shown in FIG. 5, the blocking circuit 6 divides the Y data into blocks (Y blocks) of 8 pixels × 8 pixels in length and width, and divides the BY data and RY data. Similarly, it is divided into blocks of 8 pixels × 8 pixels (CR block, CB block). And
One macro block consisting of four Y blocks and one CR block and CB block is formed at the same position as the Y blocks, and this is supplied to the blocking / deblocking video RAM 14.

The blocking / deblocking video RAM 14 has, as shown in FIG. 2, a storage area divided into five sections (first to fifth areas) in the horizontal direction. Among the macroblocks, data of 3 × 45 macroblocks are stored vertically. That is, 27 macroblocks (hereafter, the 27 macroblocks stored in each area are referred to as super blocks) are stored in each of the above areas.

Next, the blocking circuit 6 reads, for example, the first macro block (MB ₅₁ ) in the fifth area from among the macro blocks stored in each area of the blocking / deblocking video RAM 14.
The first macro block (MB ₁₁ ) in the first area is read, and the first macro block (MB ₄₁ ) in the fourth area is read.
Is read, and the first macro block (M
B ₂₁₎ reads out, as such reading the first-th macroblock of the third region (MB _31), a total of five reads macroblocks one by one from the respective region using the read rule predetermined And one fixed-length data is formed by the macroblock of .sup.

The quantization circuit 13 compresses the fixed-length data by quantizing it so that the framing processing described below can be performed by two-pass processing, and supplies the compressed data to the DCT circuit 7.

The DCT circuit 7 converts the fixed-length data on the frequency axis, performs a compression process, and supplies this to the simple framing circuit 8.

The simple framing circuit 8 has a framing memory capable of storing the one fixed length data. When the fixed-length data subjected to the DCT processing as shown in FIG. 3A is supplied, the simple framing circuit 8 temporarily stores the data in the framing memory. In FIG. 3A, the hatched dotted line indicates the data band of each data.

Next, the simple framing circuit 8 sets a predetermined threshold level as shown in FIG.
Compare the fixed-length data with the data bandwidth of each data,
As shown by the left diagonal line in the figure, one-pass processing for detecting data at or above the threshold level is performed.

Next, the simple framing circuit 8 collects data at the threshold level or higher in the same macroblock detected by the one-pass processing,
As shown in FIG. 3 (c), two-pass processing is performed in which the data is divided and assigned to data below the threshold level within the same macroblock so as not to exceed the threshold level. The fixed-length data after the two-pass processing is supplied to the recording encoding circuit 9.

The recording coding circuit 9 forms video data by performing coding processing suitable for recording on the fixed-length data subjected to the simple framing processing, and forms the video data through the amplification circuit 10. To the recording head 11.
Thereby, the video data is obliquely recorded on the video tape 12 by the recording head 11.

As described above, the simple framing circuit 8
In the above, after performing the two-pass processing, the L is set so that there is no data above the threshold level.
While removing the high frequency component of each data by PF5,
The quantization circuit 13 performs a quantization process so that the framing process is completed by a two-pass process, whereby the framing process can be completed by a two-stage framing process (a two-pass process). Can be simplified.

Further, since the high frequency band is removed and quantized so that the framing process is completed by the two-pass process, the data amount of each fixed length data can be averaged, and the fixed length data can be averaged. Can be omitted from the shuffling process for averaging the data amount. Therefore, the shuffling circuit, the deshuffling circuit, and the memory for performing the shuffling process and the deshuffling process can be completely omitted. In addition, the memory provided in the digital video tape recorder apparatus can store the five super blocks. It is possible to reduce only the area memory (the above-described blocking / deblocking video RAM 14).

Therefore, the circuit configuration can be simplified and the number of parts can be reduced, and the size of the device itself can be reduced, the cost can be reduced, and the power consumption can be reduced.

Next, the video data thus recorded on the video tape 12 is reproduced by the reproduction system 21.

That is, the video data recorded on the video tape 12 is reproduced by the reproduction head 22 and supplied to the reproduction / decoding circuit 24 via the amplification circuit 23.

The reproduction / decoding circuit 24 performs a decoding process reverse to the encoding process performed at the time of recording on the video data, and supplies this to the simple deframing circuit 25.

The simple deframing circuit 25 reproduces fixed-length data by subjecting the video data to a simple deframing process that is the reverse of the simple framing circuit 8, and outputs the fixed-length data to the inverse quantization circuit 15. Supply.

The inverse quantization circuit 15 inversely quantizes the fixed-length data by using an inverse quantization coefficient corresponding to the quantization coefficient used to quantize the fixed-length data in the quantization circuit 13. The fixed-length data is decompressed by performing the conversion process and supplied to the IDCT circuit 26.

The IDCT circuit 26 adds the inverse discrete data corresponding to the DCT circuit 7 to the fixed-length data.
The cosine / conversion processing is performed, and this is supplied to the deblocking circuit 27.

The deblocking circuit 27 has the ID
The fixed length data from the CT circuit 26 is supplied to the blocking / deblocking video RAM 14, and the blocking / deblocking video RAM 14 is controlled so as to temporarily store the fixed length data.

Next, the deblocking circuit 27 subjects the fixed-length data stored in the blocking / deblocking video RAM 14 to deblocking processing reverse to that performed by the blocking circuit 6 to obtain a macro for each line. The block is reproduced and supplied to the LPF 28.

The LPF 28 converts the Y data, BY data and RY data forming the macro block into:
The LPF 5 performs processing for reducing the deterioration of image quality caused by recording after removing high-frequency components, and outputs these to the outside via the output terminals 29 to 31.

The LPF 28 also plays a role in reducing the influence on the image quality when reproducing the video data recorded by performing the complete framing processing up to the three-pass processing.

In such a reproducing system 21, since the deframing process performed by the simple deframing circuit 25 can be simplified, the size of the apparatus itself can be reduced by simplifying the circuit configuration and reducing the number of parts. , Low cost and low power consumption can be achieved.

In order to perform the simple framing process, even if the high frequency component of the video data is removed and recorded, the LPF 28 prevents the video data from deteriorating the image due to the lack of the high frequency component. The output can be output after performing the process of reducing. For this reason, it is possible to make the deterioration of the reproduced image inconspicuous.

In the above description of the embodiment, the video data recording apparatus and the video data reproducing apparatus according to the present invention are applied to the recording system 1 and the reproducing system 21 of the digital video tape recorder. May be applied to, for example, a recording system and a reproducing system of a so-called digital video camera device. In this case, by displaying the reproduced image on the small display screen of the electronic viewfinder, it is possible to make the image quality of the reproduced image less degraded due to the removal of the high-frequency portion of the video data and recording.

Although the DCT circuit 7 is used as the orthogonal transform means, another orthogonal transform circuit such as a so-called Hadamard transform circuit or KL transform circuit may be used.

Although the first to fifth areas of the blocking circuit 6 have been described with specific numerical values such that 27 macroblocks are respectively stored, this is only an example. It goes without saying that various modifications can be made without departing from the technical concept of the present invention.

[0101]

In the video data recording apparatus according to the present invention, the high-frequency components of the video data supplied from the outside are removed in advance by a low-pass filter, so that the framing processing by the framing means is completed within the same block. be able to. Therefore, the framing process can be simplified.

Further, the high frequency component of the video data is removed,
Since the framing process is completed within the same data block, the information amount of the processing unit block can be averaged. Therefore, it is not necessary to perform shuffling processing and deshuffling processing in order to average the information amount of the processing unit block, and the shuffling circuit, deshuffling circuit, and memory for the shuffling processing and deshuffling processing are completely omitted. Can be.

Further, since the framing process can be simplified and the shuffling circuit, the deshuffling circuit, and the memory can be omitted, the size of the device itself can be reduced, the cost can be reduced, and the power consumption can be reduced.

Further, in the video data reproducing apparatus according to the present invention, the deframing process in the deframing means can be simplified, so that the size of the apparatus itself can be reduced and the cost can be reduced by simplifying the circuit configuration and reducing the number of parts. Power consumption can be reduced.

In order to perform the simple framing process, even if the high frequency component of the video data to be recorded is removed, the low-pass filter prevents the video data from deteriorating the image due to the lack of the high frequency component. The output can be output after performing the process of reducing. For this reason, it is possible to make the deterioration of the reproduced image inconspicuous.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment in which a video data recording device and a video data reproducing device according to the present invention are applied to a digital video tape recorder device.

FIG. 2 is a block diagram showing how fixed-length data is formed in a blocking circuit provided in the digital video tape recorder device according to the embodiment.

FIG. 3 is a schematic diagram for explaining framing processing of a simple framing circuit provided in the digital video tape recorder device according to the embodiment.

FIG. 4 is a block diagram of a conventional digital video tape recorder device.

FIG. 5 is a schematic diagram for explaining a configuration of a macroblock formed by luminance data and two color difference data.

FIG. 6 is a schematic diagram for explaining shuffling processing in a conventional digital video tape recorder device.

FIG. 7 is a schematic diagram for explaining a framing process in a conventional digital video tape recorder device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Recording system of digital video tape recorder device 2 Input terminal of luminance data (Y) 3 Input terminal of color difference data (RY) 4 Input terminal of color difference data (BY) 5 Low pass filter of recording system 6 Blocking circuit 7 DCT circuit 8 Simple framing circuit 9 Recording / encoding circuit 10 Recording system amplification circuit 11 Recording head 12 Video tape 13 Quantization circuit 14 Blocking / deblocking video RAM 15 Inverse quantization circuit 22 Reproduction head 23 Reproduction system amplification circuit 24 Reproduction Coding circuit 25 Simple deframing circuit 26 Inverse DCT circuit 27 Deblocking circuit 28 Low-pass filter of reproduction system 29 Output terminal of luminance data (Y) 30 Output terminal of color difference data (RY) 31 Color difference data (BY) Output terminal

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-61523 (JP, A) JP-A-6-86259 (JP, A) JP-A-7-212711 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H04N 5/91-5/956 H04N ^7/ 24-7/68 H04N 5/782-5/783 G11B 20/10-20/12

Claims (4)

(57) [Claims] 1. A low-pass filter for removing high-frequency components from video data, a video data from the low-pass filter is divided into data blocks each having a predetermined number of pixels, and a predetermined number of the data blocks are collected into a processing unit block. Block forming means for forming and outputting, orthogonal transform means for performing orthogonal transform processing for each processing unit block from the blocking means and outputting the same, and processing unit blocks subjected to orthogonal transform processing by the orthogonal transform means A quantizing means for performing a quantization process, compressing and outputting each time, and comparing a level of each data block forming a processing unit block from the quantizing means with a predetermined threshold level, and comparing data having the threshold level or more. , The data blocks below the threshold level in the same data block Framing means for performing framing processing that is divided and assigned so as not to exceed a threshold level; recording data forming means for forming recording data of a recording unit from a processing unit block subjected to framing processing by the framing means; Recording means for recording the recording data from the forming means on a recording medium, wherein the low-pass filter sets a high level from the video data so that there is no data above the threshold level when the framing process is performed. A video data recording device for removing an area component. 2. The orthogonal transformation means according to claim 1, wherein
2. The video data recording device according to claim 1, wherein the video data recording device is a cosine / conversion circuit. 3. A high-pass component is removed from the video data by a low-pass filter so that no data having a threshold level or more is present at the stage of performing the framing process. A data block consisting of the number of pixels is formed, a predetermined number of the data blocks are collected to form a processing unit block, an orthogonal transformation process is performed for each of the processing unit blocks by the orthogonal transformation means, and the processing is performed by the quantization means. Quantize and compress each unit block,
By the framing means, the level of each data block forming the compressed processing unit block is compared with a predetermined threshold level, and data above the threshold level is converted to data blocks below the threshold level in the same data block. Performing a framing process that is divided and assigned so as not to be equal to or higher than the threshold level, and a recording data forming unit forms recording data of a recording unit from the processing unit block subjected to the framing process, and the recording unit writes the recording data to a recording medium. What is claimed is: 1. A video data reproducing apparatus for reproducing recorded data recorded thereon, comprising: reproducing means for reproducing recorded data from the recording medium; and a processing unit in which the framing process is performed from the recorded data reproduced by the reproducing means. Play block Processing unit block forming means, and deframing means for performing a deframing process of restoring the processing unit block to data of the threshold level or more allocated in the same data block and to the original data before the allocation. An inverse quantization means for performing an inverse quantization process on the processing unit block from the deframing means and expanding and outputting the same; and an inverse orthogonal processing for applying an inverse orthogonal transformation process to the processing unit block from the inverse quantization means and outputting the result. Transforming means, from the processing unit block from the inverse orthogonal transforming means, while reproducing a plurality of data blocks consisting of a predetermined number of pixels, deblocking means for reproducing and outputting video data from this data block, In the video data reproduced by the deblocking means,
A video data reproducing apparatus comprising: a low-pass filter that performs a process of reducing image degradation due to a lack of a high frequency band and outputs the processed image. 4. The recording data recorded on the recording medium has been subjected to discrete cosine transform processing by the orthogonal transform means at the time of recording, and the inverse orthogonal transform means has a function of the discrete cosine transform. 4. The video data reproducing apparatus according to claim 3, wherein the processing unit block subjected to the conversion processing is subjected to inverse discrete cosine conversion processing and output.