JPH07284059A - Video data recorder and video data reproducing device - Google Patents

Abstract

PURPOSE:To simplify circuit constitution and to reduce a cost. CONSTITUTION:In a recording system 1 for blocking video data in a blocking circuit 6, performing a compression processing in an orthogonal transformation circuit 7 and a quantization circuit 13 and performing recording, at the time of digitally recording the video data, so as to complete a framing processing performed in a simple framing circuit 8 within the same block, the high band part of the video data is removed in a low-pass filter 5 and the recording is performed. Also, in a reproducing system 21 for reproducing the video data recorded in such a manner, a processing for reducing the degradation of a picture quality generated by removing the high band part at the time of the recording is performed to the reproduced video data in the low-pass filter 28 and output is performed. In addition to that the framing processing performed in the simple framing circuit 8 is simplified, memories and circuits relating to shuffling and de-shuffling are completely omitted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video data recording apparatus and a video data reproducing apparatus suitable for being provided in a recording system and a reproducing system of, for example, a digital video tape recorder device, a digital video camera device, etc., and more particularly to a framing process. The present invention relates to a video data recording device and a video data reproducing device which are simplified and a memory for shuffling and deshuffling is omitted to simplify the overall configuration.

[0002]

2. Description of the Related Art Conventionally, there is known a digital video tape recorder device as shown in FIG. 4 for digitally recording and reproducing video information.

This digital video tape recorder device has a recording system 75 for digitally recording video information and a reproducing system 76 for digitally reproducing the recorded video information.
It consists of and.

In such a digital video tape recorder device, when recording video information, the input terminal 5 is used.
Luminance data (Y) and two color difference data (RY, BY) are supplied to the blocking and shuffling circuit 54 via the input terminals 1 to 53.

The blocking and shuffling circuit 54
First, as shown in FIG.
The color difference data is divided into blocks of 8 pixels × 8 pixels (RY block, BY block).
Then, four Y blocks and one RY block (CR block) for each at the same position as the Y block,
One macro block is formed from the BY block (CB block), and the shuffling video RAM 72 that is a frame memory is write-controlled so that each macro block is sequentially written. As a result, one frame of macro block is written in the shuffling video RAM 72.

Next, for example, when so-called NTSC video information (525 lines / 60 Hz) is supplied as the video information, the blocking / shuffling circuit 5 is used.
When a macro block for one frame is written in the shuffling video RAM 72, the storage area of the shuffling video RAM 72 is vertically divided into five areas 1 to 5 as shown in FIG. At the same time as the division, each area is divided horizontally into 10 blocks (this block is hereinafter referred to as a super block). This one super block is formed from a total of 27 macro blocks, for example.

As the video information, a so-called PA is used.
When video information (625 lines / 50 Hz) of the L system is supplied, the blocking / shuffling circuit 54 writes one frame of macroblocks in the shuffling video RAM 72, and then the shuffling video RAM 72. The storage area is vertically divided into five areas, first to fifth areas, and each area is horizontally divided into 12 super blocks.

Next, as shown in FIG. 6, the blocking / shuffling circuit 54 operates in the fifth area of the fifth area.
The first macroblock M in the super block
B ₅₁ , the first macroblock MB ₁₁ of the first superblock in the first area, the first macroblock MB ₄₁ of the ninth superblock in the fourth area, the first macroblock MB ₄₁ in the second area The first macroblock MB ₂₁ of the 7th superblock and the first macroblock MB ₃₁ of the 3rd superblock of the third area are read in this order from the macroblocks written in the shuffling video RAM 72. As described above, one macro block is read from each area in accordance with a predetermined shuffling rule, and shuffling processing is performed on the video data of one frame. Then, one fixed length data (segment data) is formed by a total of five macroblocks read from each of the above areas, and this is supplied to the discrete cosine conversion circuit (DCT circuit) 55.

By performing such shuffling processing, the data amount of each fixed length data can be averaged.

The DCT circuit 55, for each fixed length data, Y data, RY data, B data of each macroblock.
-Y data is converted on the frequency axis, and the quantization circuit 7
Supply to 7.

The quantizing circuit 77 performs compression processing by quantizing each fixed length data converted on the frequency axis, and supplies this to the framing circuit 56.

The framing circuit 56 is shown in FIG.
When the compressed fixed-length data as shown in (4) is supplied, it is temporarily stored in the framing memory. Note that, in FIG. 7A, the dotted diagonal lines indicate the data band of each data.

Next, the framing circuit 56 shown in FIG.
As shown in (b), a predetermined threshold level is compared with the data band of each data of the fixed length data, and as shown by the left diagonal line in the figure, data above the threshold level is detected in the same macroblock. 1-pass processing is performed.

Next, the framing circuit 56 collects data of the threshold level or higher in the same macroblock detected by the one-pass processing, and collects this data in the same macroblock as shown in FIG. 7C. In the above, data below the threshold level is divided and assigned so as not to exceed the threshold level. Then, the two-pass process for detecting data above the threshold level is performed again.

Next, the framing circuit 56 collects data of the threshold level or more detected by the two-pass processing, and this data is stored in different macro blocks as shown by black squares in FIG. 7 (d). A three-pass process is performed in which data below the threshold level is divided and assigned so as not to exceed the threshold level.

When the three-pass processing is completed and all the data becomes below the threshold level, the framing circuit 56 reads the fixed length data from the framing memory and supplies it to the deshuffling circuit 57.

The deshuffling circuit 57 controls the writing of the deshuffling video RAM 73 so that each fixed length data read from the framing memory is written. Then, in accordance with a deshuffling rule which is the reverse of the shuffling process performed in the blocking and shuffling circuit 54, each data written in the deshuffling video RAM 73 is read out to deshuffling one frame of video data. And supplies it to the recording encoding circuit 58.

The recording encoding circuit 58 performs a predetermined encoding process suitable for recording on the deshuffling-processed video data, and supplies this to the recording head 60 via an amplifier circuit 59.

The recording head 60 is a so-called rotary head, and magnetically records the video data on the video tape 61 at an angle.

When the video data is shuffled and recorded on a video tape, a series of video data is recorded in a dispersed manner, and serves as a rotary head like the recording head 60 at the time of fast forward reproduction and rewind reproduction. The reproducing head 62 scans the recording track diagonally and can reproduce only part of the recorded data, which causes a problem in the reproduced image. However, by returning the series of video data to the original state by the deshuffling process and recording the data as described above, it is possible to prevent such an inconvenience and obtain a clear reproduced image.

Next, the video data thus recorded on the video tape 61 is reproduced by the reproduction system 76.

That is, when the video data is reproduced, the video data recorded on the video tape 61 is reproduced by the reproduction head 62 and supplied to the reproduction / decoding circuit 64 via the amplifier circuit 63. Playback decoding circuit 6
4 performs a decoding process on the video data and supplies it to the shuffling circuit 65.

The shuffling circuit 65 once writes the decoded image data for one frame into the deshuffling video RAM 73, and writes the written image data according to the same shuffling rule as the blocking and shuffling circuit 54. By reading
The video data is shuffled and supplied to the deframing circuit 66.

The deframing circuit 66 performs deframing processing for each fixed length data on the video data recorded by the framing processing in the framing circuit 56 to form fixed length data after compression processing. Then, this is supplied to the inverse quantization circuit 78.

The dequantization circuit 78 performs dequantization processing on the fixed length data by using the dequantization coefficient corresponding to the quantization coefficient used in the quantization processing of the fixed length data. It is expanded by the
(T circuit) 67.

The IDCT circuit 67 performs an inverse DCT process for each data of the macroblock forming the fixed length data, reproduces the video data before the compression process, and sends this to the deblocking / deshuffling circuit 68. Supply.

The deblocking / deshuffling circuit 68 performs a deshuffling process on the video data, which is the reverse of the shuffling process performed on the shuffling circuit 65, and a macroblock of the video data on which the deshuffling process is performed. By performing deblocking processing for each, the Y data, RY data, and BY data are reproduced, and these are output through the output terminals 69 to 71.

Since such a digital video tape recorder device digitally records and reproduces video data, it has an advantage that image quality deterioration is small and a good reproduced image can be obtained.

[0029]

However, although the above-mentioned digital video tape recorder device should be able to obtain a good reproduced image, at least two frame memories (shuffling) are required for shuffling and deshuffling. Ring video RAM 72 and deshuffling video RA
M73) is required, and there is a problem that the device itself becomes large due to the increase in the number of parts and the complicated circuit configuration, and the cost becomes high.

The present invention has been made in view of the above-mentioned problems, and can reduce the memory capacity for shuffling and deshuffling, reduce the number of parts, and simplify the circuit configuration. It is an object of the present invention to provide a video data recording device and a video data reproducing device capable of achieving downsizing and cost reduction.

[0031]

A video data recording apparatus according to the present invention includes a low-pass filter for removing high frequency components from video data so that no data of a threshold level or higher exists at the stage of performing framing processing. The video data from the low-pass filter is divided into data blocks having a predetermined number of pixels, and a predetermined number of the data blocks are collected to form a processing unit block, which is output as a blocking unit.

Further, an orthogonal transform means for performing an orthogonal transform process for each processing unit block from the blocking means and outputting the same, and a quantizing process for each process unit block subjected to the orthogonal transform process by the orthogonal transform means. And a quantizing means for applying and compressing and outputting. Further, the level of each data block forming the processing unit block from the quantizing means is compared with a predetermined threshold level, and data of the threshold level or higher is converted into a data block of the threshold level or lower in the same data block. , And has framing means for performing framing processing that is divided and assigned such that the threshold level is not exceeded.

Recording data forming means for forming recording data of a recording unit from the processing unit block subjected to the framing processing by the framing means, and recording means for recording the recording data from the recording data forming means on a recording medium. Have and.

Further, the video data recording apparatus according to the present invention has a discrete cosine conversion circuit as the orthogonal conversion means.

Next, the video data reproducing apparatus according to the present invention is a video data reproducing apparatus for reproducing the record data recorded by the video data recording apparatus according to the present invention, and reproduces the record data from the recording medium. And a processing unit block forming means for reproducing the processing unit block subjected to the framing processing from the record data reproduced by the reproduction means.

Also, in the processing unit block, deframing means for performing a deframing process for reallocating the data of the threshold level or higher allocated in the same data block to the original data before the allocation, Inverse quantization means for performing dequantization processing on the processing unit block from the deframing means, decompressing and outputting it, and inverse orthogonal transformation means for performing inverse orthogonal transformation processing on the processing unit block from the dequantization means and outputting it. Have and.

Deblocking means for reproducing a plurality of data blocks having a predetermined number of pixels from the processing unit block from the inverse orthogonal transform means and reproducing and outputting video data from the data blocks. And a low-pass filter for outputting the video data reproduced by the deblocking means after performing processing for reducing deterioration of the image due to loss of high frequencies.

Further, in the video data reproducing apparatus according to the present invention, the recording data recorded on the recording medium is subjected to the discrete cosine conversion processing by the orthogonal conversion means at the time of recording. The inverse orthogonal transform means includes means for performing inverse discrete cosine transform processing on the processing unit block to which the discrete cosine transform processing has been performed.

[0039]

In the image data recording apparatus according to the present invention, first, when the low-pass filter has performed the framing process described later, image data supplied from the outside so that there is no data having a predetermined threshold level or higher. The high frequency component is removed from the above, and this is supplied to the blocking means.

The blocking means divides the video data from which the high frequency components have been removed into data blocks having a predetermined number of pixels, collects a predetermined number of the data blocks to form a processing unit block, and Supply to the orthogonal transformation means.

The orthogonal transform means is composed of, for example, a so-called discrete cosine transform circuit, which transforms on the frequency axis by performing orthogonal transform processing for each processing unit block from the blocking means. Supply to the quantizing means.

As the above orthogonal transform means,
Other orthogonal transforming means such as so-called Hadamard transforming means, KL transforming means, slant transforming means, etc. can also be used.

The quantizing means compresses by performing a quantizing process for each processing unit block converted on the frequency axis, and supplies this to the framing means.

The framing means compares the level of each data block forming the processing unit block from the quantizing means with a predetermined threshold level, and compares data at the threshold level or higher with the threshold value in the same data block. A framing process is performed in which data blocks below the level are divided and assigned so as not to exceed the threshold level, and this is supplied to the recording data forming means.

Since the high-frequency component of the data to be subjected to the framing processing is removed by the low-pass filter so that the framing processing ends within the same data block, the threshold after the framing processing is performed. There can be no data above the level.

The recording data forming means forms recording data of a recording unit from the processing unit block which has been subjected to the framing processing, and supplies this to the recording means.

The recording means records the recording data from the recording data forming means on a recording medium.

In the framing process, it is usual to perform a process of allocating to the different data blocks data which is above the threshold level even if the data is allocated within the same data block. Then, by the above low-pass filter,
After the allocation in the same data block, the high frequency component of the video data is removed in advance so that the data above the threshold level does not exist, so the framing process allocated to the different data block may be omitted. Therefore, the framing process can be simplified.

In addition, the high frequency component of the video data is removed,
Since the framing process ends in the same data block, the information amount of the processing unit block can be averaged. Therefore, it is not necessary to perform the shuffling process and the deshuffling process in order to average the information amount of the processing unit block, and the shuffling process, the deshuffling circuit and the memory for performing the deshuffling process are completely completed. It can be omitted.

Further, the simplification of the framing process and the reduction of the shuffling circuit, the deshuffling circuit and the memory can reduce the size of the apparatus itself, reduce the cost and reduce the power consumption.

In the framing means, when allocating in the same data block,
If there is data that exceeds the threshold level, this is not used, for example.

Next, the video data reproducing apparatus according to the present invention reproduces the record data recorded by the above-mentioned video data recording apparatus, and the reproducing means reproduces the record data from the recording medium, Is supplied to the processing unit block forming means.

The processing unit block forming means reproduces the processing unit block subjected to the framing processing from the recording data and supplies it to the deframing means.

The deframing means performs a deframing process on the processing unit block, in which the data of the threshold level or higher assigned in the same data block is restored to the original data before being assigned, Is supplied to the inverse quantization means.

The inverse quantization means performs inverse quantization processing on the processing unit block using the inverse quantization coefficient corresponding to the quantization coefficient used in the quantization means of the video data recording device. It is expanded and supplied to the inverse orthogonal transform means.

The inverse orthogonal transform means is provided with an inverse discrete cosine transform circuit corresponding to the discrete cosine transform circuit provided in the video data recording apparatus, and the inverse unit cosine transform circuit is provided in the processing unit block. , Inverse discrete cosine conversion processing, and supplies this to the deblocking means.

The deblocking means reproduces a plurality of data blocks having a predetermined number of pixels from the processing unit block from the inverse orthogonal transformation means, reproduces video data from the data blocks, and reproduces the video data. Supply to low pass filter.

The low-pass filter outputs the video data reproduced by the deblocking means after the processing for reducing the deterioration of the image due to the loss of high frequencies.

Since the video data reproducing apparatus can simplify the deframing process in the deframing means, the apparatus itself can be downsized, the cost can be reduced, and the power consumption can be reduced by simplifying the circuit configuration and reducing the number of parts. Can be realized.

Further, in order to perform the simple framing process, even if the high frequency part of the video data is removed and recorded, the low pass filter causes the image data to be deteriorated due to the loss of the high frequency part. Can be output after being processed. Therefore, the deterioration of the image in the reproduced image can be made inconspicuous.

[0061]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a video data recording device and a video data reproducing device according to the present invention will be described in detail below with reference to the drawings.

The video data recording device and the video data reproducing device according to the present invention are, as shown in FIG. 1, a recording system 1 and a reproducing system 21 of a so-called digital video tape recorder device.
Can be applied to each.

In FIG. 1, the recording system 1 of the digital video tape recorder according to this embodiment has an input terminal 2 to which luminance data (Y) and two color difference data (BY, RY) are supplied. 4 to 4 and a low-pass filter (LPF) 5 that removes high-frequency components from the above-mentioned data so that the 3-pass processing described later does not have to be performed.

Further, the recording system 1 forms a macroblock consisting of a predetermined pixel from each data supplied from the low-pass filter 5 and collects a predetermined number of the macroblock to form fixed length data and outputs it. The blocking circuit 6, the blocking / deblocking video RAM 14 in which each data for one frame is stored when performing the blocking and the deblocking described later, and the fixed length data from the blocking circuit 6, Discrete cosine conversion (DC
T) The DCT circuit 7 which performs processing and outputs the result.

The recording system 1 includes the DCT circuit 7
Quantization circuit 13 which quantizes and compresses the fixed-length data from 1., and outputs the compressed fixed-length data which has been subjected to simple framing processing consisting of one-pass processing and two-pass processing described later. Simple framing circuit 8
And a recording encoding circuit 9 for forming video data by performing encoding processing suitable for recording on the fixed length data.

The recording system 1 is an amplifier circuit 10 for amplifying the video data from the recording / coding circuit 9 with a predetermined gain and outputting it, and a so-called rotary head. It has a recording head 11 for obliquely recording video data on a video tape 12.

On the other hand, the reproducing system 21 is a rotary head like the recording head 11 and reproduces the video data recorded on the video tape 12.
2 and an amplifier circuit 23 for amplifying the video data reproduced by the reproducing head 22 with a predetermined gain.

The reproducing system 21 reproduces and decodes the video data coded and recorded by the recording / coding circuit 9 and the decoded video data. It has a simple deframing circuit 25 that reproduces fixed length data by performing deframing processing opposite to that of the simple framing circuit 8.

Further, the reproducing system 21 is subjected to the inverse quantizing circuit 15 for inversely quantizing the fixed length data and performing the inverse quantizing process opposite to the quantizing circuit 13, and the inverse quantizing process. Inverse discrete cosine transform (IDCT) processing, which is the reverse of the DCT circuit 7, is performed on the fixed length data I
It has a DCT circuit 26.

The reproducing system 21 also forms a deblocking circuit 27 for forming and outputting luminance data and two color difference data from the fixed length data subjected to the IDCT process.
And a low-pass filter (LPF) 28 that removes high-frequency noise components from the luminance data and the two color difference data and outputs the components through the output terminals 29 to 31.

Next, the operation of the digital video tape recorder device according to this embodiment having such a configuration will be described.

First, when video data is recorded by the digital video tape recorder according to this embodiment, Y data, BY are recorded in the LPF 5 via the input terminals 2-3.
Data and RY data are provided.

In the simple framing process performed by the simple framing circuit 8, the LPF 5 moves the video data of the high frequency component above the threshold level.
The high-frequency component is removed from each of the above-mentioned data so that movement within the same macroblock is sufficient (within two-pass processing), and this is supplied to the blocking circuit 6.

As shown in FIG. 5, the blocking circuit 6 divides the Y data into blocks (Y blocks) each having a length × width of 8 pixels × 8 pixels, and at the same time, divides the BY data and the RY data. Similarly, it is divided into 8 pixel × 8 pixel blocks (CR block, CB block). And
One macroblock consisting of four Y blocks and one CR block and one CB block at the same position as the Y blocks is formed, and this is supplied to the blocking / deblocking video RAM 14.

As shown in FIG. 2, the blocking / deblocking video RAM 14 has a storage area which is horizontally divided into five areas (first area to fifth area), and one storage area of one frame is included in this storage area. Data of 3 × 45 macroblocks is stored vertically among the macroblocks. That is, 27 macroblocks are stored in each of the areas (hereinafter, 27 macroblocks stored in each area are referred to as super blocks).

Next, the blocking circuit 6 reads, for example, the first macroblock (MB ₅₁ ) in the fifth area among the macroblocks stored in each area of the blocking / deblocking video RAM 14,
The first macroblock (MB ₁₁ ) in the first area is read and the first macroblock (MB ₄₁ ) in the fourth area is read.
Is read, and the first macroblock (M
B ₂₁ ) is read, the first macroblock (MB ₃₁ ) in the third area is read, and so on, and one macroblock is read from each of the above areas using a predetermined read rule, for a total of five. One fixed-length data is formed by the macro block of, and this is supplied to the quantization circuit 13.

The quantizing circuit 13 compresses the fixed-length data by quantizing the fixed-length data so that the framing process described below may be a two-pass process, and supplies the compressed data to the DCT circuit 7.

The DCT circuit 7 converts the fixed-length data on the frequency axis, performs compression processing, and supplies this to the simple framing circuit 8.

The simple framing circuit 8 has a framing memory capable of storing the one fixed length data. When the DCT-processed fixed length data as shown in FIG. 3A is supplied, the simple framing circuit 8 temporarily stores the fixed length data in the framing memory. In FIG. 3A, the dotted diagonal lines indicate the data band of each data.

Next, the simplified framing circuit 8 has a predetermined threshold level as shown in FIG.
Compare the data band of each data of the fixed length data,
As indicated by the diagonal line on the left side of the figure, one-pass processing for detecting data at the threshold level or higher is performed.

Next, the simple framing circuit 8 collects data at the threshold level or higher in the same macroblock detected by the 1-pass processing,
As shown in FIG. 3C, a 2-pass process is performed in which the data is divided and assigned to data below the threshold level within the same macroblock so as not to exceed the threshold level. The fixed length data after the two-pass processing is supplied to the recording / coding circuit 9.

The recording / coding circuit 9 forms video data by performing coding processing suitable for recording on the fixed length data subjected to the simple framing processing, and forms the video data via the amplifier circuit 10. Is supplied to the recording head 11.
As a result, the video data is obliquely recorded on the video tape 12 by the recording head 11.

As described above, the simple framing circuit 8 is used.
In the above, after performing the above two-pass processing, the above L level is set so that there is no data above the threshold level.
High-frequency components of each data are removed by PF5,
By performing quantization processing in the quantization circuit 13 so that the framing processing is completed in two-pass processing, the framing processing can be completed in two-stage framing processing (two-pass processing). Can be simplified.

Further, since the high frequency band is removed and the quantization is performed so that the framing process is completed by the two-pass process, the data amount of each fixed length data can be averaged, and each fixed length data can be averaged. The shuffling process for averaging the data amount of can be omitted. Therefore, the shuffling circuit, the deshuffling circuit and the memory for performing the shuffling process and the deshuffling process can be completely omitted, and the memory provided in the digital video tape recorder device can store the above five super blocks. It can be reduced to only the area memory (blocking / deblocking video RAM 14 described above).

Therefore, the circuit configuration can be simplified and the number of parts can be reduced, and the size of the apparatus itself, the cost and the power consumption can be reduced.

Next, the video data thus recorded on the video tape 12 is reproduced by the reproduction system 21.

That is, the video data recorded on the video tape 12 is reproduced by the reproducing head 22 and supplied to the reproducing / decoding circuit 24 via the amplifying circuit 23.

The reproduction / decoding circuit 24 performs a decoding process, which is the reverse of the encoding process performed at the time of recording, on the video data and supplies it to the simple deframing circuit 25.

The simple deframing circuit 25 reproduces fixed length data by subjecting the video data to a simple deframing process which is the reverse of the simple framing circuit 8 and reproduces it in the inverse quantization circuit 15. Supply.

The inverse quantization circuit 15 inversely quantizes the fixed length data by using an inverse quantization coefficient corresponding to the quantization coefficient used to quantize the fixed length data in the quantization circuit 13. The fixed length data is decompressed by performing the digitization process and is supplied to the IDCT circuit 26.

The IDCT circuit 26 converts the fixed length data into an inverse discrete signal corresponding to the DCT circuit 7.
Cosine / conversion processing is performed, and this is supplied to the deblocking circuit 27.

The deblocking circuit 27 uses the ID
The fixed length data from the CT circuit 26 is supplied to the blocking / deblocking video RAM 14, and the blocking / deblocking video RAM 14 is controlled to temporarily store the fixed length data.

Next, the deblocking circuit 27 subjects the fixed length data stored in the blocking / deblocking video RAM 14 to the deblocking process opposite to that of the blocking circuit 6 to thereby make a macro for each line. The block is regenerated and supplied to the LPF 28.

The LPF 28 converts Y data, BY data and RY data forming the macroblock into
The LPF 5 removes the high frequency band to perform processing for reducing the deterioration of the image quality caused by recording, and outputs these through the output terminals 29 to 31 to the outside.

The LPF 28 also plays a role of reducing the influence on the image quality when reproducing the recorded video data by performing the complete framing processing up to the 3-pass processing.

In such a reproducing system 21, since the deframing process performed by the simple deframing circuit 25 can be simplified, the size of the apparatus itself can be reduced by simplifying the circuit configuration and reducing the number of parts. Therefore, low cost and low power consumption can be achieved.

Further, in order to perform the above-mentioned simple framing processing, even if the high frequency part of the video data is removed and recorded, the LPF 28 causes the image data to be deteriorated due to the loss of the high frequency part. It is possible to perform processing to reduce and output. Therefore, the deterioration of the image in the reproduced image can be made inconspicuous.

In the description of the above embodiment, the video data recording device and the video data reproducing device according to the present invention are applied to the recording system 1 and the reproducing system 21 of the digital video tape recorder device. May be applied to, for example, a recording system and a reproducing system of a so-called digital video camera device. In this case, by displaying the reproduced image on the small display screen of the electronic viewfinder, it is possible to make the deterioration of the image quality of the reproduced image less conspicuous due to recording after removing the high frequency band of the video data.

Although the DCT circuit 7 is used as the orthogonal transforming means, other orthogonal transforming circuits such as a so-called Hadamard transforming circuit or KL transforming circuit may be used.

[0100] Further, in the first to fifth areas of the blocking circuit 6, 27 macro blocks are stored in each of the specific numerical values, but the description is given as an example. It goes without saying that various modifications can be made without departing from the technical idea of the present invention.

[0101]

In the video data recording apparatus according to the present invention, since the high frequency component of the video data supplied from the outside is removed in advance by the low pass filter, the framing processing in the framing means is completed within the same block. be able to. Therefore, the framing process can be simplified.

Further, the high frequency component of the video data is removed,
Since the framing process is completed within the same data block, the information amount of the processing unit block can be averaged. Therefore, it is not necessary to perform the shuffling process and the deshuffling process in order to average the information amount of the processing unit block, and the shuffling process, the shuffling circuit for the deshuffling process, the deshuffling circuit, and the memory are completely omitted. You can

Since the framing process can be simplified and the shuffling circuit, the deshuffling circuit and the memory can be omitted, the device itself can be downsized, the cost can be reduced and the power consumption can be reduced.

Further, since the video data reproducing apparatus according to the present invention can simplify the deframing process in the deframing means, the apparatus itself can be downsized and the cost can be reduced by simplifying the circuit configuration and reducing the number of parts. And low power consumption can be achieved.

Further, in order to perform the above-mentioned simple framing processing, even if the high frequency part of the video data to be recorded is removed, the low pass filter causes deterioration of the image due to the loss of the high frequency part in the video data. It is possible to perform processing to reduce and output. Therefore, the deterioration of the image in the reproduced image can be made inconspicuous.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment in which a video data recording device and a video data reproducing device according to the present invention are applied to a digital video tape recorder device.

FIG. 2 is a block diagram showing how fixed length data is formed in a blocking circuit provided in the digital video tape recorder device according to the above embodiment.

FIG. 3 is a schematic diagram for explaining a framing process of a simple framing circuit provided in the digital video tape recorder device according to the embodiment.

FIG. 4 is a block diagram of a conventional digital video tape recorder device.

FIG. 5 is a schematic diagram for explaining a configuration of a macroblock formed by luminance data and two color difference data.

FIG. 6 is a schematic diagram for explaining shuffling processing in a conventional digital video tape recorder device.

FIG. 7 is a schematic diagram for explaining a framing process in a conventional digital video tape recorder device.

[Explanation of symbols]

 1 Digital video tape recorder recording system 2 Luminance data (Y) input terminal 3 Color difference data (RY) input terminal 4 Color difference data (BY) input terminal 5 Recording system low-pass filter 6 Blocking circuit 7 DCT circuit 8 Simple framing circuit 9 Recording coding circuit 10 Recording system amplification circuit 11 Recording head 12 Video tape 13 Quantization circuit 14 Blocking / deblocking video RAM 15 Inverse quantization circuit 22 Playhead 23 Playback system amplification circuit 24 Playback Encoding circuit 25 Simple deframing circuit 26 Inverse DCT circuit 27 Deblocking circuit 28 Low-pass filter for reproduction system 29 Luminance data (Y) output terminal 30 Color difference data (RY) output terminal 31 Color difference data (BY) Output terminal

Claims (4)

[Claims] 1. A low-pass filter for removing high-frequency components from video data, a video data from the low-pass filter is divided into data blocks having a predetermined number of pixels, and a predetermined number of the data blocks are collected to form a processing unit block. A block forming means for forming and outputting the above, an orthogonal transforming means for performing an orthogonal transform processing for each processing unit block from the block forming means, and an output, and a processing unit block subjected to the orthogonal transform processing by the orthogonal transforming means. Quantizing means for performing quantization processing for each and outputting after compressing, and the level of each data block forming the processing unit block from the quantizing means is compared with a predetermined threshold level, and data of the threshold level or more is compared. , A data block below the threshold level in the same data block, Framing means for performing framing processing that is divided and assigned so as not to exceed the threshold level, recording data forming means for forming recording data of a recording unit from processing unit blocks subjected to the framing processing by the framing means, and the recording data The low-pass filter has a recording means for recording the recording data from the forming means on a recording medium. A video data recording device characterized by removing a range component. 2. The orthogonal transform means is a discrete
The video data recording device according to claim 1, wherein the video data recording device is a cosine / conversion circuit. 3. A low-pass filter removes high-frequency components from the video data so that there is no data above the threshold level at the stage of framing processing, and a predetermined block from the video data from the low-pass filter by blocking means. A processing unit block is formed by collecting a predetermined number of the data blocks, the processing unit block is subjected to an orthogonal transformation process for each processing unit block, and the quantization unit performs the above processing. Quantize and compress for each unit block,
By the framing means, the level of each data block forming the compressed processing unit block is compared with a predetermined threshold level, and data above the threshold level is converted into a data block below the threshold level in the same data block. Framing processing is performed such that the framing processing is divided and assigned so as not to exceed the threshold level, recording data forming means forms recording data of a recording unit from the processing unit block subjected to the framing processing, and the recording means forms a recording medium on a recording medium. A video data reproducing device for reproducing the recorded data recorded, comprising reproducing means for reproducing the recorded data from the recording medium, and a processing unit to which the framing processing is applied from the recorded data reproduced by the reproducing means. Play block Processing unit block forming means, and deframing means for performing deframing processing for returning to the processing unit block data of the threshold level or higher allocated in the same data block to the original data before the allocation. , An inverse quantization means for performing dequantization processing on the processing unit block from the deframing means, decompressing and outputting the dequantized means, and an inverse orthogonal processing for applying an inverse orthogonal transform processing to the processing unit block from the dequantization means and outputting Converting means, and a deblocking means for reproducing a plurality of data blocks consisting of a predetermined number of pixels from the processing unit block from the inverse orthogonal transforming means, and reproducing and outputting video data from the data blocks, In the video data reproduced by the deblocking means,
A video data reproducing device having a low-pass filter for performing processing for reducing deterioration of an image due to loss of high frequencies and outputting the processed image. 4. The recording data to be recorded on the recording medium is subjected to discrete cosine conversion processing by the orthogonal transform means at the time of recording, and the inverse orthogonal transform means is the discrete cosine. 4. The video data reproducing apparatus according to claim 3, wherein the processing unit block subjected to the conversion processing is subjected to inverse discrete cosine conversion processing and then output.