JP3297475B2 - Display control device and method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control apparatus and method, and more particularly to a display control apparatus and method which can maintain a display state updated by applying an electric field or the like, for example, by using a ferroelectric liquid crystal as an operating medium for updating a display. The present invention relates to a display control device and method for a display device having a display element.

[0002]

2. Description of the Related Art In general, a display device is used as an information display means for performing a visual expression function of information in an information processing system or the like.
Display devices are widely known.

In display control in a CRT display device, C
A write operation of the system-side CPU to a video memory as a display data buffer of the RT side;
For example, the reading and display operations of the display data from the video memory by the CRT controller included in the side are performed independently of each other.

In the case of CRT display control as described above,
The writing of display data to the video memory to change the display information and the operation of reading the display data from the video memory and displaying it are independent, so the program on the information processing system takes into account any display timing, etc. There is an advantage that desired display data can be written at an arbitrary timing without the necessity of performing.

The operation of reading display data from the video memory and displaying the data is performed by sequentially reading display data from the video memory and determining a position to be displayed on a CRT by using a horizontal synchronization signal, a vertical synchronization signal, and a blank signal. The display data is transmitted in synchronization with the above.

On the other hand, a CRT, in particular, requires a certain length in the thickness direction of a display screen, and therefore has a large volume as a whole, making it difficult to reduce the size of the entire display device.
This also impairs the degree of freedom in using such an information processing system using a CRT as a display, that is, the degree of freedom in installation location, portability, and the like.

A liquid crystal display (hereinafter, referred to as LCD) can be used to compensate for this. That is,
According to the LCD, it is possible to reduce the size (particularly, the thickness) of the entire display device. Some of such LCDs include the above-described ferroelectric liquid crystal (hereinafter, FLC: Ferroselect).
There is a display (hereinafter, referred to as an FLCD: FLC display) using a liquid crystal cell of the liquid crystal (Ric Liquid Crystal), and one of its features is that the liquid crystal cell has a display state preserving property when an electric field is applied. It is in. That is, in the FLCD, the liquid crystal cell is sufficiently thin, and the molecules of the elongated FLC therein are oriented in the first stable state or the second stable state depending on the direction of application of the electric field, and the electric field is removed. However, the respective alignment states are maintained.

[0008] Due to such bistability of FLC molecules,
An FLCD has a memory property. Such FLC and F
The details of the LCD are described in, for example, Japanese Patent Application No. 62-76357.

As a result, when driving the FLCD,
Unlike CRTs and other liquid crystal displays, there is a margin of time in the continuous refresh driving cycle of the display screen.
Apart from the continuous refresh driving, the partial rewriting driving for updating the display state of only the portion corresponding to the change on the display screen becomes possible.

Because of the above-mentioned characteristics, it is more difficult to produce a display having multiple gradations with continuity in display color tone than in the case of a CRT. A binarization process such as an error diffusion method, an ED method, or a dither method is performed on the display in advance, so that an apparent multi-tone display is performed.

The hardware cursor is a VRA
It has cursor position information and cursor shape information separately from the image information existing on M, and outputs it to the display device using the superimpose function. The cursor that moves on the display screen at high speed is delayed. It is a function to display smoothly on the display screen without any.

[0012]

However, in the above-mentioned conventional example, when the binarization processing is performed on the display side, the information as to whether or not the image is to be binarized is received from the display controller unit as area separation information. ,
Alternatively, it is necessary to make a judgment on the display side from the image data contents. In either method, the sprite expression called the mouse display generally moves on the screen at high speed, so if it is binarized without separation, its outline will not be emphasized and it will be difficult to see When the sprite display moves on the screen, there is a possibility that the part and the surrounding part due to the binarization will differ from the expected image. These are the causes of the deterioration of image quality, especially the instruction pattern displayed by the sprite function is a part of the entire screen that is particularly noticed by the user,
Even a small range of image quality deterioration cannot be ignored.

[0013] In addition, when a function for supporting a hardware cursor is provided, there are the following disadvantages. (1) When the hardware cursor moves at a high speed, there is a disadvantage that the cursor image is destroyed by the procedure of performing partial rewriting. (2) When the hardware cursor moves at high speed, it is necessary to perform partial rewriting at high speed.

Further, when partial rewriting is performed with priority given to the display of the mouse cursor, when the rewriting speed of the screen is reduced, there is a disadvantage that the display moves in synchronization with the mouse cursor but the display quality is reduced.

FIG. 20 shows a display example of a moving object synchronized with the mouse. The display example of FIG. 20 is Microsoft.
A window system such as Windows (Microsoft). The user can move the window by dragging the mouse cursor over the title bar at the top of the window. At this time, the window display and the cursor display move in synchronization. In such a case, if the mouse display is prioritized, the display quality of the moving window is degraded.

The partial rewriting of the FLCD is performed in units of horizontal lines. If the display of the mouse cursor is prioritized, the drawing will be shifted between the line where the mouse cursor is located and another line, and the display will be difficult for the user to see.

[0017]

[0018]

According to the present invention, the presence or absence of an area that moves in synchronization with the mouse cursor is determined. If there is no area that moves in synchronization with the mouse cursor, the mouse cursor is preferentially displayed, and the movement is synchronized with the mouse cursor. An object of the present invention is to improve display of an area of interest of the user without performing priority display of the mouse cursor when there is an area to be displayed.

[0020]

SUMMARY OF THE INVENTION The present invention provides a display device capable of continuous refresh driving of a display screen and partial rewriting driving for updating a display state of a display element according to a change of display data on the display screen. Storage control means for storing display data, access means for accessing said storage means, and determination means for determining whether access by said access means is rewriting by a mouse event or rewriting other than a mouse event. Detecting means for detecting the presence or absence of an area to be moved in synchronization with the movement of the cursor when the rewriting is determined to be a mouse event by the determining means; and determining that the rewriting is not a mouse event by the determining means. Is performed, the partial rewriting drive based on the access by the access unit is performed, and If there is no area to be moved in synchronization with the cursor by the detection of the detection means, the display of the cursor by the partial rewrite drive has priority over the display by the partial rewrite drive when it is not the mouse event. When there is an area which is determined to be rewriting by a mouse event by the determining means and moves in synchronization with the cursor by the detection of the detecting means, display data and the cursor of the area are displayed by partial rewriting driving. Display control means.

Further, the present invention relates to a display control method for a display device capable of continuous refresh driving of a display screen and partial rewriting driving for updating a display state of a display element according to change of display data on the display screen. A step of accessing storage means for storing display data by an access means; a step of determining whether the access by the access means is rewriting by a mouse event or a non-mouse event; and A detection step of detecting the presence or absence of an area to be moved in synchronization with the movement of the cursor when it is determined that the area is to be rewritten;
If it is determined in the determining step that the rewriting is not a mouse event, partial rewriting driving based on the access by the access unit is performed, and it is determined in the determining step that the rewriting is due to a mouse event, and the cursor is detected by the detecting step. If there is no area to move in synchronization with the display, the display of the cursor by the partial rewrite drive is performed in preference to the display by the partial rewrite drive when the mouse event is not the mouse event, and it is determined in the determination step that the rewrite is due to the mouse event. When there is an area that moves in synchronization with the cursor as a result of the detection in the detection step, a display control step of displaying the display data and the cursor in the area by partial rewriting drive.

[0022]

[0023]

[0024]

[0025]

With the above configuration, the present invention focuses on the movement of the cursor, and performs display control according to the movement of the cursor.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of an information processing system provided with a display control device according to one embodiment of the present invention.

Referring to FIG. 1, reference numeral 101 denotes a CPU for controlling the entire information processing system; 102, an arithmetic processor for supporting the arithmetic processing of the CPU 101 at a high speed;
A ROM 104 stores a program or the like for realizing the basic control function of the CPU 101. A main memory 104 stores a program to be executed by the CPU 101 and is used as a work area when executing the program. Also used as screen memory.

Reference numeral 105 denotes a DMA controller (Direct) for transferring data between the main memory 104 and VRAMs to be described later or between these memories and various devices constituting the system without the control of the CPU 101.
Memory Access Control
r, hereinafter referred to as DMAC), 106 is an interrupt controller for controlling hardware interrupt requests generated by various devices constituting the system, 107 is a C-MOS RAM for storing a calendar, a clock function, and non-radiation information. , A backup lithium battery 108 that functions even when the real-time clock 17 is turned off, a keyboard 109 for inputting character information such as various characters and control information, and a like 110. A keyboard controller for controlling the keyboard 109; 111, a hard disk device as an external storage device; 112, an HD for performing data transfer and other controls between the hard disk device 111 and the system;
D (Hard Disk Drive) controller,
Reference numeral 113 denotes a floppy disk device as an external storage device, and 114 denotes an FDD (Fl) for performing data transfer and other controls between the floppy disk device 113 and the present system.
oppy Disk Drive) Controller, 11
Reference numeral 5 denotes a mouse as a pointing device; 116, a mouse controller for performing signal connection between the mouse 115 and the present system; 117, an RS232 for connecting an external input / output device having an RS232C interface;
C interface, 118 is a printer interface for connecting an external printer or other external devices, and 200 is an interface between a display screen using ferroelectric liquid crystal as a display medium and an FLCD controller described later. A display unit (hereinafter, referred to as FLCD) having a signal processing circuit according to one embodiment of the present invention, 240 is an FLCD controller having an interface with the FLCD 200 according to one embodiment of the present invention, and 280 is an FLCD2
A display interface 119 between 00 and the FLCD controller 240 is a system bus composed of a data bus, a control bus, and an address bus for signal connection between the above-described devices.

FIG. 2 is a block diagram showing details of the FLCD controller 240.

A bus interface 241 includes a data bus, a control bus, and an address bus of the system bus 119, and a buffer, a driver, an address decoder, and other circuits for connecting internal circuits of the display controller 240. Analyzes, processes or calculates commands and data sent from devices connected to the system bus 119, thereby passing control signals to a display controller described later, or
A command and data sent from the PU 101 and other devices connected to the system bus 119, or data in a video memory described later are analyzed, processed, or operated, and display data generated by the analysis is stored in the video memory described later. A processor 243 is a display controller and generates various display timings under the control of the display processor 242 or the CPU 101.
Alternatively, display data from the display processor 242 is stored in a video memory described later, and a DRA of the video memory described later is stored.
A refresh operation of the M element is performed.

The display controller 243 reads out data to be displayed together with the control signal from a video memory described later, and outputs it directly or by processing.

Reference numeral 244 denotes a display processor 242, a display controller 243, a video memory readable and writable by the CPU 101 and various devices connected to the system bus 119, and 245 a sprite information such as the mouse 115, and the like. Controller 243 or CPU 101 or other system bus 11
9, a sprite interface 246 for converting the information into a format required by an FLCD interface, which will be described later, and a display signal provided from the display controller 243, a control signal, and a sprite interface 245. This is an FLCD interface for converting the sprite information to be converted into a format required by the FLCD 200.

FIG. 3 is a block diagram showing details of the FLCD 200.

In the figure, reference numeral 201 denotes an FLCD controller interface for exchanging signals with the FLCD controller 240, and 202 denotes an FLCD controller 240.
From the data received from the FLCD controller interface 201 and separated by function.
FLCD controller 240 generated in FLCD 200
Data to be sent to FLCD controller interface 2
The signal separation unit 203 to be passed to 01 receives control-related data from the data separated by the signal separation unit 202, whereby the controller that controls each function in the FLCD 200 and the signal separation unit 204 are separated by the signal separation unit 202. A binarization processing unit that performs binarization processing such as error diffusion and dithering of display data among data;
Whether binarization is performed or not is selected by the control from. When the binarization process is not performed, it has a function of converting the data into data according to the number of display colors on the display screen described later.

Reference numeral 205 denotes data received by the signal separation unit 202 regarding sprite processing, stores the sprite pattern in a sprite memory described later, and reads out the sprite pattern from the sprite memory as necessary. The sprite processing unit sends the data to the sprite memory under the control of the controller 203. Further, when there are a plurality of sprite patterns, the sprite processing unit 205 also selects a sprite pattern.

Reference numeral 206 denotes a sprite memory which performs reading and writing under the control of the sprite processing unit 205, and can store one or a plurality of sprite patterns. Further, the sprite memory 206 can store other necessary control data.

Reference numeral 207 denotes a synthesizing process for synthesizing display data supplied from the binarization processing unit 204 and sprite pattern data supplied from the sprite processing unit 205 at a desired timing and logic, and sending the synthesized data to a display screen described later. The controller 203 controls the timing of synthesis, logic, and other necessary controls.

A display screen 208 is a visual output means.
The display device includes a display device, a driver, and the like. Data for display is supplied from the synthesis processing unit 207, and control signals such as timing signals are supplied from the controller 203.

FIG. 4 is a conceptual diagram showing the control structure of the display device.

Reference numeral 401 denotes an application program operating on the information processing system; 402, a graphic display interface (GDI) in WINDOWS by Microsoft Corporation; 403, a device driver; and 404, hardware. Not included.

Reference numeral 405 denotes a display (DISP) showing a part or all of the display screen of the FLCD 200.

In a general information processing system, the application program 401
It is common to make the system independent of 4 in terms of cost and resources. In this case, the hardware 40
4 is absorbed (or interfaced) by the device driver 403. Now, when handling the control of the graphic screen, the application program 401
It is assumed that the number of colors is represented by the maximum that can be represented by a program so as not to depend on the hardware 404.

This is a general method in consideration of compatibility of the hardware 404 and expandability in the future.

It is assumed that the maximum number of colors that can be handled by the application program 401 is about 16.7 million colors. Each of the three primary colors of red (hereinafter referred to as R), green (hereinafter referred to as G), and blue (hereinafter referred to as B) is a color number represented by 8 bits, that is, a total of 24 bits.

In this case, if the color display capability of the display 405 is 16 colors, it is necessary to convert the expression of about 16.7 million colors into 16 colors. Here, generally, the device driver 403 or the hardware 404 is used.
, A method of simply converting (rounding) about 16.7 million colors 411 into 16 colors 413 using a table 412 (FIG. 5). Similarly, the device driver 403 or the hardware 404 employs an error diffusion method, an ED method, a dither method, or the like. The binarization process 414 is performed, and the binarized 1
This is a method (FIG. 6) for making a six-color expression 415.

It is advantageous in terms of final image quality to use the former method for characters and the like, and the latter method for multi-tone expressions such as photographs and pictures.

When the former method, the latter method, or both are switched and processed, various methods have been proposed for identifying, separating, and switching screen information.
Description is omitted.

In FIG. 4, the application program 401 expresses the number of colors in about 16.7 million colors, the display 405 has a 16-color expression capability, and the application program 401 attempts to express a multi-color such as a photograph or a picture. In this case, the binarization process can be performed by any of the application program 401, the GDI 402, the device driver 403, the hardware 404, and the display 405.

In the case where the binarization processing is performed on the display 405, information indicating whether or not the binarization processing is to be performed is received from the hardware 404 as area separation information, or the display 405 determines whether the binarization processing is to be performed. You can judge.

The former can be realized relatively easily because information can be received from a higher level such as the device driver 403.

In the latter case, since it is necessary to process high-speed image data in real time, the realization thereof is somewhat difficult.

In any method, a sprite display such as an arrow-shaped cursor generally used as a means for visually indicating a position on a display screen moves on the screen at a high speed, so that it can be displayed with other information. If binarization processing is performed centrally without separation, the outline will not be emphasized and it will be difficult to see. Also, for the binarization process,
When the sprite display moves, the spread calculation by binarization of the part and the surroundings is different from what is originally expected, which causes deterioration of the picture quality of a picture or the like.

As for the sprite display, the content is directly written in the video memory 244, and the content is expressed separately by scanning the entire screen, and a memory is separately provided in another area, and a sprite pattern is previously stored in the memory. The sprite pattern is read out of the memory at a desired timing by hardware and is read out from the video memory by setting the position of the sprite pattern to be displayed on the screen in the display controller 243 or the like in advance. Some are controlled by a display controller 240 so as to superimpose on the displayed content and send it to the display unit 200.

The latter is becoming popular because the movement of the sprite pattern can be performed at high speed.

In FIG. 2, the function of the sprite interface 245 does not have a memory for the sprite pattern, but is set by the display processor 242, the display controller 243, the CPU 101, and other devices connected to the system bus 119. Given the sprite pattern to be displayed, its display position, the synthesis logic with the video output, and the like, the information is sent to the display interface 246 in a required format.

The FLCD interface 246 multiplexes this information with the image data from the display controller 243 and multiplexes this information on the same signal line, or this information in its format or after modulating it.
200.

The display controller interface 201 separates various data according to the above-described embodiments, and sends data relating to the display data to the binarization processing unit 204. In addition, control data is passed to the controller 203 in accordance with sprite display information and the like.
05 is passed data relating to sprite display.

The sprite processing unit 205 stores the sprite pattern included in the received data relating to the sprite display in the sprite memory 206.

For example, as shown in FIG. 7, there are a plurality of sprite patterns 420, 421, and 422, and even when these are selected and used, all of these sprite patterns or the one that is frequently used are selected. A plurality can be selected and stored.

FIG. 8 is a conceptual diagram showing an example of the contents stored in the sprite memory 206. The figure shows that the sprite memory 206 has an area in which a plurality of sprite patterns can be stored.

Further, even when the size of the sprite pattern is plural, it can be stored. For example, when the size of the sprite pattern is 64 × 64 bits, the data is 512 bytes, and when the size is 128 × 128 bits, the data is 2 Kbytes.
6 have different capacities, but 450 and 451, respectively.
Can be stored as

In this case, the number of each sprite pattern,
The management of the size and the like is performed by the controller 203.

When a work memory is required for its operation, the controller 203 uses a part of the sprite memory 206 as a control area and uses it for purposes other than storing a sprite pattern.

The sprite processing unit 205 reads out a desired sprite pattern from the sprite memory 206 at a desired timing under the control of the controller 203 during normal operation and performs sprite display at the desired timing, and sends it to the synthesis processing unit 207. .

The synthesizing unit 207 performs a synthesizing process on the signal and the data sent from the binarizing unit 204.

In this case, the logic to be synthesized is directly from the controller 203 or the sprite processing unit 2.
05.

Here, the synthesized data is sent to the display screen 208 as final display data.

FIG. 9 is a flowchart showing a process related to sprite information in a signal sent from the display controller 240 to the display unit 200.

In the figure, first, at power-on or reset (S100), a sprite pattern is stored in the sprite memory 206 (S101). If there is a sprite display (S102), the following processing is performed. Sprite pattern selection (S103), sprite pattern reading (S104), synthesis logic instruction (S105), sprite pattern display color instruction (S106), sprite pattern XY coordinate instruction (S107), sprite pattern display instruction (S108) The signal is separated by the signal separating unit 202 and the control is passed to the controller 203 as a command.

When the speed of command interpretation and execution in the controller 203 is very slow as compared with the transfer speed in the display interface 280,
03, in the case of the display interface 280 having a function of returning an ACK signal (or ready signal) to the display controller 240 every time a command is received, FIG.
As shown in FIG.
By having 209, transfer and execution can be performed smoothly.

(Embodiment 2) Next, Embodiment 2 of the present invention will be described.

FIG. 11 is a block diagram showing details of the FLCD controller 240. In the figure, reference numeral 302 denotes a VRAM for accumulating image information, and 303 denotes a rewriting format generation device, which outputs a partial rewriting address and data to the FLCD 200, and issues an instruction to perform interlace rewriting and partial rewriting. Reference numeral 310 denotes an information signal line for information output from the rewrite format generation device to the FLCD. 30
5 is a position register indicating the position of the hardware cursor on the screen, and 306 is a shape RAM for storing the shape of the hardware cursor. Reference numeral 304 denotes a partial rewrite detection device that detects writing of data to the VRAM 302, the position register 305, and other registers via the computer bus 119. 307 is another register. 3
08 and 309 are signal lines.

VRA via the computer bus 119
M302 and position register 305, shape RAM 30
6. When other information is written to the register 307, the partial rewrite detection device 304 detects the information and notifies the rewrite format generation device 303 via the signal line 308.
Then, the rewrite format generation device 303 sends the FLCD 20 via the signal line 310 according to the rewritten data.
Output data to 0.

FIG. 12 is a flowchart showing the processing performed by the FLCD controller 240 when moving the hardware cursor. In this flowchart, the movement of the cursor is detected by rewriting the position register 305, and the data output processing to the FLCD 200 is performed in the following manner.
This is performed by the rewrite format generation device. That is, whether or not the cursor has moved is determined based on whether or not the position register 305 has been rewritten (S200).

If the cursor has moved, the cursor is displayed in an interlaced manner based on the information in the position register 305 (S201). Next, it is determined whether or not the movement of the cursor has stopped (S202). When the cursor stops, the entire shape of the cursor is displayed (S203).

FIG. 13 is a diagram showing how the cursor moves on the display screen 501. Reference numeral 510 denotes a cursor before movement, 511 and 512 denote cursors being moved, and 513 denotes a cursor after movement.

FIG. 14 shows 510 and 51 in FIG. 13, respectively.
FIG. 9 is a diagram illustrating an example of a dot configuration of cursors 520, 521, 522, and 523 corresponding to 1, 512, and 513. In this example, interlaced display is performed every other dot.

(Embodiment 3) Next, Embodiment 3 of the present invention will be described.

In the second embodiment, the interlaced display is performed when the hardware cursor is moved. However, as a drawing procedure during the movement, a part of the cursor shape is rewritten at every dot in the cursor moving direction. For example, an effect similar to that of the interlaced display can be obtained.

That is, as shown in FIG. 15, the shape of the hardware cursor and the moving direction are matched to determine the display shape at the time of movement, and the shape is displayed when the hardware cursor is moved. In the figure, 550 is the original cursor shape. When the cursor is moved in the upper right direction or the lower left direction, the cursor is displayed in the shape indicated by 551. When moving in the upper left direction or the lower right direction, it is displayed in the shape indicated by 552. In addition, the detection of the moving direction
It can be easily obtained from the values of the position register 305 before and after the movement.

The shape of the hardware cursor is not particularly limited, and even if the interlace is every other dot, n
Every other dot may be used.

If the interlace is every n dots at the time of moving the cursor, it may be variable between 1 and n according to the moving speed of the cursor.

FIG. 16 is a flowchart showing the operation of the third embodiment.

In the figure, the presence or absence of the movement of the cursor is determined by whether or not the position register 305 is rewritten (S
300). When the cursor moves, the position register 3
The movement speed of the cursor is calculated based on the information of step S05 (S3).
01) A cursor is displayed in an interlace every n dots according to the moving speed (S302). Next, it is determined whether the movement of the cursor has stopped (S303). When the cursor stops, the entire shape of the cursor is displayed (S304).

As described above, when the hardware cursor is moved, by displaying the cursor in an interlaced manner, the movement drawing performance of the hardware cursor is improved, and a high-speed response when the hardware cursor is moved becomes possible.

Fourth Embodiment Next, a fourth embodiment of the present invention will be described.

FIG. 17 shows the FLCD interface 240
FIG. 4 is a block diagram showing the details of.

In the figure, reference numeral 601 denotes a VRAM which can be accessed from both the main body CPU 101 and the partial rewrite control circuit 607. The main body side CPU 101
The display data is written to the VRAM 601 as a bitmap via the system bus. At this time, the address data is also sent to the partial rewrite line address storage buffer 605 or the partial display line address storage buffer 606 for priority display. A mouse event detection circuit 602 supplies a mouse event signal to an address storage buffer selector 603 when a mouse drawing operation is detected.
An address storage buffer selector 603 is supplied with a mouse event signal and a mouse cursor priority display signal from the main body side CPU 101, and switches the changeover switch 604 according to these signals. A flowchart of the detailed operation of 603 will be described later. The switch 604 selects one of the partial rewrite line address storage buffer 605 and the priority display partial rewrite line address storage buffer 606 as the storage destination of the partial rewrite address data. 605 is a partial rewrite line address storage buffer. Absolute address data when the CPU 101 accesses the VRAM 601 for rewriting display contents and the like is converted into a display line address and stored in the partial rewrite line address storage buffer 605. The address storage buffer 605 is a double buffer, and the two buffers alternately perform input and output for a fixed period. Reference numeral 606 denotes a partial display line address storage buffer for priority display.
Has the same function as. The reading of the line address from the partial display rewriting line address storage buffer 606 for priority display, which is performed later, is performed prior to the reading of the line address from the partial rewriting line address storage buffer 605. As a result, display data on the VRAM 601 corresponding to the line address stored in the priority display partial rewrite line address storage buffer 606 is preferentially displayed. 607 is a partial rewrite control circuit. The line addresses stored in the partial rewrite line address storage buffer 605 and the priority display partial rewrite line address storage buffer 606 are read out,
The corresponding display data on the VRAM 601 is read. Reference numeral 607 multiplexes display data and address data, and outputs the multiplexed display data to the FLCD. The detailed operation of 607 will be described later. 200 is FLC
D, the display data with address transferred from the FLCD interface is displayed and output for one line on the line specified by the address.

Next, the address storage buffer selector 603
Will be described with reference to the flowchart of FIG.

First, in the judgment S401, the current VRAM 60
It is determined whether or not access to No. 1 is due to a mouse event. This determination is made by the mouse event detection circuit 602 and is notified to the address storage buffer selector 603. This determination is made by monitoring an address accessed when a mouse event occurs. If it is not a mouse event, the address is stored in buffer 605. In step S402, it is determined whether there is any object that moves in synchronization with the mouse. This determination is performed by software such as a device driver and a window manager operating on the main body side CPU 101, and is notified to the address storage buffer selector 603. A method is also conceivable in which the presence or absence of an object that moves in synchronization with the mouse cursor is determined by hardware. If there is nothing to move in synchronization with the mouse cursor, the address is stored in the priority display buffer 606. If there is something that moves in synchronization with the mouse cursor, the address is stored in the buffer 605.

Next, the operation of the partial rewrite control circuit 607 will be described with reference to the flowchart of FIG.

In step S501, the line address is read from the priority display rewriting line address storage buffer 606. In step S502, display data corresponding to the line address is read from the VRAM 601. In step S503, the address and display data are multiplexed and
Send to 00. Steps S501 to S503 are repeated for all the address data in the buffer 606.
In steps S505 to S508, similar processing is performed on the rewrite line address storage buffer 605.
Priority display rewrite line address storage buffer 606
Are performed prior to the processing on the rewrite line address storage buffer 605. This gives 6
06 is displayed preferentially.

With the above processing, when there is no area that moves in synchronization with the mouse cursor, the mouse cursor is preferentially displayed, and when there is an area that moves in synchronization with the mouse cursor, priority display of the mouse cursor is performed. The display that there is no can be performed.

(Embodiment 5) Next, Embodiment 5 of the present invention will be described. The presence or absence of the mouse cursor priority display is determined based on the size of the area that moves in synchronization with the mouse cursor.

FIG. 21 is a block diagram showing details of the FLCD interface 240 according to the fifth embodiment.

In the figure, reference numeral 601 denotes a VRAM which can be accessed from both the main body CPU 101 and the partial rewrite control circuit 607. The main body side CPU 101 writes display data as a bit map into the VRAM 601 via the system bus. At this time, the address data is
Partial rewrite line address storage buffer 605 or priority display partial rewrite line address storage buffer 6
06. Reference numeral 602 denotes a mouse event detection circuit, which detects a mouse drawing operation,
04 is switched to the 606 side. The switch 604 selects either the partial rewrite line address storage buffer 605 or the priority display partial rewrite line address storage buffer 606 as a storage destination of the partial rewrite address data. 605 is a partial rewrite line address storage buffer. Absolute address data when the CPU 101 accesses the VRAM 601 for rewriting display contents and the like is converted into a display line address and stored in the partial rewrite line address storage buffer 605. The address storage buffer 605 is a double buffer, and the two buffers alternately perform input and output for a fixed period. 606
Denotes a partial rewrite line address storage buffer for priority display.
It has the same function as 5. 607 is a partial rewrite control circuit. The line addresses stored in the partial rewrite line address storage buffer 605 and the priority display partial rewrite line address storage buffer 606 are read, and the corresponding display data on the VRAM 601 is read. 607 multiplexes the display data and the address data, and generates FLCD2 as display data with address.
Output to 00. The detailed operation of 607 will be described later. 20
0 is an FLCD, and the FLCD interface 240
The display data with the address transferred from is output for one line to the line specified by the address.

The operation of the partial rewrite control circuit 607 will be described with reference to the flowchart of FIG.

In step S601, the number of lines stored in the partial rewrite line address storage buffer 605 is read. In step S602, it is determined whether the number of lines exceeds a certain value. This value is the performance of the system, FLCD2
An appropriate value is determined from the display speed of 00 or the like. If the value exceeds the predetermined value, a process S603 is performed to cancel the priority display of the mouse cursor. If the value does not exceed the predetermined value, processing S604 and processing S605 are performed in order to give priority display of the mouse cursor. In step S603, the display of the line address in the priority display rewrite line address storage buffer 606 and the data corresponding to the line address in the rewrite line address storage buffer 605 are alternately performed. In step S604, data corresponding to the line address in the priority display rewriting line address storage buffer 606 is displayed. In step S605, data corresponding to the line address in the rewrite line address storage buffer 605 is displayed.

According to the above processing, when the size of the area moved in synchronization with the mouse cursor is smaller than a certain value, the mouse cursor is preferentially displayed, and the size of the area moved in synchronization with the mouse cursor is larger than a certain value. In the case of, a display that priority display of the mouse cursor is not performed can be performed.

[0102]

As described above, according to the present invention, it is determined whether or not rewriting is performed by a mouse event, and further, in the case of rewriting by a mouse event, it is determined whether or not there is an area that moves in synchronization with a mouse cursor. If there is no area that moves in synchronization with the mouse cursor, the mouse cursor is displayed with priority over the normal partial rewrite display.If there is an area that moves in synchronization with the mouse cursor, the mouse cursor is not displayed with priority. Is performed, and the display of the area of interest of the user can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of an information processing system including a display control device according to an embodiment of the present invention.

FIG. 2 is a detailed block diagram of an FLCD controller according to the first embodiment of the present invention.

FIG. 3 is a detailed block diagram of the FLCD according to the first embodiment of the present invention.

FIG. 4 is a conceptual diagram illustrating a control structure of the display device according to the first embodiment of the present invention.

FIG. 5 is a diagram showing conversion of color expression using a table according to the first embodiment of the present invention.

FIG. 6 is a diagram showing conversion of a color expression by performing a binarization processing process according to the first embodiment of the present invention.

FIG. 7 is a diagram showing an example of a sprite pattern.

FIG. 8 is a conceptual diagram showing a storage state of a sprite memory.

FIG. 9 is a flowchart illustrating processing according to the first embodiment of the present invention.

FIG. 10 is a block diagram when a FIFO is used for the FLCD according to the first embodiment of the present invention.

FIG. 11 is a detailed block diagram of an FLCD controller according to a second embodiment of the present invention.

FIG. 12 is a flowchart illustrating processing according to a second embodiment of the present invention.

FIG. 13 is a view showing cursor movement on a display screen.

FIG. 14 is a diagram showing a configuration example of a cursor dot.

FIG. 15 is a diagram illustrating a configuration example of a cursor dot according to the third embodiment of the present invention.

FIG. 16 is a flowchart illustrating processing according to a third embodiment of the present invention.

FIG. 17 is a detailed block diagram of an FLCD interface according to a fourth embodiment of the present invention.

FIG. 18 is a flowchart illustrating processing of an address storage buffer selector according to the fourth embodiment of the present invention.

FIG. 19 is a flowchart illustrating processing of a partial rewriting circuit according to a fourth embodiment of the present invention.

FIG. 20 is a diagram illustrating an example of an area that moves in synchronization with a mouse.

FIG. 21 is a detailed block diagram of an FLCD interface according to a fifth embodiment of the present invention.

FIG. 22 is a flowchart illustrating processing of a partial rewrite control circuit according to a fifth embodiment of the present invention.

[Explanation of symbols]

 101 CPU 102 arithmetic processor 103 ROM 104 main memory 105 DMAC 106 interrupt controller 107 real time clock 108 lithium battery 109 keyboard 110 keyboard controller 111 hard disk device 112 HDD controller 113 floppy disk device 114 FDD controller 115 mouse 116 mouse controller 117 RS232C interface 118 printer interface 119 System bus 200 FLCD 201 FLCD controller interface 202 Signal separation unit 203 Controller 204 Binarization processing unit 205 Sprite processing unit 206 Sprite memory 207 Synthesis processing unit 208 Display screen 240 FLCD 241 Bus interface 242 Display processor 243 the display controller 244 video memory 245 sprite interface 246 FLCD interface 302 VRAM 303 rewrite format generator 304 partial rewrite detector 305 location register 306 shape RAM 307 other registers

──────────────────────────────────────────────────続 き Continuing on the front page (72) Eiichi Matsuzaki, Inventor 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Tatsuya Sakashita 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Non-corporation (72) Inventor Masami Shimakura 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Kenichiro Ono 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (58) Field surveyed (Int.Cl. ⁷ , DB name) G09G 3/00-3/38 G02F 1/133 505-580

Claims (2)

(57) [Claims] 1. A display control device for a display device capable of continuous refresh drive of a display screen and partial rewrite drive for updating a display state of a display element according to change of display data on the display screen, comprising: Storage means for storing the storage means; an access means for accessing the storage means; a determination means for determining whether the access by the access means is a rewrite by a mouse event or a non-mouse event; and a rewrite by a mouse event by the determination means. If it is determined that the rewriting is not a mouse event, the detecting means detects the presence or absence of an area that moves in synchronization with the movement of the cursor. Based on partial rewriting drive based on the mouse event When it is determined that there is no area to move in synchronization with the cursor by the detection of the detection means, the display of the cursor by the partial rewrite drive is performed in preference to the display by the partial rewrite drive when the mouse event is not the mouse event. When there is an area which is determined by the means to be rewritten by a mouse event and moves in synchronization with a cursor by detection of the detection means, display control means for displaying display data and the cursor of the area by partial rewriting drive A display control device characterized by the above-mentioned. 2. A display control method for a display device capable of continuous refresh driving of a display screen and partial rewriting driving for updating a display state of a display element according to a change of display data on the display screen, comprising: A step of accessing the storage unit for storing by the access unit; a step of determining whether the access by the access unit is a rewrite by a mouse event or a non-mouse event; and a rewrite by a mouse event in the determination step. If it is determined that the rewriting is not a mouse event in the detecting step of detecting the presence or absence of an area that moves in synchronization with the movement of the cursor, a portion based on the access by the access means is determined. Rewriting drive is performed, and rewriting is performed by a mouse event in the determination step. If there is no area which is determined and moved in synchronization with the cursor by the detection of the detection step, the display of the cursor by the partial rewrite drive is performed in preference to the display by the partial rewrite drive when the mouse event is not performed, and When there is an area which is determined to be rewriting by a mouse event and moves in synchronization with the cursor by the detection of the detection step, a display control step of displaying the display data and the cursor of the area by partial rewriting drive is provided. Characteristic display control method.