JP3267375B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a solid-state imaging device and manufacturing of the manufacturing method and the thin film transistor having a photoelectric conversion function
More particularly, the present invention relates to a thin film transistor using non-single-crystal silicon having photoelectric conversion characteristics.

[0002]

2. Description of the Related Art Conventionally, amorphous silicon (a-Si) and single-crystal silicon (c-Si) have been used as solid-state imaging devices having a photoelectric conversion function, such as image sensors and photocells for facsimile machines and copier reading devices. And Cd
Photodiodes and photoconductor type cells made of a material made of chalcogen compounds such as S, CdSe, and CdS-Se are generally used.

FIG. 9 shows an example of a reading apparatus using such a solid-state imaging device having a photoelectric conversion function. FIG.
9A is a circuit diagram of a sensor module used in a reading circuit of an image sensor, and FIG. 9B is an enlarged cross-sectional structure diagram of a portion a surrounded by a dotted line in the circuit diagram of FIG. 9A.

In FIG. 9A, reference numeral 91 denotes a TFT;
Denotes a photodiode and 93 denotes a shift register. As clearly shown in FIG. 9B, the TFT 91 and the photodiode 92 are formed on the same quartz glass substrate 94, and the TFT 91 has a polysilicon layer 95 and a gate oxide film 9.
6, the gate electrode 97, and the photodiode 92 includes an amorphous Si layer 100, an amorphous Si layer 101 doped with boron, and an ITO layer 102. In FIG. 9B, reference numeral 98 denotes an oxide film, 99 denotes an electrode, and 103 denotes a passivation film.

As apparent from FIG. 9, in the conventional sensor module, it is necessary to separately manufacture and configure a drive switch portion including the TFT 91 and a photosensor portion including the photodiode 92.

In FIG. 9, a photodiode is used as an optical sensor. In addition, amorphous silicon (a-Si)
Phototransistor using single crystal silicon (c-S
A multi-chip type image sensor using i) has also been proposed.

[0007]

As is apparent from FIG. 9, the conventional solid-state imaging device has a structure of a sensor and a drive switch, and it is necessary to manufacture the drive switch and the sensor separately. Therefore, there are problems in that the number of steps for manufacturing the device, such as a process for manufacturing the sensor, a process for manufacturing the drive switch, and a process for combining them, is increased, which lowers the yield of the device and increases the cost.

In addition, since a sensor composed of a photodiode, for example, has no amplifying action, it is necessary to provide an external amplifying circuit. Besides, a proposed as an optical sensor
Since a phototransistor using -Si has a low photoresponse speed, there is a need for a countermeasure for facsimile G3 or the like, and there is a problem in the stability and reliability of an element film, so that it has not been put to practical use.

Further, in a multi-chip type image sensor using c-Si, it is difficult to obtain a gray scale due to a large variation in elements, and thus a complicated circuit is required. Moreover, it is difficult to connect the chips, and it is difficult to obtain good image quality due to variations among the chips.

In addition, since it is a contact type image sensor structurally, there is a problem that an expensive selfoc lens must be used. Accordingly, an object of the present invention is to provide a solid-state imaging device having a uniform amplification function over a large area and having an optical sensor function.

[0011]

In order to achieve the above object, according to the present invention, a source region 6 and a drain region 6 'are provided in a crystallized non-single-crystal silicon layer as shown in FIG. A thin film transistor (hereinafter, referred to as TFT) 10 including an active layer 3 to be irradiated with light is formed. Soshi
Trap density at the interface between the gate insulating film and the silicon layer by 5
× 10 ¹¹ / cm ² or less.

[0012]

As a result, the TFT 10 can be configured to have an optical sensor function and amplification characteristics, and a large number of TFTs 10 can be formed on a large-area substrate, so that a large area can be obtained without using an optical sensor such as a photodiode. A solid-state imaging device having uniform photoelectric conversion characteristics can be obtained.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a sectional view showing the structure of a TFT according to an embodiment of the present invention. FIGS. 2 and 3 are diagrams for explaining a manufacturing process of the TFT shown in FIG. 1, and FIGS. FIG. 4 is a characteristic diagram of a TFT. FIG. 7 is an explanatory view of the operation principle of the non-single-crystal TFT constituting the solid-state imaging device of the present invention.

In FIG. 1, 1 is a glass substrate, 2 is Si
O ₂ film, 3 is the active layer, 4 'denotes a gate insulating film, 5' denotes a gate electrode, the source region 6, 6 'is the drain region, 7 denotes an insulating film, 8 electrodes, 10 respectively indicate a TFT.

The manufacturing process of the TFT constituting the solid-state imaging device of the present invention will be described with reference to FIGS. (1) For example, 7059 (trade name) glass manufactured by Corning Incorporated is used as the substrate 1, and an SiO ₂ film 2 is formed on the substrate 1 by a sputtering method to a thickness of 3000 ° (FIG. 2).
(A)).

(2) Next, an amorphous silicon (a-Si) film 3 is formed on this SiO ₂ film to a thickness of 800 ° by LPCVD (see FIG. 2B). The film forming conditions at this time are as follows.

Si ₂ H ₆ gas 100 to 500 SCCM He gas 500 SCCM Pressure 0.1 to 1 Torr Heating temperature 430 to 500 ° C. (3) Next, for the amorphous silicon film 3 formed by the above (2), An annealing step is performed.

This annealing step is performed to crystallize the a-Si film 3 formed by the LPCVD method. In this embodiment, excimer laser annealing (for example, Kr
F) to obtain a crystallized non-single-crystal silicon film.

The conditions of the annealing step are as follows. Substrate temperature 300-450 ° C. Power 250-450 mJ / cm ² Wavelength 248 nm Pulse width 30 nsec (4) The island 3 ′ is formed by patterning the crystallized non-single-crystal Si film subjected to the above-mentioned annealing step (FIG. 2). (C)).

(5) An SiO ₂ film 4 serving as a gate insulating film is formed to a thickness of 1500 ° on the substrate 1 including the islands 3 ′ by a TEOS (tetraethoxysilane) method (see FIG. 2D). .

The conditions for forming the gate insulating film 4 are as follows. TEOS gas 10 to 50 SCCM O ₂ gas 500 SCCM Power 50 to 300 (W) Heating temperature 400 ° C. (6) Next, an a-Si layer 5 serving as a gate electrode is formed thereon to a thickness of 1000 ° by a plasma CVD method. (Figure 2
(E)).

The conditions for forming the a-Si layer 5 are as follows. SiH ₄ gas 10 to 50 SCCM 5% PH ₃ / H ₂ gas 5 to ₂₀ SCCM Pressure 0.1 to 0.5 Torr Power 50 to 500 (W) Heating temperature 200 to 400 ° C. (7) Etching and gate insulation with the gate electrode layer The film is patterned to form a gate insulating film 4 'and a gate electrode 5' (see FIG. 2F).

(8) On the island 3 ′ formed of the crystallized non-single-crystal Si layer, the gate insulating film 4 ′ is used as a mask to ion-dope, for example, phosphorus (P) in the region to be the source region 6 and the drain region 6 ′. Doping by the method (Fig. 3
(A)).

(9) Heat at 550 ° C. for 5 hours in a nitrogen atmosphere to activate the dopant and crystallize the a-Si layer 5 for the gate electrode. (10) Further, for example, heating is performed in a hydrogen atmosphere at 400 ° C. for 30 minutes to perform hydrogenation to reduce defect levels of the semiconductor layer.

(11) An SiO ₂ film 7 serving as an interlayer insulating film is formed to a thickness of 4000 ° over the entire substrate by the TEOS method. Si
The conditions for forming the O ₂ film 7 are as follows.

TEOS gas 10 to 50 SCCM O ₂ gas 500 SCCM Power 50 to 300 (W) Heating temperature 400 ° C. After forming the SiO ₂ film 7, patterning is performed to form a contact hole (see FIG. 3B).

(12) Next, an aluminum film for an electrode is formed and then patterned to form an aluminum electrode 8 as shown in FIG. 1 to complete a TFT. In the above (8), boron (B) may be used instead of phosphorus (P).

The manufactured TF thus formed
T of the drain current (I _D) - the gate voltage (V _G) characteristics shown in FIG. Diagram when the graph A solid line with no light irradiation in 4 I _D -V _G characteristics, dotted Graph B during irradiation I
It indicates _D -V _G characteristics curve C of the dashed line shows the photocurrent.

The field effect mobility of this TFT is 70 c
m ² / V · sec, V _th = 2.3 V, trap density Nt
= 3.9 × 10 ¹¹ / cm ² . As is clear from FIGS. 4A and 4B, this TFT exhibits sensitivity to external light. That is, the value of the time Graph A without light irradiation, since the graph B shows the value of the time of light irradiation, graph C is this difference, exhibit photosensitivity of the TFT, the gate voltage V _G is about 7. 5
Above V, there is no difference in characteristics between the graphs A and B, and the drain current _ID is constant.

Therefore, as is apparent from FIG.
_In the region of _G <0, there is a clear difference between the I _D value at the time of light irradiation and the I _D value at the time of no light irradiation, and this difference in the I _D value is used as a reading output, that is, as an output for light sensitivity. Can be used.

The operation of the present invention will be described with respect to the operation principle of a MOS structure TFT using a silicon semiconductor crystal, for example, a case where a MOS structure TFT is formed on n-type Si.

FIG. 7 shows an energy level diagram near the surface of n-type non-single-crystal silicon having a MOS structure. FIG. 7A shows a case where no light is irradiated from the outside, and FIG. Each energy level when irradiated is shown.

In FIG. 7, reference numeral 71 denotes a gate oxide film, and 72 denotes n-type non-single-crystal silicon. In FIG. 7A, there is a Fermi level Ef near the conduction band when light is not irradiated. However, when irradiated from the outside, as shown in FIG. 7B, electrons move from the valence band to the conduction band, and as a result, the Fermi level Ef shifts toward the center, and the gate oxide film 71 The density of traps existing at the interface with the substrate increases, and the function of the acceptor becomes stronger.

[0034] will be a shift of the Fermi level Ef shift the flat band potential of the MOS structure in the negative towards, the drain current (I _D) versus gate voltage (V _G) characteristics in the thin film transistor of this structure The threshold voltage (V _th ) will be shifted in the negative direction.

[0035] V in (I _D -V _G) characteristics of the TFT _th
Is expressed by the following equation.

[0036]

(Equation 1)

Here, Nt indicates the trap density of the MOS structure, Cox indicates the capacitance of the gate oxide film, and K indicates the coefficient. As is apparent from the above equation (1), the value of the equation (1) may be increased to increase the photosensitivity of the TFT having the MOS structure. It must be as close to 1 as possible.

That is, Nt needs to be sufficiently small, and in the present invention, when a-Si is crystallized, a short pulse width laser anneal such as excimer laser anneal is used so that Nt is sufficiently small. It realizes crystalline silicon.

For application to the solid-state imaging device of the present invention, Nt is required to be at a level of 5 × 10 ¹¹ / cm ² . In addition, the photosensitivity characteristics of the TFT having the MOS structure according to the present invention can be described as follows.

The light sensitivity of the TFT of the present invention is TF shown in FIG.
It is considered to be due to photoexcited carriers generated by light absorption in the active layer 3 of T10. That is, photoexcited carriers generated by light absorption are collected at the interface between the gate insulating film 4 ′ and the active layer 3 ′, and as a result, a displacement ΔV _th of the threshold voltage V _th occurs.

ΔV _th can be expressed by the following equation.

[0042]

(Equation 2)

In the equation (2), Qo indicates the total amount of charges (photoexcited carriers) excited by light, and Cox indicates the capacity of the gate insulating film 4 '. Thus equation (2) from the change of the TFT is sufficient threshold voltage V _th, i.e., that the photoexcited carriers in order to show the [Delta] V _th is not consumed in the course, i.e., present at the interface of the gate insulating film 4 'and the active layer 3 It is necessary that the trap density Nt be small.

Generally, crystallized non-single-crystal silicon TFT
Varies greatly depending on the manufacturing method. For example, when an active layer is formed by thermal crystallization (600 ° C. or lower) of amorphous silicon manufactured by the LPCVD method, the trap density Nt is about 8 × 10 ¹¹ / cm ² , When crystallization of porous silicon is performed by excimer laser annealing, for example, Nt becomes 3.9.
A value as small as × 10 ¹¹ / cm ² can be obtained.

In general, when a polycrystalline silicon TFT is formed on a glass substrate by a low-temperature process at 600 ° C. or less, it is said that Nt is determined by the grain boundary of the polycrystalline silicon (for example, Levinson et al.).
J. Appl. Phys. Vol52, pp1193-
1202 (1982)).

Further, FIG. 5 shows that the activation energy with respect to the gate voltage of the non-single-crystal SiTFT crystallized by excimer laser annealing according to the present embodiment and the non-single-crystal SiTFT thermally crystallized after solid phase growth. The correlation is shown.

In FIG. 5, a graph A shows a change in the former activation energy, and a graph B shows a change in the latter activation energy according to the present invention. As is clear from the graph B in FIG. 5, the non-single-crystal SiTFT crystallized by excimer laser annealing of the present embodiment has a gate voltage (V _G ).
Has a negative activation energy in the positive region, indicating that almost no effect of the grain boundary appears in this region.

From these facts, in the excimer laser annealing of this embodiment, since the annealing is performed in a short time, the crystallization proceeds to the very end of the crystal grain boundary and grows to a structure close to a single crystal during the crystallization of the amorphous phase. As a result, it is considered that the trap density (Nt) is small.

Accordingly, in the TFT manufactured in this embodiment, the total amount Qo of the photoexcited carriers of the formula (2) is changed according to the intensity of the incident light, and as a result, ΔV _th is moved to, for example, the negative side. Become. This is an amplifying effect by light in consideration of the operation principle of the TFT, and has the function of a phototransistor.

FIG. 6 shows an illuminance of 1000 l at a wavelength of 565 nm.
Light from the yellow LED, the x is a diagram showing the photosensitivity characteristics of the TFT when the incident is the case of the gate voltage V _G = -10V. The horizontal axis indicates the trap density, and the vertical axis indicates the light sensitivity.

In practice, a light sensitivity of two digits or more is useful.
Therefore, the trap density is 5 × 10¹¹/ Cm^TwoLess than
It is clear that the value of? In addition,
The reading of the amplification of the light output is I_DCurrent and light
I without shooting _DIt is necessary to measure the difference in current.

In this embodiment, an example in which excimer laser annealing is used as annealing for crystallization of amorphous Si has been described. However, the present invention is not limited to this. Is 5 × 1
What is necessary is just to be 0 ¹¹ / cm ² or less.

In one embodiment of the present invention, the trap density is 5
Since a crystallized non-single-crystal silicon TFT having a value of × 10 ¹¹ / cm ² or less has a photoelectric conversion function, for example, as shown in FIG. By using an element, that is, a switch element having photosensitivity, the imaging element can be simplified.

In FIG. 8, 10 is a non-single-crystal silicon TFT having a photoelectric conversion function, 11 is a bias power supply,
Indicates a video line, and 13 indicates a gate line. In FIG. 8, the output of the non-single-crystal silicon TFT can be changed with high sensitivity according to the light irradiated between the source and the drain.

[0055]

According to the present invention, a highly sensitive TFT having a photoelectric conversion characteristic and an amplification characteristic can be obtained. In addition, this TFT can be manufactured from the same material as other circuit elements, and a solid-state imaging device that can serve both a drive switch function and an optical sensor function having uniform characteristics on a large-area substrate can be formed. .

[Brief description of the drawings]

FIG. 1 is a cross-sectional configuration diagram of a non-single-crystal TFT according to one embodiment of the present invention.

FIG. 2 is a part of a diagram illustrating a manufacturing process of a non-single-crystal TFT according to an embodiment of the present invention.

FIG. 3 is an explanatory view of the next step of FIG. 2 in the explanatory view of the manufacturing steps of the non-single-crystal TFT according to one embodiment of the present invention.

FIG. 4 is a characteristic diagram of a non-single-crystal TFT according to one embodiment of the present invention.

FIG. 5 shows a non-single-crystal TFT and another TF according to an embodiment of the present invention.
FIG. 4 is a characteristic comparison diagram of T.

FIG. 6 is a characteristic diagram of a non-single-crystal TFT according to one embodiment of the present invention.

FIG. 7 is a diagram illustrating the operation principle of the non-single-crystal TFT of the present invention.

FIG. 8 is a circuit diagram using a non-single-crystal TFT according to one embodiment of the present invention.

FIG. 9 is an explanatory diagram of a conventional solid-state imaging device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 3 'Active layer 4' Gate insulating film 5 'Gate electrode 6 Source region 6' Drain region 10 TFT

Continuing on the front page (72) Inventor Mitsumumi Kodama 398 Hase, Atsugi-shi, Kanagawa Prefecture Inside Semiconductor Energy Laboratory Co., Ltd. (72) Inventor Kazushi Sugiura 398 Hase, Atsugi-shi Kanagawa Prefecture Inside Semiconductor Energy Laboratory Co., Ltd. (72) Invention Person Ichiro Takayama 398 Hase, Atsugi-shi, Kanagawa Semiconductor Energy Laboratory Co., Ltd. Inside Semiconductor Energy Laboratory Co., Ltd. (72) Inventor Naoya Sakamoto 398 Hase, Atsugi City, Kanagawa Prefecture Inside Semiconductor Energy Laboratory Co., Ltd. (56) References JP-A-61-7766 (JP, A) JP-A-2-78217 (JP) JP-A-63-9978 (JP, A) JP-A-62-104021 (JP, A) JP-A-4-119670 (JP, A) JP-A-6-88973 (JP, A) (58) survey the field (Int.Cl. ^7, D Name) H01L 27/146 H01L 21/336 H01L 29/786 H01L 31/10

Claims (3)

(57) [Claims] [Claim 1 further comprising an amorphous silicon non-single-crystal silicon layer crystallized by irradiating a pulsed laser, a gate electrode close contact with the gate insulating film and the gate insulating film intimate contact with said silicon layer, said Gate insulating film and the silicon
The trap density at the interface of the layer is 5 × 10 ¹¹ / cm ² or less.
A solid-state imaging device in which a thin film transistor provided over a substrate is used as an optical sensor in a state where a gate voltage having a potential opposite to that of channel induction is applied to the gate electrode. 2. The pulse laser according to claim 1, wherein
Is a solid-state imaging device , which is an excimer laser . 3. The method according to claim 1, wherein the substrate is a glass substrate.
A solid-state imaging device, which is a plate .