JP3398195B2 - TFT phototransistor, method of manufacturing the same, and optical sensor circuit using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TFT phototransistor having a photoelectric conversion function and a method for manufacturing the same, and in particular, provides a TFT phototransistor having a large area and excellent in productivity, and uses the same. The present invention relates to providing an optical sensor.

[0002]

2. Description of the Related Art Conventionally, amorphous silicon (a-Si), single crystal silicon (c-Si), Cds, CdSe have been used as photoelectric conversion devices such as image sensors and photocells for facsimile machines and readers of copying machines. , Cd
A photodiode or a photoconductor type cell configured by using a material composed of a chalcogen compound such as S-Se is generally used.

FIG. 7 shows an example of a reading device using such a solid-state image pickup device having a photoelectric conversion function. Figure 7
FIG. 7A is a circuit diagram of a sensor module used for a reading circuit of an image sensor, and FIG. 7B is an enlarged cross-sectional configuration diagram of a portion a surrounded by a dotted line in the circuit diagram of FIG. 7A.

In FIG. 7A, 91 is a TFT and 92 is
Is a photodiode, and 93 is a shift register. As clearly shown in FIG. 7B, the TFT 91 and the photodiode 92 are formed on the same quartz glass substrate 94, and the TFT 91 includes a polysilicon layer 95 and a gate oxide film 9.
6, the gate electrode 97, and the photodiode 92 includes an amorphous Si layer 100, a boron-doped amorphous Si layer 101, and an ITO layer 102. In FIG. 7B, 98 is an oxide film, 99 is an electrode, and 103 is a passivation film.

As is apparent from FIG. 7, in the conventional sensor module, it is necessary to separately manufacture and configure the drive switch portion including the TFT 91 and the photosensor portion including the photodiode 92.

Although a photodiode is used as an optical sensor in FIG. 7, in addition to this, amorphous Si (a-S) is used.
Phototransistor using i), single crystal silicon (c
A multi-chip type image sensor using -Si) has also been proposed.

[0007]

By the way, the conventional solid-state image pickup device has a structure of an optical sensor + a driving switch, as is apparent from FIG. 7 , and it is necessary to separately manufacture the driving switch and the optical sensor. Therefore, there are problems that the number of steps for manufacturing the device, such as the step of manufacturing the optical sensor, the step of manufacturing the drive switch, the step of connecting them, is increased, the yield of the apparatus is deteriorated, and the cost is increased. .

Further, since the optical sensor itself composed of a photodiode does not have an amplifying action, it is necessary to provide an amplifying circuit outside. In addition, a proposed as an optical sensor
Since the phototransistor using -Si has a slow optical response speed, it has not been put into practical use because there is a need for countermeasures for the G3 correspondence of a facsimile and the stability and reliability of the element film. .

Further, in a multi-chip type image sensor using c-Si, it is difficult to obtain gradation due to a large variation between chips, which requires a complicated circuit. Moreover, it is difficult to connect the chips, and it is difficult to obtain good image quality.

Further, since it is a contact type image sensor structurally, there is a problem that it is necessary to use an expensive SELFOC lens. Therefore, an object of the present invention is to provide a TFT having a photosensor function, which has a uniform amplifying function over a large area.
It is to provide a phototransistor.

[0011]

In order to achieve the above object, the present invention has a crystallized non-single crystal silicon layer having a source region 6 and a drain region 6 ', as shown in FIG. A thin film transistor (hereinafter referred to as a TFT) 10 including an active silicon layer 3 which is irradiated with light is formed. At this time, an amorphous Si film is formed on the active silicon layer 3 by using Si ₂ H ₆ gas, and the temperature is set to 500 ° C. to 650 ° C.
Solid phase growth is performed in an inert gas at a temperature of 4 to 50 hours to form a gate oxide film 4'by dry oxidation or wet oxidation at 900 ° C to 1100 ° C.

[0012]

As a result, a large number of TFTs 10 having an optical sensor function and amplification characteristics can be formed on a large-area substrate. Therefore, it is possible to provide a solid-state imaging device having uniform photoelectric conversion characteristics on a large-area substrate without using a photosensor such as a photodiode.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A TFT phototransistor and a method of manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a sectional view showing the structure of a TFT phototransistor which is an embodiment of the present invention, and FIGS.
FIG. 4 is a manufacturing process diagram of the TFT phototransistor shown in FIG. 1, and FIG. 4 is a characteristic diagram of the TFT phototransistor of one embodiment of the present invention.

In FIG. 1, 1 is a substrate and 2 is SiO 2.
₂ films, 3 is an active layer, 4'is a gate insulating film, 5'is a gate electrode, 6 is a source region, 6'is a drain region, 7 is an insulating film, 8 is an electrode, and 10 is a TFT phototransistor.

The manufacturing process of the TFT phototransistor of the present invention will be described with reference to FIGS. (1) For example, a quartz substrate is used as the substrate 1, and a SiO ₂ film 2 is formed on the substrate 1 by a sputtering method to a thickness of 3000 Å (see FIG. 2A).

(2) An amorphous silicon (a-Si) film 3 is formed on the SiO ₂ film 2 by LPCVD to a film thickness of 2000 Å (see FIG. 2B). The film forming conditions at this time are as follows.

Si ₂ H ₆ gas 100 to 500 SCCM He gas 500 SCCM pressure 0.1 Torr heating temperature 430 to 500 ° C. (3) Next, the amorphous silicon film 3 formed by the above (2) is annealed. Perform the process.

This annealing step is carried out to crystallize the a-Si film 3 formed by the LPCVD method. In this embodiment, solid phase growth is performed in an atmosphere of an inert gas such as N ₂ to crystallize. To convert.

The conditions are as follows. N ₂ 1 SLM TEMP 600 ° C. processing time 15 hr (4) The non-single crystal Si film crystallized by the annealing process is patterned to form an island 3 ′ (see FIG. 2C).

(5) The substrate 1 including the island 3'is thermally oxidized to form a 1000 Å gate oxide film 4 (see FIG. 2D). The conditions for forming the gate oxide film 4 are as follows.

O ₂ 2.7 SLM TEMP 1000 ° C. processing time 150 min In this step, 1000 Å of gate oxide film 4 is formed.
Not only for the purpose of forming the film, but also for annealing the non-single crystal Si film forming the island 3'by this heat treatment. This annealing can improve the characteristics of the TFT phototransistor.

(6) Next, an a-Si layer 5 to be a gate electrode is formed on the gate oxide film 4 by plasma CVD to form 10
A film is formed to a thickness of 00Å (see FIG. 2 (E)). This a-
The film forming conditions for the Si layer 5 are as follows.

SiH ₄ gas 10 to 50 SCCM 5% PH ₃ / H ₂ gas 5 to 20 SCCM pressure 0.1 to 0.5 Torr power 50 to 500 (W) heating temperature 200 to 400 ° C. (7) Gate by etching The electrode layer and the gate insulating layer are patterned to form a gate insulating film 4'and a gate electrode 5 '(see FIG. 2F).

(8) On the island 3'comprised of the crystallized non-single-crystal Si layer, with the gate insulating film 4'as a mask, the region to be the source region 6 and the drain region 6'is P in the case of Nch, and Pch. In the case of, B is doped by the ion doping method. In the case of FIG. 3A, an example of doping P is shown.

(9) Heating in a nitrogen atmosphere at 550 ° C. for 5 hours to activate the dopant and a-S for the gate electrode 5 '.
Crystallize the i-layer. (10) Further, for example, it is heated in a hydrogen atmosphere at 400 ° C. for 30 minutes to carry out hydrogenation to reduce the defect level of the semiconductor layer.

(11) A SiO ₂ film 7 serving as an interlayer insulating film is formed in a thickness of 4000 Å on the entire substrate by the TEOS method.
The conditions for forming the SiO ₂ film 7 are as follows. TE OS gas 10 to 50 SCCM O ₂ gas 500 SCCM power 50 to 300 (W) Heating temperature 400 ° C. (12) After forming this SiO ₂ film 7, patterning is performed to form a contact hole (see FIG. 3B). ).

(13) Next, an aluminum film for electrodes is formed.
After the film is patterned, aluminum is used as shown in FIG.
The electrode 8 is formed to complete the TFT. Shape in this way
Drain current (I_D) -Gate voltage
(V_G) Characteristics are shown in FIGS. 4 (A) and 4 (B). Figure 4
In (A) and (B), the gate width (W) is 180μ
m, and the gate length (L) was 20 μm. That
FIG. 4A shows the voltage V between the source and the drain._D= 0.
The case of 1V is shown, and FIG. 4B shows between the source and the drain.
Voltage V_D= 1.00V is shown. Also in each figure
The curve A is I when there is no light irradiation._D-V_GCharacterize
Curve B is I for light irradiation_D-V _GShows the characteristics, curve C shows both
The photocurrent which is the difference between the two is shown. The vertical axis is the log scale
Therefore, V_GIt seems that the curves B and A coincide with each other when becomes larger.
However, the difference is as shown in the curve C.

As is clear from the curves A, B and C of FIGS. 4A and 4B, this TFT exhibits sensitivity to light from the outside. As described above, since the curve A shows the value when there is no light irradiation and the curve B shows the value when there is light irradiation, the curve C, which is the difference, shows the photosensitivity of this TFT.

[0030] Accordingly, as apparent from FIG. 4, there is a clear difference in the I _D value when no I _D value and the light irradiation time of light irradiation, the difference in the I _D value as read output, i.e. It can be used for light sensitivity.

Next, a dark voltage holding type photosensor circuit using the TFT phototransistor of the present invention will be described with reference to FIGS. FIG. 5 shows a circuit diagram of a dark voltage holding type optical sensor circuit of the present invention, and FIG. 6 shows an example of a pattern when this is integrated into an IC.

In FIG. 5, 11 is a TFT constructed according to the first embodiment of the present invention, 12 is a switch, which is a P-channel type TFT 13 and an N-channel type TFT 14.
It is composed of Further, R ₁ is a resistor and C ₁ is a capacitor.

First, the operation of FIG. 5 will be described. First of all, the TFT 13 is left with the TFT 11 in the dark state.
Switch signal SW to the gate of
Apply switch signal -SW to turn on switch 12.
The drain voltage V of the TFT 11_DCapacitor C₁To
Hold. At this time, V is applied to the gate of the TFT 11._GIs applied
As a result, the TFT 11 has gm · V _GBased on
An electric current flows. And this current causes resistance R₁At
A voltage drop occurs, which results in a resistance R₁And TFT11 connection
Partial voltage V_D0Is the capacitor C₁Held as a dark potential
Be done. Then, the switch 12 is turned off. The above gm
Is the ratio of the TFT channel length to the channel width, the mobility,
Gate applied voltage V_GAnd is determined based on the threshold
It

Next, the TFT 11 is irradiated with light. As a result, the resistance value between the source and the drain of the TFT 11 is reduced, a large amount of current flows, and the resistance R ₁ and the TFT 11 and the resistance R ₁
The voltage V _D1 at the connection point with the light irradiation becomes lower than the dark potential V _D0 held by the capacitor C ₁ . This voltage V _D1 is determined by the light irradiation intensity.

At this time, when the switch 12 is turned on,
Since the charge of the capacitor C ₁ held at the dark potential V _D0 flows through the TFT 11, the amount of discharge can be measured by the ammeter 15. This discharge current continues until the dark potential V _D0 of the capacitor C ₁ drops and becomes equal to V _D1 . The total amount of electric charges discharged is the TFT 11
Since it is determined by the amount of light (intensity) incident on, it is possible to measure the amount of incident light by measuring this.

Since the TFT 11 has a constant current characteristic, the intensity of the incident light can be measured even if the ammeter 15 is connected between the resistor R ₁ and the power supply voltage circuit V _DD . That is, when the discharge of the capacitor C ₁ starts, the current does not flow from the power supply side, and as the discharge decreases, the current gradually increases from the power supply side, whereby the intensity of the incident light can be measured.

[0037] Since in practice the amount of discharge is determined depending on the difference between V _D0 and V _D1, knowing this V _D0 and V _D1, the light intensity can be determined. By the way, when a large number of TFT phototransistors are used to make, for example, an image reading apparatus for a facsimile, the mobility or threshold value of the TFT phototransistor varies depending on the process, so that the characteristics become non-uniform and each dot of the facsimile The dark current value of the TFT phototransistor that outputs is not uniform.

If the dark current value of the TFT phototransistor for each dot is not uniform, it is difficult to discriminate between the dark current value and the current value in the irradiation state as it is.
The drain voltage value of each FT phototransistor is measured, that is, the dark potential is stored in the ROM, and the output of this ROM is compared with the actual drain voltage value of the TFT phototransistor at the time of use to determine whether the dark state or the light state. It is necessary to determine whether it is the irradiation state.

Therefore, the TF for each bit is manufactured and shipped.
It is necessary to measure and store the dark state drain voltage of the T phototransistor, that is, the dark potential V _D0 , individually. Therefore, it is extremely expensive.

In order to improve this, in the second embodiment of the present invention, as shown in FIG. 5, the drain voltage at the dark current for each bit, that is, the dark potential V _D0 is held by the capacitor C ₁ . Then, this V _D0 may be compared with the drain voltage V _D1 of the TFT phototransistor when light is actually irradiated to determine whether it is in a light irradiation state or a dark state, that is, “1” or “0”.

To determine the gradation output, V _D0, that is, the terminal voltage C _ID of the capacitor C ₁ is set to a plurality of reference values between 0 and C ₁₀ in accordance with an appropriate gradation output, and image reading is performed. It suffices to determine which one corresponds to the drain voltage V _D1 at that time.

For this purpose, for example, the switch 12 is turned on to hold the dark potential V _D0 in the capacitor C ₁ prior to one scan of image reading. Then the C ₁₀ and V _D1 when the binarization during image reading, when the multi-value by comparing the plurality of reference values and V _D1 of the may be determined intensity of the light.

FIG. 6 shows an example of a pattern when the dark voltage holding type photosensor circuit shown in FIG. 5 is integrated into an IC. Figure 6
(A) is a front view of the whole, (B) is A in (A)
-A 'sectional view, (C) is a BB' sectional view in (A). In FIG. _6A , V _DD is a power supply voltage application circuit, GND is a ground circuit, and V _G is a gate voltage application circuit.

In FIG. 6, the TFT phototransistor 11 has a polysilicon layer 23 used as an active layer.
And a gate oxide film 25, a gate electrode polysilicon wiring layer 24, an interlayer insulating film layer 22, an Al wiring layer 21, and the like. Although the resistor R ₁ is formed when the gate electrode polysilicon wiring layer 24 is formed, it may be formed of course when the source / drain is formed.

The capacitor C ₁ is composed of the active layer polysilicon layer 23, the gate oxide film 25, the gate electrode polysilicon wiring layer 24 and the like. Since the gate oxide film 25 is thinner than the interlayer insulating film layer 22, this structure is adopted. However, the capacitor may be formed by using the interlayer insulating film layer.

The TFT 12 is a polysilicon layer 23 for the active layer.
A gate oxide film 25, a gate electrode polysilicon wiring layer 24, an interlayer insulating film layer 22, an Al wiring layer 21 and the like.

The present invention is not limited to the above-mentioned embodiments, but is within the scope described in the claims. In the present invention, 500 ° C to 650 ° C
The reason for solid phase growth at the temperature of 4 to 50 hours is as follows.

That is, after the active Si layer is formed into an a-Si film, the temperature is 500 ° C.
Even if annealed at the following temperature, the crystallization of the active layer does not proceed,
Unless the temperature is 500 ° C. or higher, the active layer having good characteristics as a TFT phototransistor is not crystallized.
Further, even if annealing is performed at 650 ° C. or higher, crystal grains do not grow, the grain size does not increase, and the characteristics deteriorate. Moreover, if this annealing is performed for 4 hours or less, the activation is insufficient.
The characteristics are the same as those of 50 hours even if it is carried out for 0 hours or more, which is meaningless. Further, as the inert gas, not only N ₂ gas but also He, for example, can be used.

The gate oxide film is formed at 900 ° C. to 1100 ° C.
The reason for oxidation is as follows. At 900 ° C. or lower, the properties of the oxide film deteriorate and the breakdown voltage decreases. If the temperature is 1100 ° C. or higher, quartz as the substrate will be damaged. In this case, the oxidation may be dry oxidation or wet oxidation. Moreover, in this high temperature oxidation step, a good quality active layer can be obtained.

[0050]

According to the present invention, a TFT phototransistor can be formed by a high temperature process TFT using Si ₂ H ₆ . This makes it possible to increase the area and provide products with excellent productivity.

Further, by providing a dark voltage holding type reading circuit as the reading circuit, there is a margin for the variation of the TFT, and the solid-state image pickup device having a lower cost and higher productivity than the differential type reading using two TFTs. Can be obtained.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a TFT phototransistor that is an embodiment of the present invention.

FIG. 2 is a part of a manufacturing process explanatory diagram of a TFT phototransistor according to an embodiment of the present invention.

FIG. 3 is an explanatory view of the next step of FIG. 2 among the explanatory views of the manufacturing steps of the TFT phototransistor according to the embodiment of the present invention.

FIG. 4 is a characteristic diagram of a TFT according to an embodiment of the present invention.

FIG. 5 is a circuit diagram of a dark voltage holding type optical sensor according to a second embodiment of the present invention.

FIG. 6 is an example of an IC pattern of the optical sensor circuit of FIG.

FIG. 7 is an explanatory diagram of a conventional solid-state imaging device.

[Explanation of symbols]

1 substrate 2 SiO ₂ film 3 silicon film 3'to be an active layer 3'island 4 gate oxide film 4'gate insulating film 5 a-Si layer 5'gate electrode 6 source region 6'drain region 7 insulating film 8 electrode

─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Mitsufumi Kodama 398 Hase, Atsugi City, Kanagawa Prefecture, Semiconductor Energy Laboratory Co., Ltd. (56) Reference JP 4-206969 (JP, A) JP 5-136386 (JP, A) JP 59-107583 (JP, A) JP 64-50558 (JP, A) JP 47-22752 (JP, A) Jitsukaihei 2-8055 (JP, U) (JP, A) 58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 31/10

Claims (6)

(57) [Claims] 1. An active Si layer 3 formed by solid-phase growth of a-Si using Si ₂ H ₆ gas at a temperature of 500 ° C. to 650 ° C. for 4 hours to 50 hours in an inert gas. , on the active Si layer 3, provided with a gate oxide film 4 'formed by dry oxidation or wet oxidation at a temperature of 900 ° C. C. to 1100 ° C., and wherein the doped source and drain regions of the same material TFT phototransistor. 2. An active Si layer is formed by using Si ₂ H ₆ gas to
-Si film formation, this is solid-phase grown in an inert gas at a temperature of 500 ° C to 650 ° C for 4 hours to 50 hours, and a gate oxide film is formed by dry oxidation or wet oxidation at a temperature of 900 ° C to 1100 ° C. Then, the method for manufacturing a TFT phototransistor is characterized in that the source region and the drain region are doped with the same material . 3. A TFT phototransistor and a dark voltage holding means connected in parallel to the TFT phototransistor via a switch means are provided, and after the dark voltage of the TFT phototransistor is held by the dark voltage holding means, the TFT phototransistor is turned on. With the light irradiation state, the TFT phototransistor in this state
An optical sensor circuit characterized in that the intensity of light is discriminated by the voltage of the input voltage and the voltage of the dark voltage holding means . 4. The optical sensor circuit according to claim 3, wherein the TFT phototransistor is formed by the method of claim 1. 5. A resistor is connected between the TFT phototransistor and a power source, and the resistor is connected to the TFT.
4. The photo sensor circuit according to claim 3, wherein the photo sensor circuit is formed at the same time when the gate polysilicon or the source / drain of the photo transistor is formed. 6. The optical sensor circuit according to claim 3, wherein the dark voltage holding means is composed of a capacitor, and the capacitor is formed at the same time when the gate oxide film or the interlayer insulating film is formed.