JP3263655B2 - Key input circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a key input circuit comprising a key input terminal and a key output terminal to form a key matrix circuit. The present invention relates to a key input circuit that suppresses a malfunction due to incoming noise.

[0002]

2. Description of the Related Art In recent years, as the functions of car stereos have become more sophisticated, it has become necessary to increase the number of segments and to perform multiple key inputs (such as CD changer control). On the other hand, in response to an increase in the number of segments and multiple key inputs, there is a demand for reducing costs by reducing the wiring between the front panel on which the LCD display and key inputs are concentrated and the main body PCB.

In order to meet these demands, an LCD driver having a key input circuit built into the LCD driver has been developed. FIG. 2A is a diagram showing a general key matrix circuit 10, in which certain key output terminals KS1, KS
2, KS3, KS4, and KS5 are pressed at desired timings, so that desired key input terminals KI1, KI2, K
I3, KI4 and KI5 are selected and send a signal to the key input circuit. An example of a general key matrix circuit is described in Japanese Patent Application Laid-Open No. 58-215814.

FIG. 3 is a circuit diagram showing a noise absorbing circuit for absorbing noise entering the key input circuit. The noise absorbing circuit 1 includes, for example, a signal ("H", "L") is received by a pair of the first Schmitt circuit 2 (corresponding to the signal "H") and the second Schmitt circuit 3 (corresponding to the signal "L"), and constitutes a delay circuit Output via 4 and 5.
Reference numerals 6 and 7 denote first and second transmission gates which are a combination of P-channel and N-channel transistors for selecting the first and second Schmitt circuits 2 and 3, respectively.

The key output terminal KS6 is in a power save mode (a microcomputer or key input is accepted,
A state in which the device does not operate and consumes no power, also referred to as a sleep mode. ), The key output terminals KS1, KS2,
When any key of the key output terminal KS6 is pressed by a key switch for receiving a key operation by KS3, KS4 and KS5, oscillation of an oscillation circuit (not shown) is started, and a key scan operation described later is performed.

[0006]

The above-mentioned LCD driver has a key scan function, and can be used for a car stereo, a VTR, and the like.
Etc. buttons are controlled. Here, as described above, the key input terminals KI1 to KI5 and the key output terminals KS1 to KS
6, the key matrix circuit 10 is formed. In this case, the key input terminal KI line and the key output terminal KS line are arranged very close to each other, so that no key is pressed during the power save mode. Nevertheless,
At the rising or falling timing of the output signals of the key output terminals KS1 to KS6, the key input terminals KI1 to KI1 are output.
Noise may be put on the KI5.

If the lines of the key input terminals KI1 to KI5 and the signal lines of another LSI (main microcomputer) are arranged next to each other, the key input terminal KI1 is set at the rising or falling timing of the input signal.
To KI5. When this noise (see FIG. 2B) is received by the key input terminals KI1 to KI5 (see FIG. 2A), the key input is received, and L
The SI shifts from the power save mode to the operation mode. In this configuration LSI, the key scan is executed twice to detect the coincidence of the key data. In this case, it is determined that the key input is not correct, and the power is input without malfunction. Return to save mode.

However, each time noise occurs, an unnecessary operation such as performing a key scan operation is performed repeatedly even though no key operation is performed, resulting in a problem that extra power is consumed. Also,
In an LSI that does not include a matching circuit for detecting key data matching as described above, a key scan operation is performed despite no key operation, and not only extra power is consumed, but also There is also a problem that an unnecessary display is performed.

The noise absorption circuit 1 (see FIG. 3A) in which the Schmitt circuits 2 and 3 are provided in the conventional key input circuit cannot absorb the above-described noise. That is, such Schmitt circuits 2 and 3 have threshold values (VtH and VtL), respectively. When noise exceeds the threshold value Vt (for example, VtH), it is recognized as "H" level, and the pulse is recognized. Will be transmitted. As described above, only the noise absorbing circuit 1 provided with the conventional Schmitt circuits 2 and 3 does not absorb the noise input to the input side as shown in FIG.
There was a problem of malfunction.

[0010] Accordingly, it is an object of the present invention to provide a key input circuit that suppresses a malfunction that occurs when noise is applied to a key input terminal.

[0011]

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems, and its features are as follows.
In a key input circuit using a Schmitt circuit,
The first and second capacitors 8 and 9 are connected to the output portions that determine the threshold values of the second Schmitt circuits 2 and 3,
The noises received by the Schmitt circuits 2 and 3 are absorbed by the capacitors 8 and 9.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the key input circuit of the present invention will be described below with reference to the drawings.
The same components as those of the conventional configuration are denoted by the same reference numerals, and the description will be simplified. In FIG. 1A, for example, a noise absorption circuit 1 of a key input circuit converts a signal (“H”, “L”) input to a key input terminal KI1 into a pair of first Schmitt circuits 2 (signal “H”). ) And the second Schmitt circuit 3 (corresponding to the signal "L"), and output via the inverters 4 and 5 constituting the delay circuit.
Reference numerals 6 and 7 denote first and second transmission gates which are a combination of P-channel and N-channel transistors for selecting the first and second Schmitt circuits 2 and 3, respectively.

Reference numerals 8 and 9 denote thresholds (VtH, VtL) of the first Schmitt circuit 2 and the second Schmitt circuit 3, respectively.
First and second connected respectively to the output part
The capacitors 8 and 9 absorb noise that could not be absorbed by the noise absorbing circuit of the key input circuit provided with the conventional Schmitt circuit (see FIG. 1 (b)). Does not output noise.

Thus, even if the key is not pressed in the power save mode as conventionally generated, the key input terminal KI is generated at the rising or falling timing of the output signal of the key output terminals KS1 to KS6.
By adding noise to 1 to KI5, unnecessary operations such as performing a key scan operation even though no key operation is performed each time noise is input are eliminated, and unnecessary power is reduced. The problem of consumption can be solved.

[0015]

According to the present invention, the key input is performed at the rising or falling timing of the output signals of the key output terminals KS1 to KS6 even though the key is not pressed in the power save mode as conventionally occurred. Since noise is applied to the terminals KI1 to KI5, unnecessary operations such as performing a key scan operation even though no key operation is performed each time noise is input are eliminated, and unnecessary power is saved. No more consumption.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a key input circuit according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a conventional key matrix circuit.

FIG. 3 is a circuit diagram showing a conventional key input circuit.

[Explanation of symbols]

 1: noise absorption circuit of key input circuit 2: first Schmitt circuit 3: second Schmitt circuit 8: first capacitor 9: second capacitor

Claims (2)

(57) [Claims] 1. A key input circuit using a Schmitt circuit, wherein a capacitor for absorbing noise is connected to an output portion of the Schmitt circuit. 2. A key input circuit comprising a key matrix circuit including a key input terminal and a key output terminal, wherein a noise input to the key input terminal is converted by a Schmitt circuit and a capacitor connected to an output portion of the Schmitt circuit. Key input circuit characterized by absorption.