JP3253821B2 - Method of manufacturing multi-stage surface mount hybrid IC - Google Patents
Method of manufacturing multi-stage surface mount hybrid ICInfo
- Publication number
- JP3253821B2 JP3253821B2 JP09195395A JP9195395A JP3253821B2 JP 3253821 B2 JP3253821 B2 JP 3253821B2 JP 09195395 A JP09195395 A JP 09195395A JP 9195395 A JP9195395 A JP 9195395A JP 3253821 B2 JP3253821 B2 JP 3253821B2
- Authority
- JP
- Japan
- Prior art keywords
- surface mount
- double
- substrate
- sided
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
Description
【０００１】[0001]
【産業上の利用分野】本発明は、多段式面実装ハイブリ
ッドＩＣの製造方法に関する。The present invention relates to a process for producing a multi-stage surface mount hybrid I C.
【０００２】[0002]
【従来の技術】従来の面実装ハイブリッドＩＣにおいて
は、ユニット上の部品実装密度を上げるためには、図５
に示すように、多層化したベース基板２１を使用してこ
れに実装部品２２を装着したり、図６に示すように、両
面実装基板３１を使用してその両面に実装部品３２を装
着し、浮かせ用の面実装タイプの端子３３を取り付けて
いた。なお、図５において、２３は半田付け用ランドを
示している。2. Description of the Related Art In a conventional surface mount hybrid IC, in order to increase the component mounting density on a unit, FIG.
As shown in FIG. 6, a mounting component 22 is mounted on the base board 21 using a multilayered board, and as shown in FIG. 6, a mounting component 32 is mounted on both sides of the base board 21 using a double-sided mounting board 31. The terminal 33 of the surface mounting type for floating was attached. In FIG. 5, reference numeral 23 denotes a soldering land.
【０００３】[0003]
【発明が解決しようとする課題】しかし、図５に示すよ
うな多層基板を使用する形式では、セラミック多層基板
の生産には印刷回数が多くなることや、特殊なグリーン
シート（セラミック基板の焼く前の柔らかい状態のも
の）を使用したり、プレスを使用しなければならない
等、材料及び設備の点で制約が大きかった。また、ガラ
エポ等樹脂基板を使用するにしても基板の表面積の範囲
でしか部品を実装することができなかった。However, in the case of using a multi-layer substrate as shown in FIG. 5, the production of a ceramic multi-layer substrate requires a large number of printings or a special green sheet (before the ceramic substrate is baked). , Etc.), and a press must be used, and the restrictions on materials and equipment were great. Further, even when a resin substrate such as glass epoxy is used, components can be mounted only within the surface area of the substrate.
【０００４】一方、図６に示すように、両面実装基板３
１を使用する形式では専用のベース及び浮かせ用の端子
３３が必要となる等の欠点があった。On the other hand, as shown in FIG.
The type using 1 has a drawback that a dedicated base and a terminal 33 for floating are required.
【０００５】本発明の目的は、多段式面実装ハイブリッ
ドＩＣにおける実装部品をより高密度に装着しつつ、多
段式面実装ハイブリッドＩＣを従来の設備・工程をその
まま使用することができて容易に製造することができる
製造方法を提供することにある。An object of the present invention is to provide a multi-stage surface mount hybrid.
It is an object of the present invention to provide a manufacturing method capable of easily manufacturing a multi-stage surface mounting hybrid IC by using conventional equipment and processes as it is , while mounting components mounted on the integrated IC at a higher density .
【０００６】[0006]
【０００７】[0007]
【０００８】[0008]
【課題を解決するための手段】上記の目的を達するた
め、 本発明の多段式面実装ハイブリッドＩＣの製造方法
は、両面基板に面実装部品を自動装着すると共に、該両
面基板の所定位置に上記面実装部品よりも高さの高い複
数の接続端子を併せて自動装着し、該接続端子の上に第
２の両面基板を載置することを特徴とする。 The above object has been achieved.
Therefore, the method for manufacturing a multi-stage surface-mounted hybrid IC of the present invention includes automatically mounting surface-mounted components on a double-sided substrate and connecting a plurality of connection terminals having a height higher than the surface-mounted components at predetermined positions on the double-sided substrate. Automatic mounting is also performed, and the second double-sided board is placed on the connection terminal.
【０００９】[0009]
【作用】両面基板に自動装着装置を用いて面実装部品を
装着すると共に、該両面基板の所定位置に上記面実装部
品よりも高さの高い複数の接続端子を併せて自動装着す
る。次に、上記接続端子の上に、同じく自動装着装置で
面実装部品を装着した両面基板を載置する。The surface mounting component is mounted on the double-sided substrate using an automatic mounting device, and a plurality of connection terminals having a height higher than the surface mounting component are automatically mounted at predetermined positions on the double-sided substrate. Next, a double-sided board on which surface mounting components are mounted is also mounted on the connection terminals by the automatic mounting apparatus.
【００１０】上記のようにして載置された上位の両面基
板の上には更に第３，第４・・・というように複数の両
面基板を積み重ねることもできる。A plurality of double-sided boards such as third, fourth,... Can be further stacked on the upper double-sided board placed as described above.
【００１１】上記のようにして多段化することにより、
例えば、両面基板を２段重ねとした場合は、パターンと
しては４層基板同等の、また、部品実装面積としては３
層分が可能となり、約３倍の表面積が部品実装面として
使用することができる。[0011] By multi-stage as described above,
For example, when two-sided boards are stacked in two layers, the pattern is equivalent to a four-layer board and the component mounting area is 3
Layering is possible, and about three times the surface area can be used as a component mounting surface.
【００１２】また、両面基板間の接続端子は穴通し等の
端子ではなく、上下とも面実装としているため基板の反
対面に対して何ら影響を与えず自由な配置ができるメリ
ットがある。Also, since the connection terminals between the two-sided substrates are not terminals such as through holes, but are mounted on the upper and lower surfaces, there is an advantage that free arrangement can be made without any influence on the opposite surface of the substrate.
【００１３】製造に際しては、両面基板への面実装部品
の装着及び端子の実装等は従来の自動装着装置をそのま
ま使用することができると共に上位の基板の配置等も自
動装置を用いることができるから、特別な設備を要する
ことなく容易に実施することができる。At the time of manufacturing, the conventional automatic mounting device can be used as it is for mounting the surface mount components on the double-sided board and mounting the terminals, etc., and the automatic device can also be used for the arrangement of the upper board. It can be easily implemented without requiring special equipment.
【００１４】[0014]
【実施例】本発明の多段式面実装ハイブリッドＩＣの製
造方法の実施例を図１及び図２に基づいて説明すると、
図１は２段式面実装ハイブリッドＩＣに適用した場合の
側面図、図２は４段式実装ハイブリッドＩＣとした場合
の側面図である。To explain on the basis of an embodiment of a manufacturing <br/> method for producing a multi-stage surface mount hybrid I C of EXAMPLE present invention in FIGS. 1 and 2,
FIG. 1 is a side view showing a case where the present invention is applied to a two-stage type surface mount hybrid IC, and FIG. 2 is a side view showing a case where a four-stage type mount hybrid IC is used.
【００１５】両面基板は、一般的に、セラミックのマザ
ー基板１に対し厚膜印刷によりパターンを形成してあ
り、上面１１には通常の基板と同様に回路パターン１ａ
が、また、下面１２にはクリーム半田により半田付けす
るためのランド部１ｂと一部回路パターン１ｃがそれぞ
れ形成されている。The double-sided board is generally formed by forming a pattern on a ceramic mother board 1 by thick-film printing, and a circuit pattern 1a is formed on the upper surface 11 similarly to a normal board.
However, a land portion 1b and a partial circuit pattern 1c for soldering with cream solder are formed on the lower surface 12, respectively.
【００１６】 このような両面基板を使用し、最下段の
ベース基板１Ａの上面１１には従来より使用されている
自動装着装置（図示しない）を用いて部品２を実装する
と共に、該基板１Ａの所定位置に上記部品２よりも高さ
の高い複数個の接続端子３を併せて自動装着する。Using such a double-sided board, the component 2 is mounted on the upper surface 11 of the lowermost base board 1A by using a conventionally used automatic mounting device (not shown), and A plurality of connection terminals 3 taller than the component 2 are automatically mounted at predetermined positions.
【００１７】 上記ベース基板１Ａの上に配置される上
位基板２Ａとしては実施例では両面スルーホールセラミ
ック基板を用い、下面１２には部品４を、上面１１には
部品５をそれぞれ実装すると共にベース基板１Ａとの間
に配置された上記接続端子３をクリーム半田にて半田付
けする。In the embodiment, a double-sided through-hole ceramic substrate is used as the upper substrate 2A disposed on the base substrate 1A, the component 4 is mounted on the lower surface 12 , and the component 5 is mounted on the upper surface 11 , respectively. The connection terminal 3 disposed between the terminal 1A and the terminal 1A is soldered with cream solder.
【００１８】接続端子３は４本又は上下基板の接続に必
要な本数で、電源アース、信号線の接続及び基板間のス
ペース維持のために使用している。The number of connection terminals 3 is four or the number required for connection between the upper and lower substrates, and is used for power supply ground, connection of signal lines, and maintenance of space between the substrates.
【００１９】 図１ではベース基板１Ａと上位基板２Ａ
との２段構造としたが、図２のように、上記の構造と同
様にして上位基板２Ａ，３Ａ，４Ａを順次積み重ねて多
段化することができ、これによって更に高密度化するこ
とができる。In FIG. 1, the base substrate 1A and the upper substrate 2A
However, as shown in FIG. 2, the upper boards 2A, 3A, and 4A can be sequentially stacked to form a multi-stage structure as shown in FIG. 2, thereby further increasing the density. .
【００２０】また、実施例では上位の基板２Ａとして両
面スルーホールセラミック基板を使用したが、両面２層
の樹脂基板を使用することにより低価格で実施すること
ができる。また、上部にシールドケース等を取り付ける
ことにより、この多段式面実装ハイブリッドＩＣをテー
ピング又はトレイ供給等により自動装着することも可能
となる。Further, in the embodiment, a double-sided through-hole ceramic substrate is used as the upper substrate 2A. However, by using a resin substrate having two layers on both sides, the present invention can be implemented at low cost. Further, by attaching a shield case or the like to the upper part, it becomes possible to automatically mount the multi-stage surface mount hybrid IC by taping or supplying a tray.
【００２１】[0021]
【００２２】[0022]
【発明の効果】本発明の多段式面実装ハイブリッドＩＣ
の製造方法によれば 、両面基板への面実装部品の装着及
び端子の実装等には従来の自動装着装置をそのまま使用
することができると共に上位の基板の配置等にも自動装
置を用いることができるから、特別な設備を要すること
なく容易に、実装部品をより高密度に装着した多段式面
実装ハイブリッドＩＣを製造することができる。 According to the present invention, a multistage surface mount hybrid IC of the present invention is provided.
According to the method of manufacturing, the use of automated equipment to arrangement of the upper substrate together with the mounting and mounting such a terminal of the surface mount components on the double-sided substrate can be used as a conventional automatic mounting apparatus Multi-stage surface with higher density of mounted components easily without special equipment
A mounted hybrid IC can be manufactured .
【図１】本発明の多段式面実装ハイブリッドＩＣの製造
方法によって製造された多段式面実装ハイブリッドＩＣ
の実施例を示し、基板を２段式とした場合の側面図。FIG. 1 shows the manufacture of a multistage surface mount hybrid IC of the present invention.
-Stage surface mount hybrid IC manufactured by the method
The side view in the case of showing Example of 2 and making a board | substrate into a two-stage type.
【図２】基板を４段式とした場合の側面図。FIG. 2 is a side view of a case where the substrate is a four-stage type.
【図３】両面基板を説明するための平面図。FIG. 3 is a plan view illustrating a double-sided board.
【図４】両面基板を説明するための底面図。FIG. 4 is a bottom view for explaining the double-sided board.
【図５】従来の多層基板を用いた面実装式のハイブリッ
ドＩＣを示す側面図。FIG. 5 is a side view showing a conventional surface mount hybrid IC using a multilayer substrate.
【図６】両面実装基板に面実装タイプの端子を取り付け
た従来の面実装ハイブリッドＩＣの側面図。FIG. 6 is a side view of a conventional surface mount hybrid IC in which surface mount type terminals are attached to a double-sided mount board.
１ マザー基板 １１ 上面 １２ 下面 １ａ 上面側の回路パターン １ｂ ランド部 １ｃ 下面側の一部回路パターン １Ａ ベース基板 ２Ａ 上位基板 DESCRIPTION OF SYMBOLS 1 Mother board 11 Upper surface 12 Lower surface 1a Circuit pattern on upper surface side 1b Land portion 1c Partial circuit pattern on lower surface side 1A Base substrate 2A Upper substrate
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 1/14 H05K 1/18 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1/14 H05K 1/18
Claims (1)
共に、該両面基板の所定位置に上記面実装部品よりも高
さの高い複数の接続端子を併せて自動装着し、該接続端
子の上に第２の両面基板を載置することを特徴とする多
段式面実装ハイブリッドＩＣの製造方法。 1. When a surface mount component is automatically mounted on a double-sided board.
Both are higher than the surface mount components at the predetermined positions on the double-sided board.
Automatically attach a plurality of tall connection terminals together, and
Mounting a second double-sided substrate on the child
A method for manufacturing a step type surface mount hybrid IC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP09195395A JP3253821B2 (en) | 1995-03-27 | 1995-03-27 | Method of manufacturing multi-stage surface mount hybrid IC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP09195395A JP3253821B2 (en) | 1995-03-27 | 1995-03-27 | Method of manufacturing multi-stage surface mount hybrid IC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08264918A JPH08264918A (en) | 1996-10-11 |
| JP3253821B2 true JP3253821B2 (en) | 2002-02-04 |
Family
ID=14040950
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP09195395A Expired - Fee Related JP3253821B2 (en) | 1995-03-27 | 1995-03-27 | Method of manufacturing multi-stage surface mount hybrid IC |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3253821B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3624798B2 (en) * | 2000-06-07 | 2005-03-02 | 株式会社村田製作所 | Inverter capacitor module, inverter |
| JP3465671B2 (en) | 2000-08-09 | 2003-11-10 | 株式会社村田製作所 | Converter device |
-
1995
- 1995-03-27 JP JP09195395A patent/JP3253821B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08264918A (en) | 1996-10-11 |
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