JP3243449B2 - Flip chip package and underfill method thereof - Google Patents

Flip chip package and underfill method thereof

Info

Publication number
JP3243449B2
JP3243449B2 JP11603898A JP11603898A JP3243449B2 JP 3243449 B2 JP3243449 B2 JP 3243449B2 JP 11603898 A JP11603898 A JP 11603898A JP 11603898 A JP11603898 A JP 11603898A JP 3243449 B2 JP3243449 B2 JP 3243449B2
Authority
JP
Japan
Prior art keywords
chip
substrate
sealing resin
gap
vacuum atmosphere
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11603898A
Other languages
Japanese (ja)
Other versions
JPH11297902A (en
Inventor
健二 神原
一雄 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toray Engineering Co Ltd
Original Assignee
Toray Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Engineering Co Ltd filed Critical Toray Engineering Co Ltd
Priority to JP11603898A priority Critical patent/JP3243449B2/en
Publication of JPH11297902A publication Critical patent/JPH11297902A/en
Application granted granted Critical
Publication of JP3243449B2 publication Critical patent/JP3243449B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、フリップチップ実
装体及びそれのアンダーフィル方法に関するものであ
る。
[0001] 1. Field of the Invention [0002] The present invention relates to a flip chip package and an underfill method thereof.

【0002】[0002]

【従来の技術】従来、ICチップをフェースダウンによ
り基板に位置合せして配置した後、両者を接合してなる
フリップチップ実装体においては、基板とICチップを
強固に固定すると共に、基板とICチップの線膨脹の不
一致に起因して発生する熱応力が、かかる接合部に集中
してクラックが誘発され易くなるのを防止すること等の
為に、ICチップと基板間に形成されている間隙に封止
用樹脂液を充填、すなわち、アンダーフィルが行われて
おり、かつ、既に各種のアンダーフィル方法が提案され
ている。
2. Description of the Related Art Conventionally, in a flip-chip mounting body in which an IC chip is aligned with a substrate face-down and then bonded, a substrate and an IC chip are firmly fixed, and the substrate and the IC are fixed. A gap formed between the IC chip and the substrate to prevent thermal stress generated due to the mismatch of the linear expansions of the chip from concentrating on the joint and inducing a crack easily. Is filled with a sealing resin liquid, that is, underfill is performed, and various underfill methods have already been proposed.

【0003】例えば、特開平8−241900号公報、
特開平7−130794号公報及び特開平9−1720
35号公報においては、ICチップと基板間に形成され
た間隙内を減圧せしめることにより、ICチップの側方
に供給された封止用樹脂液を前記間隙内へ吸引して充填
する所謂、減圧式差圧充填が提案されている。
[0003] For example, JP-A-8-241900,
JP-A-7-130794 and JP-A-9-1720
In Japanese Patent No. 35, a so-called decompression method is used in which a gap formed between an IC chip and a substrate is depressurized to suck and fill the sealing resin liquid supplied to the side of the IC chip into the gap. Type differential pressure filling has been proposed.

【0004】[0004]

【発明が解決しようとする課題】しかし、特開平8−2
41900号公報において開示されている減圧式差圧充
填は、通常の大気雰囲気下においてICチップの側方周
辺の一地域に封止用樹脂液を塗布し、次いで、これを容
器内で加熱しながら、その器内の空気を強制的に排気し
て減圧せしめることにより、かかる封止用樹脂液を、I
Cチップと基板間に形成されている間隙内に充填させる
ものである為、ICチップのバンプが高密度に形成され
ている部分(図2参照)とバンプが形成されていない中
央部分(図2参照)とにおいて充填状態が不均一になり
易い、すなわち、バンプが高密度に形成されている部分
への充填が優先されて中央部分への充填量が不足若しく
は充填されないといった所謂、アンダーフィルの不均一
性が発生し易い欠点を有していた。
SUMMARY OF THE INVENTION However, Japanese Patent Application Laid-Open No. Hei 8-2
In the reduced pressure differential pressure filling disclosed in Japanese Patent No. 41900, an encapsulating resin solution is applied to one area around the side of an IC chip under a normal atmospheric atmosphere, and then, while being heated in a container. By forcibly evacuating the air in the vessel to reduce the pressure, the sealing resin liquid
Since the gap is formed to fill the gap formed between the C chip and the substrate, a portion where the bumps of the IC chip are formed at a high density (see FIG. 2) and a central portion where the bumps are not formed (see FIG. 2). In other words, the filling state tends to be non-uniform, that is, the filling of the portion where the bumps are formed with high density is prioritized, and the filling amount in the central portion is insufficient or not filled. There was a disadvantage that uniformity was easily generated.

【0005】また、特開平7−130794号公報及び
特開平9−172035号公報において開示されている
減圧式差圧充填は、基板のICチップ実装部に貫通せし
められている吸引孔から吸気してICチップと基板間の
間隙内を減圧せしめることにより、通常の大気雰囲気下
においてICチップの側方周辺の全域にわたって孔版印
刷された封止用樹脂液を前記間隙内に充填させるもので
ある為、かかる吸気の制御状態に左右されて前者と同様
にアンダーフィルの不均一性が発生し易い欠点、すなわ
ち、過剰吸気の場合においては、過剰の封止用樹脂液が
吸引孔側へ移送せしめられて前記間隙内に充填すべき樹
脂量が不足して十分な量で封止することが困難になり、
また、それと反対に、過少吸気の場合においては、基板
上に孔版印刷された封止用樹脂液の十分な量が、そこか
ら(ICチップの側方周辺から)前記間隙内に充填され
ず、従って、この場合においても、十分な量で封止する
ことが困難になるといった欠点を有していた。
[0005] Further, in the pressure reducing type differential pressure filling disclosed in Japanese Patent Application Laid-Open Nos. 7-130794 and 9-172035, air is suctioned from a suction hole penetrated through an IC chip mounting portion of a substrate. By reducing the pressure in the gap between the IC chip and the substrate, the gap is filled with the stencil-printed sealing resin liquid over the entire area around the side of the IC chip under a normal atmosphere. The disadvantage that underfill non-uniformity is likely to occur similarly to the former depending on the control state of the intake, that is, in the case of excessive intake, excessive sealing resin liquid is transferred to the suction hole side. Insufficient amount of resin to be filled into the gap makes it difficult to seal with a sufficient amount,
On the contrary, in the case of under-suction, a sufficient amount of the sealing resin liquid stencil-printed on the substrate is not filled into the gap (from the side periphery of the IC chip). Therefore, even in this case, there is a disadvantage that it is difficult to seal with a sufficient amount.

【0006】更に、昨今におけるICチップの高密度化
実装に伴って、バンプ形成のより一層の高密度化及び前
記間隙形成(基板とICチップ間のスキマ)のより一層
の微小化が要求されるようになって充填時間が長くな
り、フィラー混入の樹脂の充填は一層困難を極めてい
る。
[0006] Further, with the recent high-density mounting of IC chips, further higher density of bump formation and further miniaturization of the gap formation (spacing between the substrate and the IC chip) are required. As a result, the filling time becomes longer, and the filling of the resin mixed with the filler becomes more difficult.

【0007】そこで、そのように減圧せしめて差圧充填
するのではなくて、加圧せしめて差圧充填するようにす
ることにより、アンダーフィルの不均一性の発生を防止
し得て、しかも、迅速に充填し得ることを先願(特願平
10−44440)において提案したが、この先願発明
においては、加圧せしめて差圧充填する際、ICチップ
と基板間に形成された間隙からの所謂、エアー抜きの為
に、それ用の貫通孔を基板に設けている関係上、基板に
そのような貫通孔を設けていないフリップチップ実装体
に対しては、応用することができないといった欠点を有
していた。
[0007] Therefore, by performing the differential pressure filling by increasing the pressure instead of performing the differential pressure filling by reducing the pressure as described above, it is possible to prevent the occurrence of non-uniformity of the underfill. It has been proposed in the prior application (Japanese Patent Application No. 10-44440) that it can be quickly filled. However, in this prior invention, when filling by differential pressure by pressurization, the gap between the IC chip and the substrate is reduced. Because of the so-called air vent, the through-holes are provided in the board, so it cannot be applied to flip-chip mountings that do not have such through-holes in the board. Had.

【0008】本発明は、このような欠点に鑑み、それを
解消すべく鋭意検討の結果、真空雰囲気下において基板
上に封止用樹脂液を塗布した後、先願のように大気圧以
上の加圧雰囲気にしないで、かかる真空雰囲気の真空度
を低下せしめるか若しくは通常の大気圧雰囲気にせしめ
て差圧充填を行って、ICチップと基板との間に形成さ
れた間隙内の残存エアーを、基板に設けられている非貫
通孔に封じ込めるようにすることにより、基板にエアー
抜き用の貫通孔を設けていないフリップチップ実装体を
良好にアンダーフィルすることができることを見い出
し、この点に基づいて本発明を完成し得たものである。
[0008] The present invention has been made in view of the above drawback, a result of intensive studies to solve it, after applying the sealing resin solution on a substrate in a vacuum atmosphere, prior application above atmospheric pressure as Instead of a pressurized atmosphere, reduce the degree of vacuum in such a vacuum atmosphere or make it a normal atmospheric pressure atmosphere and perform differential pressure filling to form a gap between the IC chip and the substrate.
The remaining air in the gap is
By enclosing in a through-hole, it was found that a flip-chip mounted body having no through-hole for bleeding air on the substrate could be favorably underfilled, and based on this point, the present invention could be completed. Things.

【0009】[0009]

【課題を解決するための手段】すなわち、本発明に係る
アンダーフィル方法はフリップチップ実装体のICチ
ップと基板との間に形成された間隙に封止用樹脂を充填
させるアンダーフィル方法であって、前記封止用樹脂
を、真空雰囲気下で前記ICチップの側方周辺の全域に
わたって塗布した後、前記真空雰囲気の真空度を低下せ
しめるか若しくは前記真空雰囲気を通常の大気圧雰囲気
にせしめて差圧充填を行うアンダーフィル方法におい
て、前記差圧充填によって前記間隙内の残存エアーを、
前記ICチップのバンプ群で囲まれた中央部分に位置さ
れ、かつ前記間隙に対してのみ開口されるように前記基
板に設けられている非貫通孔に封じ込めることを特徴と
するものである。
Means for Solving the Problems That is, the underfill process according to the present invention, filling the sealing resin in the gap formed between the IC chip and the substrate of the flip chip mounting body
An underfill method in which the sealing resin is applied over the entire area around the side of the IC chip in a vacuum atmosphere, and then the degree of vacuum in the vacuum atmosphere is reduced or the vacuum atmosphere is reduced to a normal level. Underfill method that performs differential pressure filling even at atmospheric pressure
The residual air in the gap by the differential pressure filling,
It is located at the center of the IC chip surrounded by the bumps.
And the base is opened only to the gap.
It is characterized by being sealed in a non-through hole provided in a plate .

【0010】なお、封止用樹脂液の塗布及び差圧充填
は、複数回行うのが好ましく、また、封止用樹脂液の塗
布は、孔版印刷により行うのが好ましく、更に、アンダ
ーフィルしようとするフリップチップ実装体は、基板に
搭載されたICチップのバンプ群で囲まれた中央部分に
位置されるようにICチップと基板との間に形成された
間隙に対してのみ開口れる非貫通孔を、かかる基板に
設けているものが好ましい。
[0010] Incidentally, the coating and the differential pressure filling of the sealing resin solution is preferably carried out several times, also, the coating of the sealing resin solution is preferably carried out by stencil printing, further, the under
-The flip chip package to be filled is
At the center of the mounted IC chip surrounded by bumps
The non-through hole which is opened only for the formed clearance between the IC chip and the substrate to be positioned, which is provided with such a substrate is preferable.

【0011】[0011]

【発明の実施の形態】縦断面図である図1において、フ
リップチップ実装体1は、ICチップ2をフェースダウ
ンにより基板3に位置合せして配置した後、両者を接
合、すなわち、ボンディングして構成されている。な
お、図示されていないが、複数のICチップ2が所定パ
ターンに接合されていると共にICチップ2は、平面図
である図2において示されているように、バンプ4が高
密度に形成されているバンプ形成部分5とバンプが形成
されていない中央部分6とを形成している。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In FIG. 1, which is a longitudinal sectional view, a flip-chip mounted body 1 has an IC chip 2 positioned face-down on a substrate 3 and then bonded, that is, bonded. It is configured. Although not shown, a plurality of IC chips 2 are bonded in a predetermined pattern, and the IC chips 2 are formed by forming bumps 4 at a high density as shown in FIG. 2 which is a plan view. And a central portion 6 where no bump is formed.

【0012】また、フリップチップ実装体1は、水平ス
テージ7で支持されていると共に孔版8は基板3で支持
され、かつ、孔版8に形成されている樹脂溜め部9内に
ICチップ2が配されている。なお、孔版8の上面は、
ICチップ2の上端面より少し上方に位置されている
が、これに限定されず、ICチップ2の上端面と同一レ
ベルに若しくはICチップ2の上端面より少し上方に位
置させてもよく、それらは、必要に応じて選択される。
Further, the flip chip mounting body 1 is supported by the horizontal stage 7, the stencil 8 is supported by the substrate 3, and the IC chip 2 is arranged in a resin reservoir 9 formed in the stencil 8. Have been. In addition, the upper surface of the stencil 8
It is located slightly above the upper end surface of the IC chip 2, but is not limited to this, and may be located at the same level as the upper end surface of the IC chip 2 or slightly above the upper end surface of the IC chip 2. Is selected as needed.

【0013】また、孔版8は、ICチップ2の実装パタ
ーンに対応して樹脂溜め部9を所定パターンに形成して
いると共に樹脂溜め部9は、図3において示されている
ようにICチップ2と相似形状に設けられている。
The stencil 8 has a resin reservoir 9 formed in a predetermined pattern corresponding to the mounting pattern of the IC chip 2, and the resin reservoir 9 is provided on the IC chip 2 as shown in FIG. It is provided in a shape similar to.

【0014】その為、ICチップ2に対して樹脂溜め部
9を所定に位置決めさせた状態に水平ステージ7で孔版
8を支持し、そして、孔版8の上面に封止用樹脂液11
を供給すると共に図示されていないスキージを移動させ
ることにより、封止用樹脂液11を樹脂溜め部9内へ押
し込んで基板2上へ塗布することができる。なお、その
際、樹脂の塗布量が所定に制御されるが、これは、スキ
ージ速度と樹脂溜め部9の間口の大きさとで決められ
る。
For this purpose, the stencil 8 is supported on the horizontal stage 7 with the resin reservoir 9 positioned at a predetermined position with respect to the IC chip 2, and a sealing resin solution 11 is provided on the upper surface of the stencil 8.
Is supplied and the squeegee (not shown) is moved, whereby the sealing resin liquid 11 can be pushed into the resin reservoir 9 and applied onto the substrate 2. At this time, the amount of resin applied is controlled to a predetermined value, which is determined by the squeegee speed and the size of the frontage of the resin reservoir 9.

【0015】また、この状態が図1において示されてい
るが、この孔版印刷は、図示されていない真空チャンバ
ー内において行われる。すなわち、かかる孔版印刷に先
立って真空チャンバー内が、例えば、13・3Pa〜2
66Pa程度の真空度に保たれ、この真空雰囲気下にお
いて孔版8の上面に封止用樹脂11が供給されるとスキ
ージが移動して孔版印刷を行う。
Although this state is shown in FIG. 1, the stencil printing is performed in a vacuum chamber (not shown). That is, prior to the stencil printing, the inside of the vacuum chamber is, for example, 13.3 Pa-2.
The degree of vacuum is maintained at about 66 Pa. When the sealing resin 11 is supplied to the upper surface of the stencil 8 in this vacuum atmosphere, the squeegee moves to perform stencil printing.

【0016】また、スキージは必要に応じて往復動され
るが、スキージの移動方向は、例えば、図1において、
孔版8の右端部に封止用樹脂液11が供給された場合に
おいては、右側から左側へ所定ストローク移動し、次い
で、その後、左側から右側へ移動される。
The squeegee is reciprocated as required, and the squeegee moves in, for example, the direction shown in FIG.
When the sealing resin liquid 11 is supplied to the right end of the stencil 8, the stencil 8 moves from the right side to the left side by a predetermined stroke, and then moves from the left side to the right side.

【0017】なお、真空雰囲気下において封止用樹脂液
11を基板2上に塗布しているのは、ボイドの発生を阻
止するのに有利であるからであり、また、封止用樹脂液
11を孔版印刷によって基板2上に塗布しているのは、
一面にわたって迅速に塗布することができるからであ
る。
The reason why the sealing resin liquid 11 is applied on the substrate 2 in a vacuum atmosphere is that it is advantageous to prevent the generation of voids. Is applied on the substrate 2 by stencil printing.
This is because it can be quickly applied over one surface.

【0018】よって、図1において示されているよう
に、封止用樹脂液11を、ICチップ2の側方周辺の全
域にわたって基板3上に塗布することができるが、この
状態においては、封止用樹脂液11は、ICチップ2と
基板3間の微小間隙12に十分に充填されていない。
Therefore, as shown in FIG. 1, the sealing resin liquid 11 can be applied to the substrate 3 over the entire area around the side of the IC chip 2. The sealing resin liquid 11 is not sufficiently filled in the minute gap 12 between the IC chip 2 and the substrate 3.

【0019】そこで、引き続いて図4において示されて
いるように、孔版印刷時の真空雰囲気の真空度を低下せ
しめるか若しくは真空雰囲気を通常の大気圧雰囲気にせ
しめて差圧充填を行う。なお、真空雰囲気の真空度を低
下せしめることは、例えば、孔版印刷時の13・3Pa
〜266Pa程度の真空雰囲気を1330Pa〜6650
Pa程度の真空雰囲気に制御せしめるように行えばよ
い。
Then, as shown in FIG. 4, subsequently, the degree of vacuum of the vacuum atmosphere at the time of stencil printing is reduced, or the vacuum atmosphere is changed to a normal atmospheric pressure atmosphere, and differential pressure filling is performed. It is to be noted that decreasing the degree of vacuum in the vacuum atmosphere is performed, for example, in 13.3 Pa at the time of stencil printing.
A vacuum atmosphere of about 266 Pa to 1330 Pa to 6650
What is necessary is just to control it to a vacuum atmosphere of about Pa .

【0020】これにより、図1において示されている樹
脂溜め部9内の封止用樹脂液11を所定に加圧せしめ
て、図4において示されているようにフリップチップ実
装体1のICチップ2と基板3間に形成されている微小
間隙12(例えば、50μm)内へ強制的に充填するこ
とができる。
As a result, the sealing resin liquid 11 in the resin reservoir 9 shown in FIG. 1 is pressurized to a predetermined pressure, and as shown in FIG. It can be forcibly filled into the minute gap 12 (for example, 50 μm) formed between the substrate 2 and the substrate 3.

【0021】その際、ICチップ2の側方周辺の全域か
ら加圧されて微小間隙12内へ充填される封止用樹脂液
11によって、そこに残存している微量のエアーが押し
出されてICチップ2の中央部6に集められて封じ込め
られて所謂、ボイドが形成される。しかし、このボイド
は、真空雰囲気下に保たれているから微小であると共に
中央部6にはバンプ4が形成されていないから、アンダ
ーフィルの品質管理上、無視することができる。
At this time, a small amount of air remaining there is extruded by the sealing resin liquid 11 which is pressurized from the entire area around the side of the IC chip 2 and filled in the minute gap 12, and A so-called void is formed by being collected and sealed in the central portion 6 of the chip 2. However, since the voids are kept in a vacuum atmosphere, they are very small, and the bumps 4 are not formed in the central portion 6. Therefore, the voids can be ignored in quality control of the underfill.

【0022】なお、微小間隙12内にエアーが残存する
のは、封止用樹脂液11を塗布する真空雰囲気が、完全
な脱気雰囲気ではない為、封止用樹脂液11をICチッ
プ2の側方周辺の全域にわたって基板2上に塗布する
と、微小間隙12内のエアーがそこに閉じ込められてし
まうからである。
It is to be noted that air remains in the minute gap 12 because the vacuum atmosphere for applying the sealing resin liquid 11 is not a completely degassing atmosphere. This is because if the coating is applied on the substrate 2 over the entire area around the side, the air in the minute gap 12 is trapped therein.

【0023】よって、ICチップ2が、図2において示
されているように、バンプ4が高密度に形成されている
バンプ形成部分5とバンプが形成されていない中央部分
6とを形成したものであっても、両部分に封止用樹脂液
11を均一に充填せしめることができるから、アンダー
フィルの不均一性の発生をほぼ完全に防止することがで
き、しかも、充填時間を大幅に短縮することができ、従
って、効率的生産を達成することができる。
Therefore, as shown in FIG. 2, the IC chip 2 has a bump-forming portion 5 where bumps 4 are formed at a high density and a central portion 6 where no bump is formed. Even if there is, both portions can be filled with the sealing resin liquid 11 uniformly, so that the occurrence of underfill non-uniformity can be almost completely prevented, and the filling time is greatly reduced. Thus, efficient production can be achieved.

【0024】なお、差圧充填における加圧力は、封止用
樹脂液11の種類や間隙12の大きさやバンプ4の形成
態様等の諸条件を考慮して所定に設定される。また、孔
版印刷法による封止用樹脂液11の塗布は、部品の量産
に好適であって、かつ、ほぼ同時にICチップ2の周囲
に樹脂液を供給することができる為、ボイドが、バンプ
が形成されていない中央部分6の中心位置(ICチップ
2の中心位置)に形成される利点がある。
The pressure in the differential pressure filling is set to a predetermined value in consideration of various conditions such as the type of the sealing resin liquid 11, the size of the gap 12, and the manner of forming the bumps 4. Also, the application of the sealing resin liquid 11 by the stencil printing method is suitable for mass production of components, and the resin liquid can be supplied around the IC chip 2 almost at the same time. There is an advantage that it is formed at the central position of the central portion 6 that is not formed (the central position of the IC chip 2).

【0025】以上、封止用樹脂液11を、真空雰囲気下
でICチップ2の側方周辺の全域にわたって基板3上に
孔版印刷により塗布した後、前記真空雰囲気の真空度を
低下せしめるか若しくは前記真空雰囲気を通常の大気圧
雰囲気にせしめて差圧充填を行う態様について述べた
が、本発明においては、それとは異なり、封止用樹脂液
11を、真空雰囲気下でICチップ2の側方周辺の全域
にわたって基板3上にディスペンサー(又はノズル)を
用いて塗布した後、前記真空雰囲気の真空度を低下せし
めるか若しくは前記真空雰囲気を通常の大気圧雰囲気に
せしめて差圧充填を行ってもよい。
As described above, the sealing resin liquid 11 is applied on the substrate 3 by stencil printing over the entire area around the side of the IC chip 2 in a vacuum atmosphere, and then the degree of vacuum in the vacuum atmosphere is reduced or Although the mode in which the vacuum atmosphere is set to the normal atmospheric pressure atmosphere and the differential pressure filling is performed has been described, in the present invention, unlike the above, the sealing resin liquid 11 is applied to the side periphery of the IC chip 2 under the vacuum atmosphere. May be applied on the substrate 3 using a dispenser (or a nozzle) over the entire region, and then the vacuum degree of the vacuum atmosphere may be reduced or the vacuum atmosphere may be changed to a normal atmospheric pressure atmosphere to perform differential pressure filling. .

【0026】また、必要に応じて、封止用樹脂液11の
前記塗布及び前記差圧充填を複数回行ってもよい。1回
の塗布及び差圧充填では、微小間隙12内への樹脂液充
填量が不足する場合もあり得るからである。なお、封止
用樹脂液11は、フィラー混入のもの等いかなるもので
あってもよく、更に、図4において示されているよう
に、基板3のフリッブチップ実装部、すなわち、ICチ
ップ2が接合せしめられている箇所、より詳しくは、中
央部分6に非貫通孔13を設けてもよい。
Further, if necessary, the application of the sealing resin liquid 11 and the differential pressure filling may be performed a plurality of times. This is because, in one application and differential pressure filling, the resin liquid filling amount in the minute gap 12 may be insufficient. The sealing resin liquid 11 may be any liquid such as one containing a filler. Further, as shown in FIG. 4, the flip chip mounting portion of the substrate 3, that is, the IC chip 2 is bonded. A non-through hole 13 may be provided at the location where the hole is provided, more specifically, at the center portion 6.

【0027】この非貫通孔13を設けることにより、I
Cチップ2の側方周辺の全域から加圧されて微小間隙1
2内へ充填される封止用樹脂液11によって、そこに残
存している微量のエアーICチップ2のバンプ4群で
囲まれた中央部分6に集め、かつ、そこから押し出して
非貫通孔13に封じ込めることができるなお、非貫通
孔13は、必要に応じて複数、設けてもよい。上述のよ
うに、微小間隙12内の残存エアーを非貫通孔13に封
じ込めることができる為に、封止用樹脂液11が充填さ
れた微小間隙12領域内にボイドが形成されるのをほぼ
完全に防止することができる。従って、非貫通孔13を
設けていない上述の例よりも、これの方が有利である。
By providing this non-through hole 13, I
The small gap 1 is pressed from the whole area around the side of the C chip 2.
The sealing resin liquid 11 to be filled into 2, the air traces remaining there in bump 4 groups of IC chip 2
It can be collected in the enclosed central part 6 and extruded therefrom and sealed in the non-through hole 13 . Note that a plurality of non-through holes 13 may be provided as necessary. As mentioned above
Thus, the residual air in the minute gap 12 is sealed in the non-through hole 13.
The sealing resin liquid 11 is filled
Formation of voids in the region of the minute gap 12
It can be completely prevented. Therefore, the non-through hole 13
This is more advantageous than the above-mentioned non-provided example.

【0028】よって、本発明によると、封止用樹脂液1
1を、真空雰囲気下でICチップ2の側方周辺の全域に
わたって基板3上に塗布した後、前記真空雰囲気の真空
度を低下せしめるか若しくは前記真空雰囲気を通常の大
気圧雰囲気にせしめて差圧充填を行うことに基づいて所
謂、エアー抜き用の貫通孔を基板に設けていないフリッ
プチップ実装体1であっても良好にアンダーフィルする
ことができる。
Therefore, according to the present invention, the sealing resin liquid 1
1 is applied on the substrate 3 over the entire area around the side of the IC chip 2 in a vacuum atmosphere, and then the degree of vacuum in the vacuum atmosphere is reduced, or the vacuum atmosphere is changed to a normal atmospheric pressure atmosphere, and the differential pressure is reduced. Based on the filling, it is possible to satisfactorily underfill even the flip-chip mounted body 1 in which the substrate is not provided with a so-called air vent through hole.

【0029】また、封止用樹脂液11をフリップチップ
実装体1のICチップ2と基板3間に形成されている微
小間隙12内へ強制的に充填することができるから、I
Cチップ2が図2において示されているように、バンプ
4が高密度に形成されているバンプ形成部分5とバンプ
が形成されていない中央部分6とを形成したものであっ
ても、両部分に封止用樹脂液11を均一に充填せしめる
ことができて、アンダーフィルの不均一性の発生をほぼ
完全に防止することができると共に短時間で充填するこ
とができる。
Further, since the sealing resin liquid 11 can be forcibly filled into the minute gap 12 formed between the IC chip 2 and the substrate 3 of the flip chip mounting body 1,
As shown in FIG. 2, even if the C chip 2 has a bump forming portion 5 where the bumps 4 are formed at a high density and a central portion 6 where no bumps are formed, The sealing resin liquid 11 can be uniformly filled, and the occurrence of underfill non-uniformity can be almost completely prevented, and can be filled in a short time.

【0030】更に、前記差圧充填によって、微小間隙1
2内の残存エアーを、基板3に設けられている非貫通孔
13に封じ込めるから、封止用樹脂液11が充填された
微小間隙12領域内にボイドが形成されるのをほぼ完全
に防止することができる。なお、本発明においていう
「非貫通孔」とは一般に、ブラインドビアホール又はブ
ラインドスルーホールと呼ばれている孔も包含するもの
であると共に「基板」は多層基板(又はビルドアップ基
板)も包含するものである。
Further, by the differential pressure filling, the minute gap 1
The remaining air in 2 is transferred to a non-through hole provided in substrate 3
13, the sealing resin liquid 11 was filled.
Almost completely prevents voids from forming in the minute gap 12 region.
Can be prevented. In the present invention, “non-through hole” generally includes a hole called a blind via hole or a blind through hole, and “substrate” includes a multilayer substrate (or a build-up substrate). It is.

【0031】[0031]

【発明の効果】上述の如く、本発明によると、所謂、エ
アー抜き用の貫通孔を基板に設けていないフリップチッ
プ実装体であっても良好にアンダーフィルすることがで
きる。すなわち、アンダーフィルの不均一性の発生を防
止することができると共にフィラー混入の封止用樹脂で
あっても迅速に充填することができて充填時間を大幅に
短縮することができ、しかも、封止用樹脂液が充填され
た微小間隙領域内にボイドが形成されるのをほぼ完全に
防止することができる。
As described above, according to the present invention, it is possible to satisfactorily underfill even a flip-chip mounted body having no so-called air vent through-hole in the substrate . That is, it is possible to prevent the occurrence of underfill non-uniformity and to quickly fill even the sealing resin mixed with the filler, thereby greatly shortening the filling time , and furthermore, Filled with resin solution
Formation of voids in the micro-gap area almost completely
Can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】封止用樹脂液を真空雰囲気下で孔版印刷した姿
を示す縦断面図である。
FIG. 1 is a longitudinal sectional view showing a state in which a sealing resin liquid is stencil-printed in a vacuum atmosphere.

【図2】ICチップの平面図ある。FIG. 2 is a plan view of an IC chip.

【図3】図1の平面図である。FIG. 3 is a plan view of FIG. 1;

【図4】真空雰囲気の真空度を低下せしめるか若しくは
真空雰囲気を通常の大気圧雰囲気にせしめて差圧充填を
行った姿を示す縦断面図である。
FIG. 4 is a longitudinal sectional view showing a state in which the degree of vacuum in the vacuum atmosphere is reduced or the vacuum atmosphere is changed to a normal atmospheric pressure atmosphere and differential pressure filling is performed.

【符号の説明】[Explanation of symbols]

1 フリップチップ実装体 2 ICチップ 3 基板 4 バンプ 7 水平ステージ 8 孔版 9 樹脂溜め部 11 封止用樹脂液 12 間隙 13 非貫通孔 REFERENCE SIGNS LIST 1 flip chip mounted body 2 IC chip 3 substrate 4 bump 7 horizontal stage 8 stencil 9 resin reservoir 11 sealing resin liquid 12 gap 13 non-through hole

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 23/28 H01L 21/56 H01L 21/60 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 23/28 H01L 21/56 H01L 21/60

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 基板に搭載されたICチップと前記基板
との間に形成された間隙に封止用樹脂が充填されていな
いフリップチップ実装体において、前記ICチップのバ
ンプ群で囲まれた中央部分に位置されるように前記間隙
対してのみ開口れる非貫通孔を前記基板に設けてい
ることを特徴とするフリップチップ実装体。
An IC chip mounted on a substrate and the substrate
Is not filled with the sealing resin.
In a flip-chip package, the IC chip
Flip chip mounting body, characterized in that is provided with a non-through hole in the substrate on which the is opened only for the gap to be positioned in a central portion surrounded by the pump group.
【請求項2】 フリップチップ実装体のICチップと基
との間に形成された間隙に封止用樹脂を充填させるア
ンダーフィル方法であって、前記封止用樹脂を、真空雰
囲気下で前記ICチップの側方周辺の全域にわたって塗
布した後、前記真空雰囲気の真空度を低下せしめるか若
しくは前記真空雰囲気を通常の大気圧雰囲気にせしめて
差圧充填を行うアンダーフィル方法において、前記差圧
充填によって前記間隙内の残存エアーを、前記ICチッ
プのバンプ群で囲まれた中央部分に位置され、かつ前記
間隙に対してのみ開口されるように前記基板に設けられ
ている非貫通孔に封じ込めることを特徴とするアンダー
フィル方法。
2. A underfilling method in the gap formed between the IC chip and the substrate of the flip chip mounting body Ru is filled with the sealing resin, the sealing resin, wherein a vacuum atmosphere After applying over the entire area around the side of the IC chip, in the underfill method of lowering the degree of vacuum of the vacuum atmosphere or changing the vacuum atmosphere to a normal atmospheric pressure atmosphere and performing differential pressure filling,
By filling, the remaining air in the gap is removed from the IC chip.
Located in the central portion surrounded by the bumps of the
Provided on the substrate so as to be opened only to the gap
An underfill method characterized by being sealed in a non-through hole .
【請求項3】 前記封止用樹脂の塗布及び差圧充填を複
数回行うことを特徴とする請求項2に記載のアンダーフ
ィル方法。
3. The underfill method according to claim 2, wherein the application and the differential pressure filling of the sealing resin are performed a plurality of times.
【請求項4】 前記封止用樹脂を孔版印刷により塗布す
ることを特徴とする請求項2又は3に記載のアンダーフ
ィル方法。
4. The underfill method according to claim 2, wherein the sealing resin is applied by stencil printing.
JP11603898A 1998-04-09 1998-04-09 Flip chip package and underfill method thereof Expired - Fee Related JP3243449B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11603898A JP3243449B2 (en) 1998-04-09 1998-04-09 Flip chip package and underfill method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11603898A JP3243449B2 (en) 1998-04-09 1998-04-09 Flip chip package and underfill method thereof

Publications (2)

Publication Number Publication Date
JPH11297902A JPH11297902A (en) 1999-10-29
JP3243449B2 true JP3243449B2 (en) 2002-01-07

Family

ID=14677200

Family Applications (1)

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Country Status (1)

Country Link
JP (1) JP3243449B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3581622B2 (en) * 1999-12-28 2004-10-27 ミヨタ株式会社 Resin sealing method and resin sealing device for electronic components
JP2002270638A (en) * 2001-03-06 2002-09-20 Nec Corp Semiconductor device, resin-sealing method and resin- sealing apparatus

Also Published As

Publication number Publication date
JPH11297902A (en) 1999-10-29

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