JP3351996B2 - Semiconductor device manufacturing method and semiconductor device - Google Patents

Semiconductor device manufacturing method and semiconductor device

Info

Publication number
JP3351996B2
JP3351996B2 JP19447197A JP19447197A JP3351996B2 JP 3351996 B2 JP3351996 B2 JP 3351996B2 JP 19447197 A JP19447197 A JP 19447197A JP 19447197 A JP19447197 A JP 19447197A JP 3351996 B2 JP3351996 B2 JP 3351996B2
Authority
JP
Japan
Prior art keywords
sealing material
mask
printing
semiconductor device
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP19447197A
Other languages
Japanese (ja)
Other versions
JPH1140591A (en
Inventor
俊幸 牧田
賢次 北村
靖孝 宮田
太郎 福井
裕久 日野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP19447197A priority Critical patent/JP3351996B2/en
Publication of JPH1140591A publication Critical patent/JPH1140591A/en
Application granted granted Critical
Publication of JP3351996B2 publication Critical patent/JP3351996B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、配線基板に半導体
素子を封止して得られる半導体装置の製造方法及び半導
体装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device obtained by encapsulating a semiconductor element on a wiring board, and to a semiconductor device.

【0002】[0002]

【従来の技術】半導体素子を配線基板に実装して半導体
装置を製造するにあたっては、配線基板に半導体素子を
搭載すると共に、ボンディングワイヤーで半導体素子を
配線基板に電気的に接続したり、半導体素子に設けたバ
ンプで半導体素子を配線基板に電気的に接続したりした
後、封止材料で半導体素子を封止することによって、行
なわれている。
2. Description of the Related Art In manufacturing a semiconductor device by mounting a semiconductor element on a wiring board, the semiconductor element is mounted on the wiring board, and the semiconductor element is electrically connected to the wiring board by bonding wires, After electrically connecting a semiconductor element to a wiring board with bumps provided in the semiconductor device, the semiconductor element is sealed with a sealing material.

【0003】そして封止材料を封止するにあたって従来
は、ディスペンサーを用いて行なうのが一般的である。
すなわち、液状の封止材料をディスペンサーによって配
線基板に搭載した半導体素子に塗布して、封止を行なう
ようにしている。しかし、ディスペンサーで封止材料を
塗布して封止を行なう場合、塗布した封止材料が流れて
しまわないように高チクソトロピー性を有する封止材料
を用いる必要があり、材料のコストアップになるもので
あった。
Conventionally, the sealing material is generally sealed with a dispenser.
That is, a liquid sealing material is applied to a semiconductor element mounted on a wiring substrate by a dispenser to perform sealing. However, when applying a sealing material with a dispenser to perform sealing, it is necessary to use a sealing material having high thixotropy so that the applied sealing material does not flow, which increases the cost of the material. Met.

【0004】そこで、本出願人において印刷の工法で封
止材料4を封止することが検討されている。図5(a)
はその一例を示すものであり、開口部6を設けてマスク
5を形成し、開口部6で半導体素子1を囲むように配線
基板3の上にマスク5を重ね、マスク5の上に供給され
た液状の封止材料4をスキージ7で擦ることによってマ
スク5の開口部6を通して封止材料4を印刷したのち、
マスク5を外して封止材料4を硬化させることによっ
て、図5(b)のように封止材料4で半導体素子1を封
止することができるものである。
Therefore, the present applicant has been studying to seal the sealing material 4 by a printing method. FIG. 5 (a)
Shows an example of such a case, in which an opening 6 is provided to form a mask 5, the mask 5 is overlaid on the wiring substrate 3 so as to surround the semiconductor element 1 in the opening 6, and the mask 5 is supplied on the mask 5. After printing the sealing material 4 through the opening 6 of the mask 5 by rubbing the liquid sealing material 4 with a squeegee 7,
By removing the mask 5 and curing the sealing material 4, the semiconductor element 1 can be sealed with the sealing material 4 as shown in FIG.

【0005】しかしこのものにあっても、大気圧下で印
刷を行なうと、液状の封止材料4に空気が巻き込まれ、
封止部分に気泡が残留してボイド不良が発生するという
問題があった。この場合、印刷後に減圧脱泡することに
よってボイドを除くことはできるが、表面に泡抜け跡が
残り、封止部を表面平滑に形成することができないとい
う問題が生じるものであった。このために、3Torr
以下の減圧雰囲気にして印刷を行なうことが検討されて
いる。このように3Torr以下の減圧雰囲気で印刷を
行なうことによって、空気が封止材料4に巻き込まれる
ようなことがなくなり、封止材料4中に気泡が発生する
ことを防止することができるものであり、そして雰囲気
を大気圧に戻した後、マスク5を外して封止材料4を硬
化させることによって半導体素子1を封止することがで
きるものである。
However, even in this case, when printing is performed under atmospheric pressure, air is entrained in the liquid sealing material 4,
There is a problem that bubbles remain in the sealing portion and void defects occur. In this case, voids can be removed by defoaming under reduced pressure after printing, but a bubble escape mark remains on the surface, and there is a problem that the sealing portion cannot be formed to have a smooth surface. For this, 3 Torr
Printing under the following reduced-pressure atmosphere has been studied. By performing printing in a reduced-pressure atmosphere of 3 Torr or less in this manner, air is prevented from being caught in the sealing material 4 and generation of bubbles in the sealing material 4 can be prevented. After returning the atmosphere to the atmospheric pressure, the semiconductor element 1 can be sealed by removing the mask 5 and curing the sealing material 4.

【0006】[0006]

【発明が解決しようとする課題】しかし、上記のように
3Torr以下の減圧雰囲気で印刷を行なった場合、印
刷後に雰囲気を大気圧に戻す過程で、印刷した封止材料
4の表面が、印刷時には平滑であったものが、図5
(c)のように、その中央部が凹んで輪郭部が盛り上が
るように変形し、封止材料4の上面が50〜60μm程
度の高低差の凹凸面になるものであった。そしてこのよ
うに封止材料4の上面がこのように凹凸面になると、封
止の性能が不安定になるという問題が発生するものであ
った。
However, when printing is performed in a reduced pressure atmosphere of 3 Torr or less as described above, the surface of the printed encapsulating material 4 is printed during the process of returning the atmosphere to atmospheric pressure after printing. What was smooth is shown in FIG.
As shown in (c), the central portion is deformed so as to be dented and the contour portion is raised, so that the upper surface of the sealing material 4 has an uneven surface with a height difference of about 50 to 60 μm. When the upper surface of the sealing material 4 has such an uneven surface, the sealing performance becomes unstable.

【0007】本発明は上記の点に鑑みてなされたもので
あり、気泡の発生を低減して封止することができると共
に、封止材料の上面を平滑面に仕上げて封止することが
できる半導体装置の製造方法及び半導体装置を提供する
ことを目的とするものである。
[0007] The present invention has been made in view of the above points, and it is possible to seal by reducing the generation of bubbles and to seal the upper surface of the sealing material by finishing it to a smooth surface. It is an object of the present invention to provide a method for manufacturing a semiconductor device and a semiconductor device.

【0008】[0008]

【課題を解決するための手段】本発明に係る半導体装置
の製造方法は、配線基板3に半導体素子1を電気的に接
続して搭載し、開口部6を設けて形成したマスク5を開
口部6の内側に半導体素子1を位置させて配線基板3に
重ね、マスク5の上に供給された封止材料4を3Tor
r以下の減圧条件下でスキージ7で擦ってマスク5の開
口部6を通して封止材料4を封止印刷し、さらに大気圧
の条件下でマスク5上の封止材料4をスキージ7で擦っ
てマスク5の開口部6を通して封止材料4を仕上げ印刷
することによって、封止材料4で半導体素子1を封止す
ることを特徴とするものである。
According to a method of manufacturing a semiconductor device according to the present invention, a semiconductor element 1 is electrically connected to a wiring substrate 3 and mounted thereon, and a mask 5 formed with an opening 6 is formed in the opening. 6, the semiconductor element 1 is positioned on the wiring substrate 3 with the sealing material 4 supplied on the mask 5 being 3 Torr.
The sealing material 4 is sealed and printed through the opening 6 of the mask 5 by rubbing with a squeegee 7 under a reduced pressure condition of r or less, and the sealing material 4 on the mask 5 is further squeezed under atmospheric pressure conditions. The semiconductor element 1 is sealed with the sealing material 4 by finishing printing the sealing material 4 through the opening 6 of the mask 5 by rubbing with 7.

【0009】また本発明の半導体装置は、上記の方法で
配線基板3上に半導体素子1が封止されて成ることを特
徴とするものである。
Further, the semiconductor device of the present invention is characterized in that the semiconductor element 1 is sealed on the wiring board 3 by the above method.

【0010】[0010]

【発明の実施の形態】以下、本発明の実施の形態を説明
する。配線基板3はプリント配線板などで形成されるも
のであり、まずこの配線基板3の上に半導体素子(半導
体チップ)1を搭載して電気的に接続する。配線基板3
への半導体素子1の電気的な接続は、半導体素子1の上
面の電極と配線基板3の電極との間にボンディングワイ
ヤー8を接続して行なったり、あるいは半導体素子1の
下面に半田などでバンプ2を設け、配線基板3の上に半
導体素子1を載置すると共に配線基板3の電極にバンプ
2を接合して行なったりすることができる。
Embodiments of the present invention will be described below. The wiring board 3 is formed by a printed wiring board or the like. First, a semiconductor element (semiconductor chip) 1 is mounted on the wiring board 3 and is electrically connected. Wiring board 3
The semiconductor element 1 is electrically connected to the semiconductor element 1 by connecting a bonding wire 8 between an electrode on the upper surface of the semiconductor element 1 and an electrode on the wiring board 3 or by bumping the lower surface of the semiconductor element 1 with solder or the like. 2, the semiconductor element 1 is mounted on the wiring board 3 and the bumps 2 are bonded to the electrodes of the wiring board 3.

【0011】図1はこのように配線基板3に搭載した半
導体素子1を封止材料4で封止する装置を示すものであ
り。作業台12の上に基板受けトレー13が載置してあ
る。基板受けトレー13は周囲の上面に配線基板3の厚
みとほぼ同じ高さ寸法の枠片14を設けて形成してあ
り、この枠片14の内側において基板受けトレー13の
上面に、半導体素子1を搭載した配線基板3をセット
し、さらに配線基板3の上面から枠片14の上面にかけ
てマスク5を載置してセットするようにしてある。マス
ク5は枠体15の下側に金属板などを張って形成される
ものであり、半導体素子1を封止する箇所においてマス
ク5に開口部6が形成してある。そしてマスク5はこの
開口部6の内側に半導体素子1が位置するように、配線
基板3の上にセットされるものである。
FIG. 1 shows an apparatus for sealing a semiconductor element 1 mounted on a wiring board 3 with a sealing material 4 as described above. A substrate receiving tray 13 is placed on the work table 12. The substrate receiving tray 13 is formed by providing a frame piece 14 having substantially the same height as the thickness of the wiring board 3 on the peripheral upper surface. Is mounted, and a mask 5 is placed and set from the upper surface of the wiring substrate 3 to the upper surface of the frame piece 14. The mask 5 is formed by stretching a metal plate or the like below the frame 15, and an opening 6 is formed in the mask 5 at a location where the semiconductor element 1 is sealed. The mask 5 is set on the wiring board 3 so that the semiconductor element 1 is located inside the opening 6.

【0012】ここで、作業台12の上はセッティングゾ
ーン16と印刷ゾーン17とに分かれており、基板受け
トレー13上への配線基板3のセットや配線基板3の上
へのマスク5のセットをセッティングゾーン16で行な
った後、さらにセッティングゾーン16においてマスク
5の上にエポキシ樹脂などの液状の封止材料4を供給す
る。封止材料4の供給は、シリンジ18などを用いて行
なうことができるものである。ここで、封止材料4とし
ては、無機充填材の充填量が40〜85重量%、粘度が
100〜5000ps(25℃)、チクソトロピー指数
1.0〜4.5(25℃)のものを用いるのが好まし
い。
The work table 12 is divided into a setting zone 16 and a printing zone 17 for setting the wiring board 3 on the board receiving tray 13 and setting the mask 5 on the wiring board 3. After performing in the setting zone 16, the liquid sealing material 4 such as an epoxy resin is supplied onto the mask 5 in the setting zone 16. The supply of the sealing material 4 can be performed using a syringe 18 or the like. Here, as the sealing material 4, one having a filling amount of the inorganic filler of 40 to 85% by weight, a viscosity of 100 to 5000 ps (25 ° C.), and a thixotropic index of 1.0 to 4.5 (25 ° C.) is used. Is preferred.

【0013】このようにマスク5のセットや封止材料4
の供給を行なった後、基板受けトレー13を印刷ゾーン
17へ移動させる。印刷ゾーン17にはバキュームチャ
ンバー21が設けてある。バキュームチャンバー21は
下面が開口する箱状に形成してあり、基部を軸受け22
に枢支した回動バー23の先端に取り付けてある。従っ
てバキュームチャンバー21は、作業台12の上方へ回
動して下面の開口が開放される状態と、下方へ回動して
下面の開口縁が作業台12の上面に密接して開口が閉じ
られる状態との間で、上下方向に回動されるようになっ
ている。またバキュームチャンバー21の外側面にはエ
アーシリンダー等で形成されるスキージ駆動装置24が
設けてあり、スキージ駆動装置24にはバキュームチャ
ンバー21の内方へ突出するスキージスライドバー25
が設けてある。スキージスライドバー25はスキージ駆
動装置24のシリンダー内のプランジャの作動に従って
バキュームチャンバー21内を往復移動するように形成
されており、その先端にはスキージ7が取り付けてあ
る。スキージ7は合成樹脂板などで形成してある。また
作業台12には真空ポンプ等の減圧装置に接続された真
空配管26が設けてあり、真空配管26は作業台12の
上面で開口させてある。真空配管26の開口は、バキュ
ームチャンバー21を下方へ回動させて下面の開口縁を
作業台12の上面に密接させた際に、バキュームチャン
バー21内に位置するように配置してある。
Thus, the setting of the mask 5 and the sealing material 4
Then, the substrate receiving tray 13 is moved to the printing zone 17. The printing zone 17 is provided with a vacuum chamber 21. The vacuum chamber 21 is formed in a box shape whose lower surface is open, and the base is a bearing 22.
It is attached to the tip of a rotating bar 23 pivotally supported by the. Accordingly, the vacuum chamber 21 is rotated upward of the work table 12 to open the lower opening, and is rotated downward to close the opening edge of the lower surface closely to the upper surface of the work table 12. It is designed to be turned up and down between the states. A squeegee driving device 24 formed by an air cylinder or the like is provided on an outer surface of the vacuum chamber 21. A squeegee slide bar 25 protruding inward of the vacuum chamber 21 is provided on the squeegee driving device 24.
Is provided. The squeegee slide bar 25 is formed so as to reciprocate in the vacuum chamber 21 in accordance with the operation of a plunger in a cylinder of the squeegee driving device 24, and the squeegee 7 is attached to the tip thereof. The squeegee 7 is formed of a synthetic resin plate or the like. The worktable 12 is provided with a vacuum pipe 26 connected to a decompression device such as a vacuum pump, and the vacuum pipe 26 is opened on the upper surface of the worktable 12. The opening of the vacuum pipe 26 is arranged so as to be located in the vacuum chamber 21 when the opening edge of the lower surface is brought into close contact with the upper surface of the worktable 12 by rotating the vacuum chamber 21 downward.

【0014】しかして、鎖線のようにバキュームチャン
バー21を作業台12の上方へ回動させた状態で基板受
けトレー13をセッティングゾーン16から印刷ゾーン
17へ移動させるものであり、基板受けトレー13を印
刷ゾーン17へ移動させた後、バキュームチャンバー2
1を下方へ回動させ、基板受けトレー13をバキューム
チャンバー21で囲う。このようにバキュームチャンバ
ー21を下方へ回動させると、スキージ7はマスク5の
上面に当接されるようになっている。次に真空配管26
を通してバキュームチャンバー21内の空気を排出し、
バキュームチャンバー21内を減圧する。この後、スキ
ージ7を図1の矢印のようにマスク5の上面に沿って移
動させ、マスク5の上に供給されている封止材料4をス
キージ7で擦り付けてマスク5の開口部6を通して封止
材料4を印刷塗布し、封止印刷を行なう。このときスキ
ージ7を数回往復駆動させて、印刷を複数回繰り返して
行なうようにしてもよい。
Thus, the substrate receiving tray 13 is moved from the setting zone 16 to the printing zone 17 while the vacuum chamber 21 is rotated above the work table 12 as indicated by a chain line. After moving to the printing zone 17, the vacuum chamber 2
1 is rotated downward, and the substrate receiving tray 13 is surrounded by the vacuum chamber 21. When the vacuum chamber 21 is rotated downward as described above, the squeegee 7 comes into contact with the upper surface of the mask 5. Next, vacuum piping 26
The air in the vacuum chamber 21 is discharged through
The pressure inside the vacuum chamber 21 is reduced. Thereafter, the squeegee 7 is moved along the upper surface of the mask 5 as shown by the arrow in FIG. 1, and the sealing material 4 supplied on the mask 5 is rubbed with the squeegee 7 to seal through the opening 6 of the mask 5. The stop material 4 is applied by printing, and sealing printing is performed. At this time, the squeegee 7 may be driven to reciprocate several times, and printing may be repeated a plurality of times.

【0015】封止材料4は半導体素子1を囲むマスク5
の開口部6内に流入充填されるものであり、半導体素子
1の側面及び上面を封止材料4で覆うことができるもの
である。そしてこのマスク5とスキージ7を用いた印刷
は減圧雰囲気下で行なわれるために、スキージ7で封止
材料4を擦り付けて印刷を行なう際に空気が封止材料4
に巻き込まれるようなことがなくなり、封止材料4中に
気泡(ボイド)が発生するようなことがなくなるもので
ある。このバキュームチャンバー21内の減圧雰囲気
は、3Torr以下の真空度に設定されるものである。
封止材料4中に気泡が発生しないようにする印刷を行な
うためには、3Torr以下の真空度に設定する必要が
ある。真空度は低い程望ましいのはいうまでもないが、
0.5Torr程度が実用上の下限である。
The sealing material 4 is a mask 5 surrounding the semiconductor element 1.
Is filled into the opening 6 of the semiconductor device 1, and the side surface and the upper surface of the semiconductor element 1 can be covered with the sealing material 4. Since printing using the mask 5 and the squeegee 7 is performed in a reduced-pressure atmosphere, air is generated when the sealing material 4 is rubbed with the squeegee 7 to perform printing.
This eliminates the possibility that air bubbles (voids) are generated in the sealing material 4. The reduced-pressure atmosphere in the vacuum chamber 21 is set to a degree of vacuum of 3 Torr or less.
In order to perform printing so that air bubbles are not generated in the sealing material 4, it is necessary to set the degree of vacuum to 3 Torr or less. Needless to say, the lower the degree of vacuum, the better.
About 0.5 Torr is a practical lower limit.

【0016】上記のように3Torr以下の真空度の雰
囲気で封止印刷を行なった後に、雰囲気を大気圧に戻す
と、既述のように、図2(a)に示すように印刷した封
止材料4の表面が凹凸面になる。そこで本発明では、バ
キュームチャンバー21内を調圧して減圧状態を緩やか
にし、大気圧にまで戻した後、スキージ7を再度駆動さ
せてマスク5の上に供給されている封止材料4を開口部
6を通して、先に半導体素子1を覆うように印刷した封
止材料4の上面に印刷塗布し、仕上げ印刷を行なう。バ
キュームチャンバー21内の減圧状態を緩やかにするこ
とによって封止材料4の表面が凹凸面になっていても、
このように仕上げ印刷することによって、図2(b)に
示すように封止材料4の上面は平滑面に仕上げられるも
のである。封止材料4の上面を平滑面に仕上げるには、
このように雰囲気を5Torr以上にまでする必要があ
る。
After the sealing printing is performed in an atmosphere having a vacuum degree of 3 Torr or less as described above, when the atmosphere is returned to the atmospheric pressure, as described above, the sealing printed as shown in FIG. The surface of the material 4 becomes an uneven surface. Therefore, in the present invention, the pressure in the vacuum chamber 21 is adjusted to moderate the reduced pressure state, and after returning to the atmospheric pressure , the squeegee 7 is driven again to remove the sealing material 4 supplied on the mask 5 into the opening. Through 6, printing is applied to the upper surface of the sealing material 4 which has been printed so as to cover the semiconductor element 1, and finish printing is performed. Even if the surface of the sealing material 4 has an uneven surface by relaxing the decompression state in the vacuum chamber 21,
By performing the finish printing in this manner, the upper surface of the sealing material 4 is finished to a smooth surface as shown in FIG. In order to finish the upper surface of the sealing material 4 to a smooth surface,
As described above, the atmosphere needs to be 5 Torr or more.

【0017】上記のようにして封止材料4を印刷した
後、バキュームチャンバー21内を大気圧に戻し、バキ
ュームチャンバー21を上方へ回動させて基板受けトレ
ー13を開放する。そして、基板受けトレー13を印刷
ゾーン17からセッティングゾーン16に戻した後、配
線基板3の上からマスク5を取り外すと共に配線基板3
を基板受けトレー13から取り出し、封止材料4を硬化
させる工程へ配線基板3を送り出し、配線基板3に半導
体素子1を実装・封止した半導体装置に仕上げることが
できるものである。図3(a)(b)(c)は上記のよ
うにして製造された半導体装置の実施の形態を示すもの
であり、図3(a)は半導体素子1を配線基板3にボン
ディングワイヤー8で電気的に接続して実装するように
したものを、図3(b)は配線基板3の凹所29に収容
して半導体素子1を実装するようにしたものを、図3
(c)は半導体素子1を配線基板3にバンプ2によって
フリップチップ実装するようにしたものを、それぞれ示
す。
After printing the sealing material 4 as described above, the inside of the vacuum chamber 21 is returned to the atmospheric pressure, and the vacuum chamber 21 is rotated upward to open the substrate receiving tray 13. Then, after returning the substrate receiving tray 13 from the printing zone 17 to the setting zone 16, the mask 5 is removed from above the wiring board 3 and the wiring board 3 is removed.
Is taken out of the substrate receiving tray 13 and the wiring substrate 3 is sent out to a step of curing the sealing material 4, whereby a semiconductor device having the semiconductor element 1 mounted and sealed on the wiring substrate 3 can be finished. FIGS. 3A, 3B, and 3C show an embodiment of the semiconductor device manufactured as described above. FIG. 3A shows that the semiconductor element 1 is connected to the wiring board 3 by bonding wires 8. FIG. 3 (b) shows the semiconductor device 1 mounted in the recess 29 of the wiring board 3 and the semiconductor element 1 mounted thereon.
FIG. 1C shows a semiconductor device 1 flip-chip mounted on a wiring board 3 with bumps 2.

【0018】また、上記のように封止材料4を印刷して
封止するにあたって、配線基板3に搭載した半導体素子
1を囲むように配線基板3の上面に枠状のダム30を設
け、図3(d)のようにこのダム30内において封止材
料4で半導体素子1を封止するようにすることもでき
る。この場合は、ダム30の外形・寸法に合わせてマス
ク5の開口部6を形成するものであり、ダム30を開口
部6で囲むようにマスク5を配線基板3の上面に重ね、
この状態で既述のようにスキージ7でマスク5上の封止
材料4を擦ることによって、開口部6からダム30内に
封止材料4を流入させて半導体素子1を封止することが
できるものである。このようにダム30を設けると、封
止材料4が流れ出すことを防ぐことができるので、チク
ソトロピー指数の小さい封止材料4でも問題なく使用す
ることができるものである。
When the sealing material 4 is printed and sealed as described above, a frame-shaped dam 30 is provided on the upper surface of the wiring board 3 so as to surround the semiconductor element 1 mounted on the wiring board 3. As shown in FIG. 3D, the semiconductor element 1 can be sealed with the sealing material 4 in the dam 30. In this case, the opening 6 of the mask 5 is formed in accordance with the outer shape and dimensions of the dam 30, and the mask 5 is overlaid on the upper surface of the wiring board 3 so as to surround the dam 30 with the opening 6.
In this state, by rubbing the sealing material 4 on the mask 5 with the squeegee 7 as described above, the sealing material 4 can flow into the dam 30 from the opening 6 to seal the semiconductor element 1. Things. When the dam 30 is provided in this manner, the sealing material 4 can be prevented from flowing out, so that the sealing material 4 having a small thixotropy index can be used without any problem.

【0019】次に本発明を実施例で説明する。 (実施例1) 封止材料4として松下電工株式会社製「パナシーラーC
V5420系」を用い、チクソトロピー付与剤(疎水性
二酸化ケイ素:日本アエロジル(株)製「RY20
0」)の配合量を調整して、粘度700ps(25℃で
B型粘度計によって測定、以下同じ)、チクソトロピー
指数1.2(25℃でB型粘度計によって測定、以下同
じ)に設定した。そして、マスク5として厚み0.4m
mのステンレス板に封止エリアと同一寸法の開口部6を
設けて形成したものを用い、図1に示す装置で封止印刷
及び仕上げ印刷を行なった。このとき、封止印刷は真空
度3Torrの減圧雰囲気で、仕上げ印刷は760To
rrの大気圧雰囲気で行なった。そしてこのように封止
材料4を印刷した後、100℃で1時間、さらに150
℃で3時間の条件で封止材料4を硬化させて半導体装置
を得た。
Next, the present invention will be described with reference to examples. (Example 1) “Panasealer C” manufactured by Matsushita Electric Works, Ltd. as a sealing material 4
V5420 series "and a thixotropic agent (hydrophobic silicon dioxide:" RY20 "manufactured by Nippon Aerosil Co., Ltd.)
0 "), the viscosity was set to 700 ps (measured at 25 ° C. by a B-type viscometer, the same applies hereinafter) and the thixotropy index was set to 1.2 (measured at 25 ° C. by a B-type viscometer, the same applies hereinafter). . Then, the thickness of the mask 5 is 0.4 m.
Sealing printing and finish printing were performed using the apparatus shown in FIG. 1 using a stainless steel plate having an opening 6 having the same dimensions as the sealing area formed on a stainless steel plate having a thickness of m. At this time, sealing printing is vacuum
Finished printing is 760To under a reduced pressure atmosphere of 3 Torr
The test was performed in an atmosphere of atmospheric pressure of rr . Then, after printing the sealing material 4 in this manner, at 150 ° C. for one hour,
The sealing material 4 was cured at a temperature of 3 ° C. for 3 hours to obtain a semiconductor device.

【0020】この半導体装置において、硬化後の封止材
料4は図4(a)に示すように上面が平滑面に形成され
ており、また超音波探傷装置で測定したところ、ボイド
の発生もみられなかった
In this semiconductor device, the cured sealing material 4 has a smooth upper surface as shown in FIG. 4A, and when measured by an ultrasonic flaw detector, generation of voids is also observed. Did not .

【0021】[0021]

【0022】[0022]

【0023】[0023]

【0024】(比較例1) 封止印刷を真空度3Torrの減圧雰囲気で行ない、仕
上げ印刷は行なわない他は、実施例1と同様にして、半
導体装置を得た。このとき、配線基板3の上面に半導体
素子1を囲むようにダム30を設けたものを用いた。
の半導体装置において、硬化後の封止材料4は図4
(b)に示すように上面の中央部が凹となった凹凸面に
なっており、またボイドの発生はみられなかった。
Comparative Example 1 A semiconductor device was obtained in the same manner as in Example 1 except that sealing printing was performed in a reduced-pressure atmosphere at a vacuum of 3 Torr and finish printing was not performed. At this time, the semiconductor
A device provided with a dam 30 so as to surround the element 1 was used. In this semiconductor device, the sealing material 4 after curing is the same as that of FIG.
As shown in (b) , the central portion of the upper surface was a concave-convex surface with a concave portion, and no void was observed.

【0025】(比較例2) 封止印刷を真空度3Torrの減圧雰囲気で行ない、仕
上げ印刷も3Torrの減圧雰囲気で行なうようにした
他は、実施例1と同様にして、半導体装置を得た。この
とき、配線基板3の上面に半導体素子1を囲むようにダ
ム30を設けたものを用いた。この半導体装置におい
て、硬化後の封止材料4は図4(c)に示すように上面
の中央部が凹となった凹凸面になっており、またボイド
の発生はみられなかった。
Comparative Example 2 A semiconductor device was obtained in the same manner as in Example 1, except that sealing printing was performed in a reduced-pressure atmosphere at a vacuum of 3 Torr, and finishing printing was also performed in a reduced-pressure atmosphere at 3 Torr. this
At this time, the upper surface of the wiring board 3 is
The one provided with the memory 30 was used. In this semiconductor device, the sealing material 4 after curing the middle portion of the upper surface as shown in FIG. 4 (c) has become uneven surface became concave and voids were observed.

【0026】(比較例3) 封止材料4として松下電工株式会社製「パナシーラーC
V5420系」を用い、チクソトロピー付与剤の配合量
を調整して粘度2500ps、チクソトロピー指数4.
5に設定した。そして封止印刷を大気圧雰囲気で行な
い、仕上げ印刷は行なわない他は、実施例1と同様にし
て(ダム30は用いず)、半導体装置を得た。この半導
体装置において、硬化後の封止材料4は図4(d)に示
すように上面は平滑面に形成されているが、超音波探傷
装置で測定したところ、ボイド31の発生がみられた。
(Comparative Example 3) "Panasealer C" manufactured by Matsushita Electric Works, Ltd. was used as the sealing material 4.
V5420 series "and the mixing amount of the thixotropic agent was adjusted to obtain a viscosity of 2500 ps and a thixotropic index of 4.
Set to 5. Then, a semiconductor device was obtained in the same manner as in Example 1 (without using the dam 30) except that sealing printing was performed in an atmospheric pressure atmosphere and finish printing was not performed. In this semiconductor device, although the sealing material 4 after curing has an upper surface formed as a smooth surface as shown in FIG. 4 (d) , voids 31 were found when measured by an ultrasonic flaw detector. .

【0027】[0027]

【表1】 [Table 1]

【0028】[0028]

【発明の効果】上記のように本発明は、配線基板に半導
体素子を電気的に接続して搭載し、開口部を設けて形成
したマスクを開口部の内側に半導体素子を位置させて配
線基板に重ね、マスクの上に供給された封止材料を3T
orr以下の減圧条件下でスキージで擦ってマスクの開
口部を通して封止材料を封止印刷し、さらに大気圧の条
件下でマスク上の封止材料をスキージで擦ってマスクの
開口部を通して封止材料を仕上げ印刷することによっ
て、封止材料で半導体素子を封止するようにしたので、
3Torr以下の減圧条件下で行なわれる封止印刷の際
に空気が封止材料に巻き込まれるようなことがなくな
り、気泡の発生を低減して封止を行なうことができるも
のであり、しかも大気圧の条件下での仕上げ印刷によっ
て、封止材料の上面を平滑面に仕上げて封止することが
できるものである。
As described above, according to the present invention, a semiconductor element is electrically connected and mounted on a wiring board, and a mask formed with an opening is formed by positioning the semiconductor element inside the opening. And the sealing material supplied on the mask is 3T
The sealing material is sealed and printed through the opening of the mask by rubbing with a squeegee under a reduced pressure condition of orr, and the sealing material on the mask is further rubbed with the squeegee under the condition of atmospheric pressure and sealed through the opening of the mask. Since the semiconductor element was sealed with the sealing material by finishing printing the material,
Air upon sealing printing performed under a reduced pressure condition of at most 3Torr it prevents, as caught in the sealing material, which can be performed sealing by reducing the occurrence of bubbles, moreover atmospheric pressure By performing finish printing under the conditions described above, the upper surface of the sealing material can be finished to a smooth surface and sealed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態の一例を示す断面図であ
る。
FIG. 1 is a cross-sectional view illustrating an example of an embodiment of the present invention.

【図2】(a)は封止印刷をした配線基板の断面図、
(b)は仕上げ印刷をした配線基板の断面図である。
FIG. 2 (a) is a cross-sectional view of a printed wiring board printed with sealing;
(B) is a cross-sectional view of the printed circuit board after the finish printing.

【図3】(a)乃至(d)は半導体装置の各実施の形態
を示す断面図である。
FIGS. 3A to 3D are cross-sectional views illustrating each embodiment of the semiconductor device.

【図4】(a)乃至(d)は実施例1、比較例1〜3の
封止材料の状態を示す断面図である。
FIGS. 4A to 4D are cross-sectional views showing the states of the sealing materials of Example 1 and Comparative Examples 1 to 3. FIG.

【図5】従来例を示すものであり、(a)乃至(c)は
それぞれ断面図である。
FIG. 5 shows a conventional example, and (a) to (c) are cross-sectional views.

【符号の説明】[Explanation of symbols]

1 半導体素子 3 配線基板 4 封止材料 5 マスク 6 開口部 7 スキージ DESCRIPTION OF SYMBOLS 1 Semiconductor element 3 Wiring board 4 Sealing material 5 Mask 6 Opening 7 Squeegee

───────────────────────────────────────────────────── フロントページの続き (72)発明者 宮田 靖孝 大阪府門真市大字門真1048番地松下電工 株式会社内 (72)発明者 福井 太郎 大阪府門真市大字門真1048番地松下電工 株式会社内 (72)発明者 日野 裕久 大阪府門真市大字門真1048番地松下電工 株式会社内 (56)参考文献 特開 平5−114620(JP,A) 特開 昭55−141733(JP,A) 特開 昭58−207643(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/56 H01L 23/28 Fターム・システム(JPO) WPI/L(DIALOG)──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yasutaka Miyata 1048 Kadoma Kadoma, Osaka Pref.Matsushita Electric Works, Ltd. Inventor Hirohisa Hino 1048, Kazuma Kadoma, Kadoma City, Osaka Pref. Matsushita Electric Works, Ltd. (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/56 H01L 23/28 F-term system (JPO) WPI / L (DIALOG)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 配線基板に半導体素子を電気的に接続し
て搭載し、開口部を設けて形成したマスクを開口部の内
側に半導体素子を位置させて配線基板に重ね、マスクの
上に供給された封止材料を3Torr以下の減圧条件下
でスキージで擦ってマスクの開口部を通して封止材料を
封止印刷し、さらに大気圧の条件下でマスク上の封止材
料をスキージで擦ってマスクの開口部を通して封止材料
を仕上げ印刷することによって、封止材料で半導体素子
を封止することを特徴とする半導体装置の製造方法。
1. A semiconductor device is electrically connected to and mounted on a wiring board, and a mask formed with an opening is placed on the wiring substrate with the semiconductor element positioned inside the opening and supplied on the mask. a sealing material sealing the print through the openings in the mask rubbing squeegee sealing material which is under a reduced pressure condition of at most 3 Torr, the mask rubbed further sealing material on the mask with the squeegee under the conditions of atmospheric pressure A semiconductor element is sealed with the sealing material by finish-printing the sealing material through the opening of the semiconductor device.
【請求項2】 請求項1に記載の方法で配線基板上に半
導体素子が封止されて成ることを特徴とする半導体装
置。
2. A semiconductor device, wherein a semiconductor element is sealed on a wiring board by the method according to claim 1.
JP19447197A 1997-07-18 1997-07-18 Semiconductor device manufacturing method and semiconductor device Expired - Fee Related JP3351996B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19447197A JP3351996B2 (en) 1997-07-18 1997-07-18 Semiconductor device manufacturing method and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19447197A JP3351996B2 (en) 1997-07-18 1997-07-18 Semiconductor device manufacturing method and semiconductor device

Publications (2)

Publication Number Publication Date
JPH1140591A JPH1140591A (en) 1999-02-12
JP3351996B2 true JP3351996B2 (en) 2002-12-03

Family

ID=16325107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19447197A Expired - Fee Related JP3351996B2 (en) 1997-07-18 1997-07-18 Semiconductor device manufacturing method and semiconductor device

Country Status (1)

Country Link
JP (1) JP3351996B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1203792A4 (en) * 1999-02-25 2002-05-29 Nitto Denko Corp Resin composition for semiconductor encapsulation, semiconductor device obtained with the same, and process for producing semiconductor device
DE10163084A1 (en) 2001-12-20 2003-07-17 Infineon Technologies Ag Electronic component and method for its production
JP3656994B2 (en) * 2002-07-26 2005-06-08 株式会社野田スクリーン Vacuum printing device

Also Published As

Publication number Publication date
JPH1140591A (en) 1999-02-12

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