JP3230932B2 - Multilayer electronic components - Google Patents

Multilayer electronic components

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Publication number
JP3230932B2
JP3230932B2 JP19075794A JP19075794A JP3230932B2 JP 3230932 B2 JP3230932 B2 JP 3230932B2 JP 19075794 A JP19075794 A JP 19075794A JP 19075794 A JP19075794 A JP 19075794A JP 3230932 B2 JP3230932 B2 JP 3230932B2
Authority
JP
Japan
Prior art keywords
electrode
hole
internal electrode
chip
external electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP19075794A
Other languages
Japanese (ja)
Other versions
JPH0855727A (en
Inventor
洋一 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
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Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP19075794A priority Critical patent/JP3230932B2/en
Publication of JPH0855727A publication Critical patent/JPH0855727A/en
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、積層チップインダク
タ、積層コンデンサ等の積層型電子部品で、その内部電
極と外部電極との接続構造を改良したものに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer electronic component, such as a multilayer chip inductor and a multilayer capacitor, which has an improved connection structure between internal electrodes and external electrodes.

【0002】[0002]

【従来の技術】従来、この種の積層チップインダクタ、
例えばチップビーズとして図11乃至図14に示すもの
が知られている。
2. Description of the Related Art Conventionally, this kind of multilayer chip inductor,
For example, chip beads shown in FIGS. 11 to 14 are known.

【0003】このチップビーズを製造するときは、ま
ず、図11に示すように、磁性体グリーンシート1a,
1b,1cを用意し、そのうちの一枚の磁性体グリーン
シート1bに導電ペーストを塗布し内部電極2のパター
ンを多数印刷する。次いで、この印刷された磁性体グリ
ーンシート1b及びこれを挟む保護用の各磁性体グリー
ンシート1a,1cを実線矢印に示すように積層固着す
る。その後、磁性体グリーンシート1bが図11の一点
鎖線に沿って分離されるよう、この積層体を切断する。
これにより、図12及び図13に示すようなチップビー
ズ素体3が形成される。
When manufacturing the chip beads, first, as shown in FIG. 11, a magnetic green sheet 1a,
1b and 1c are prepared, a conductive paste is applied to one of the magnetic green sheets 1b, and a large number of patterns of the internal electrodes 2 are printed. Next, the printed magnetic green sheets 1b and the protective magnetic green sheets 1a and 1c sandwiching the printed magnetic green sheets 1b are laminated and fixed as indicated by solid arrows. Thereafter, the laminate is cut so that the magnetic green sheet 1b is separated along the dashed line in FIG.
Thus, the chip bead element body 3 as shown in FIGS. 12 and 13 is formed.

【0004】このように形成されたチップビーズ素体3
を乾燥、焼成し、その後、このチップビーズ素体3の外
側に内部電極2の端部(引き出し電極部2a)に接続す
る外部電極4を図14に示すように塗布形成する。最後
に、この外部電極4の外側にはんだメッキを行いチップ
ビーズが製造される。
[0004] The chip bead element body 3 thus formed
Then, an external electrode 4 connected to the end of the internal electrode 2 (lead electrode portion 2a) is formed on the outside of the chip bead body 3 as shown in FIG. Finally, solder plating is performed on the outside of the external electrodes 4 to produce chip beads.

【0005】[0005]

【発明が解決しようとする課題】このようにチップビー
ズを製造するときは、外部電極4を塗布する前にペース
ト状の内部電極2が乾燥、焼成されるため、この焼成等
により内部電極2が収縮し、引き出し電極部2aの電極
面積が減少したり、或いは、図13に示すように引き出
し電極部2aがチップビーズ素体3の内側に引き込まれ
てしまう。
When the chip beads are manufactured as described above, the paste-like internal electrode 2 is dried and fired before the external electrode 4 is applied. As a result, the electrode area of the extraction electrode portion 2a is reduced, or the extraction electrode portion 2a is pulled into the chip bead body 3 as shown in FIG.

【0006】このような状態で外部電極4を塗布して
も、図14に示すように引き出し電極部2aと外部電極
4との間に隙間5ができ、接続不良を起こすおそれがあ
った。また、この内部電極2と外部電極4との接続信頼
性は、大きな電流を使用するとき特に高いものを要求さ
れるが、従来のチップビーズではその要求を満足させる
ことができず、チップビーズの高電流仕様の製造には不
向きなものとなっていた。
[0006] Even when the external electrode 4 is applied in such a state, a gap 5 is formed between the extraction electrode portion 2a and the external electrode 4 as shown in FIG. In addition, the connection reliability between the internal electrode 2 and the external electrode 4 is required to be particularly high when a large current is used. However, the conventional chip beads cannot satisfy the demand, and the chip beads cannot be used. It was unsuitable for manufacturing high-current specifications.

【0007】このようなことから、従来は、この引き出
し電極部2aの接続面積をその厚さ方向にかせぐため、
引き出し電極部2aを通常よりも厚膜に形成したり、或
いは、引き出し電極部2aに導電ペーストを複数回に亘
って塗布したり、更には、引き出し電極部2aを複数の
導電部材で積層する構造が採用されていた。
For this reason, conventionally, in order to increase the connection area of the extraction electrode portion 2a in the thickness direction,
A structure in which the extraction electrode portion 2a is formed thicker than usual, or a conductive paste is applied to the extraction electrode portion 2a a plurality of times, and further, the extraction electrode portion 2a is laminated with a plurality of conductive members. Was adopted.

【0008】しかしながら、引き出し電極部2aを通常
よりも厚膜に形成するときは、引き出し電極部2aを含
む内部電極2全体を一回のスクリーン印刷等で形成でき
ないし、また、導電ペーストを複数回に亘り塗布する構
造では、内部電極2全体を印刷するマスクスクリーン
と、これとは別個に引き出し電極部2aのみを印刷する
マスクスクリーンを用意しなければならず、製造コスト
が割高になるという問題点を有していた。更に、引き出
し電極部2aに導電部材を積層する構造では、この引き
出し電極部2aに対応する導電部材を予め用意し、これ
を積層しなければならず、その製造工程が複雑になると
いう問題点を有していた。
However, when the extraction electrode portion 2a is formed to be thicker than usual, the entire internal electrode 2 including the extraction electrode portion 2a cannot be formed by one screen printing or the like, and the conductive paste is applied a plurality of times. In such a structure, a mask screen for printing the entire internal electrode 2 and a mask screen for printing only the lead-out electrode portion 2a must be prepared separately, which increases the manufacturing cost. Had. Further, in the structure in which a conductive member is laminated on the extraction electrode portion 2a, a conductive member corresponding to the extraction electrode portion 2a must be prepared in advance and laminated, and the manufacturing process becomes complicated. Had.

【0009】本発明の目的は前記従来の課題に鑑み、内
部電極と外部電極とを簡単かつ確実に接続でき、接続信
頼性の高い積層型電子部品を提供することにある。
An object of the present invention is to provide a laminated electronic component which can easily and surely connect an internal electrode and an external electrode and has high connection reliability in view of the above-mentioned conventional problems.

【0010】[0010]

【課題を解決するための手段】本発明は前記課題を解決
するため、少なくとも一層に内部電極が形成された複数
の層を積層してなる積層体と、該積層体外面に形成され
且つ該外面に露出する前記内部電極の端部に接続する外
部電極とを有する積層型電子部品において、前記内部電
極が形成された層における前記内部電極と外部電極との
接続部位には、導電ペーストで充填されたスルーホール
が前記内部電極と一括して形成されており、前記スルー
ホールは、層の厚さ方向に延びるとともに積層体外面に
厚さ方向に切断された断面が露出し、且つ、前記内部電
極及び外部電極と接続していることを特徴とする。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a laminate comprising a plurality of layers each having at least one internal electrode formed thereon, and a laminate formed on the outer surface of the laminate and having the outer surface. In a multilayer electronic component having an external electrode connected to an end of the internal electrode exposed to the outside, a connection portion between the internal electrode and the external electrode in a layer where the internal electrode is formed is filled with a conductive paste. Through hole
Are formed together with the internal electrodes,
The hole extends in the thickness direction of the layer and is formed on the outer surface of the laminate.
The cross section cut in the thickness direction is exposed and the internal
It is characterized by being connected to a pole and an external electrode .

【0011】[0011]

【作用】本発明によれば、外部電極には内部電極の端部
と内部電極に接続したスルーホールがそれぞれ接続さ
れ、このスルーホールの接続面積の分、従来の接続面積
より大きくなる。
According to the present invention, the external electrode is connected to the end of the internal electrode and the through hole connected to the internal electrode, respectively, and the connection area of the through hole is larger than the conventional connection area.

【0012】また、この接続面積の拡大に際し、スルー
ホールを形成するだけで良いため、簡単に接続面積を拡
大できる。
In addition, when the connection area is increased, it is only necessary to form a through hole, so that the connection area can be easily expanded.

【0013】[0013]

【実施例】図1乃至図9の(a)(b)は本発明に係る積層型
電子部品の一実施例を示すもので、図1は磁性体グリー
ンシートの積層工程を示す斜視図、図2はチップビーズ
素体の斜視図、図3は図2のA−A線矢視方向の断面
図、図4はチップビーズの断面図、図5は内部電極及び
スルーホールの平面図、図6の(a)(b)は内部電極及びス
ルーホールの接続部分を従来例と比較した断面図、図7
の(a)(b)はチップビーズのたわみ試験及び試験結果を示
す図、図8はたわみ試験による外部電極の剥離状態を示
す従来の断面図、図9はたわみ試験による外部電極の剥
離状態を示す本実施例の断面図である。なお、従来例と
同一構成部分は同一符号をもって表す。
1 to 9 show one embodiment of a laminated electronic component according to the present invention. FIG. 1 is a perspective view showing a lamination process of a magnetic green sheet. 2 is a perspective view of the chip bead body, FIG. 3 is a cross-sectional view taken along line AA of FIG. 2, FIG. 4 is a cross-sectional view of the chip bead, FIG. 5 is a plan view of the internal electrodes and through holes, and FIG. 7 (a) and 7 (b) are cross-sectional views comparing the connection portion of the internal electrode and the through hole with the conventional example.
(A) and (b) are diagrams showing a bending test and a test result of a chip bead, FIG. 8 is a conventional cross-sectional view showing a peeling state of an external electrode by a bending test, and FIG. FIG. 3 is a cross-sectional view of the embodiment shown. The same components as those of the conventional example are denoted by the same reference numerals.

【0014】本実施例に係るチップビーズ素体も従来例
と同様に製造されるもので、図1に示すように、3枚の
磁性体グリーンシート1a,1b,1cを実線矢印に示
すように積層固着し、次いで、内部電極2が印刷された
磁性体グリーンシート1bを図1の一点鎖線に沿って分
離するようこの積層体を切断し、図2に示すようなチッ
プビーズ素体6を形成する。
The chip bead body according to the present embodiment is also manufactured in the same manner as the conventional example. As shown in FIG. 1, three magnetic green sheets 1a, 1b and 1c are arranged as shown by solid arrows. The laminated body is cut and fixed so that the magnetic green sheet 1b on which the internal electrodes 2 are printed is separated along the dashed line in FIG. 1 to form a chip bead body 6 as shown in FIG. I do.

【0015】ここで、本実施例の特徴とするところは、
内部電極2を印刷した磁性体グリーンシート1bにおい
て、その内部電極2の端部である引き出し電極部2aに
スルーホール7を形成した点にある。
The features of this embodiment are as follows.
In the magnetic green sheet 1b on which the internal electrode 2 is printed, a through hole 7 is formed in a lead electrode portion 2a which is an end of the internal electrode 2.

【0016】即ち、このスルーホール7は磁性体グリー
ンシート1bの厚さ方向に円筒状に形成されたもので、
図5に示すように、積層体の切断線がスルーホール7の
中央を通るよう配置されている。これにより、図2及び
図3に示すように、チップビーズ素体6の側面に外部電
極4への接続部分が露出する。この接続部分は引き出し
電極部2aとスルーホール7とからなるため、その接続
面積が、図4に示すように、スルーホール7の分、従来
より広くなる。
That is, the through hole 7 is formed in a cylindrical shape in the thickness direction of the magnetic green sheet 1b.
As shown in FIG. 5, the cut line of the stacked body is arranged to pass through the center of the through hole 7. As a result, as shown in FIGS. 2 and 3, a connection portion to the external electrode 4 is exposed on the side surface of the chip bead element body 6. Since this connection portion is composed of the extraction electrode portion 2a and the through hole 7, the connection area thereof is wider than that of the related art as shown in FIG.

【0017】この接続面積の拡大割合を図5及び図6の
(a)(b)に基づいて説明する。ここで、本実施例(図6の
(a))及び従来例(図6の(b))の両者とも、その引き出
し電極部2aの幅寸法が0.92mm、厚さ寸法が0.02mmとな
っており、その接続面積は0.0184mm2(0.92mm×0.02m
m)となる。一方、本実施例のスルーホール7の直径が
0.25mm、厚さ寸法が0.06mmであり、このスルーホール7
の接続面積が0.015mm2(0.25mm×0.06mm)となる。従っ
て、従来の接続面積に対する本実施例の接続面積の拡大
割合は約1.82[(0.0184mm2+0.015mm2)/0.0184mm2
倍となる。なお、一点鎖線は切断線を示している。
The rate of increase of the connection area is shown in FIGS.
A description will be given based on (a) and (b). Here, in the present embodiment (FIG. 6)
In both (a)) and the conventional example ((b) of FIG. 6), the width of the lead electrode portion 2a is 0.92 mm, the thickness is 0.02 mm, and the connection area is 0.0184 mm 2 ( 0.92mm × 0.02m
m). On the other hand, the diameter of the through hole 7 of this embodiment is
0.25mm, thickness is 0.06mm.
Has a connection area of 0.015 mm 2 (0.25 mm × 0.06 mm). Therefore, expansion ratio of the connection area of the present embodiment for conventional connection area about 1.82 [(0.0184mm 2 + 0.015mm 2 ) /0.0184mm 2]
Double. The dashed line indicates the cutting line.

【0018】このように、本実施例に係るチップビーズ
は外部電極4との接続面積がスルーホール7の分広くな
るため、チップビーズの製造工程で内部電極2が収縮し
チップビーズ素体6側に引き込まれても、その分このス
ルーホール7の接続面積でカバーでき、内部電極2と外
部電極4の接続信頼性が向上する。
As described above, since the chip bead according to the present embodiment has a larger connection area with the external electrode 4 due to the through hole 7, the internal electrode 2 shrinks in the chip bead manufacturing process and the chip bead body 6 side , The connection area of the through hole 7 can cover the connection area, and the connection reliability between the internal electrode 2 and the external electrode 4 is improved.

【0019】このような接続信頼性を確認するため、図
7の(a)に示すたわみ試験を行った。試料として本実施
例のチップビーズと従来のチップビーズをそれぞれ10
個宛用意し、これを基板にはんだ付けし、この基板のた
わみによる各チップビーズの機械的破壊及び電気的破壊
を計数した。この結果、図7の(b)に示すように、本実
施例のチップビーズはたわみ量が12mm以上となった
ときのみ機械的破壊及び電気的破壊が起こるのに対し
て、従来のチップビーズはたわみ量が12mm未満で、
機械的破壊及び電気的破壊が5個程度起きている。よっ
て、このたわみ試験からも本実施例に係るチップビーズ
が接続信頼性に優れていることが理解できる。
In order to confirm such connection reliability, a bending test shown in FIG. 7A was performed. The chip beads of the present example and the conventional chip beads were
Each chip bead was soldered to a substrate, and the mechanical and electrical destruction of each chip bead due to the deflection of the substrate was counted. As a result, as shown in FIG. 7B, the chip beads of the present example cause mechanical and electrical destruction only when the deflection amount is 12 mm or more, whereas the conventional chip beads have The amount of deflection is less than 12 mm,
About five mechanical and electrical destructions have occurred. Therefore, it can be understood from the deflection test that the chip beads according to the present example have excellent connection reliability.

【0020】また、このたわみ試験による機械的破壊及
び電気的破壊を図8の(a)(b)及び図9の(a)(b)を参照し
て説明する。図8の(a)に示すように、従来のチップビ
ーズを基板8にはんだ9で固着した後、図8の(b)に示
すように、白抜き矢印方向に圧力を加えたとき、はんだ
9及び外部電極4に実線矢印の方向に力が加わる。これ
により、チップビーズ素体6から外部電極4が剥離し、
外部電極4と引き出し電極部2aが離隔する。この剥離
により機械的破壊及び電気的破壊が起こる。
The mechanical and electrical destruction by the bending test will be described with reference to FIGS. 8A and 8B and FIGS. As shown in FIG. 8 (a), after the conventional chip beads are fixed to the substrate 8 with solder 9, as shown in FIG. 8 (b), when pressure is Further, a force is applied to the external electrode 4 in the direction of the solid arrow. As a result, the external electrode 4 is peeled off from the chip bead body 6,
The external electrode 4 is separated from the extraction electrode portion 2a. This delamination causes mechanical and electrical destruction.

【0021】他方、図9の(a)に示すように、本実施例
のチップビーズを基板8にはんだ9で固着した後、同じ
く図9の(b)に示すように白抜き矢印方向に圧力を加え
たときは、これまた実線矢印方向に力が加わりチップビ
ーズ素体6から外部電極4が剥離することがある。しか
しながら、内部電極2、スルーホール7及び外部電極4
がともにAg等を主成分とする共通の材質からなるた
め、その接続強度が高く、従って本実施例の如く引き出
し電極部2aをスルーホール7にて接触面積が広くとる
ときは、その機械的強度が向上し、その破壊が起こりに
くいことが理解できる。
On the other hand, as shown in FIG. 9 (a), after the chip beads of this embodiment are fixed to the substrate 8 with solder 9, pressure is also applied in the direction of a white arrow as shown in FIG. 9 (b). Is applied, a force is also applied in the direction of the solid arrow, and the external electrode 4 may peel off from the chip bead body 6. However, the inner electrode 2, the through hole 7, and the outer electrode 4
Are made of a common material mainly composed of Ag or the like, so that their connection strength is high. Therefore, when the contact area of the lead-out electrode portion 2a with the through-hole 7 is large as in this embodiment, the mechanical strength is high. Can be understood, and the destruction is unlikely to occur.

【0022】また、その電気的破壊の点を検討するに、
図9の(b)に示すように機械的破壊が起こったときで
も、その接続面積が広い分、内部電極2と外部電極4と
が電気的に接続しており、電気的破壊が起こりにくいこ
とが理解できる。
Further, to examine the point of the electrical breakdown,
Even when mechanical destruction occurs as shown in FIG. 9B, the internal electrode 2 and the external electrode 4 are electrically connected to each other due to the large connection area, so that electrical destruction is unlikely to occur. Can understand.

【0023】更に、内部電極2及びスルーホール7を形
成するときは、磁性体グリーンシート1bにスルーホー
ル用の穴を穿設し、引き出し電極部2aがこの穴に対応
するよう導電ペーストを塗布すれば良く、これにより、
内部電極2及びスルーホール7が一括して形成され、外
部電極4への接続面積を簡単に拡大できる。
Further, when forming the internal electrode 2 and the through hole 7, a hole for a through hole is formed in the magnetic green sheet 1b, and a conductive paste is applied so that the extraction electrode portion 2a corresponds to the hole. All you need is this
The internal electrode 2 and the through hole 7 are formed at a time, and the connection area to the external electrode 4 can be easily enlarged.

【0024】図10の(a)(b)(c)(d)は本実施例に係るチ
ップビーズ素体の他の例を示すものである。図10の
(a)にはチップビーズ素体6aの引き出し電極部2aの
両端にスルーホール7aを形成したものが示されてい
る。このように2箇所にスルーホール7aを形成するこ
とにより、外部電極4への接続面積を更に拡大してい
る。
FIGS. 10 (a), (b), (c) and (d) show another example of the chip bead body according to the present embodiment. Of FIG.
(a) shows a chip bead body 6a in which through-holes 7a are formed at both ends of a lead electrode portion 2a. By forming the through-holes 7a at two locations in this manner, the connection area to the external electrode 4 is further increased.

【0025】図10の(b)には内部電極2の電気特性を
向上させるため引き出し電極部2aの幅を狭くしたチッ
プビーズ素体6bが示されている。このような場合は引
き出し電極部2aの接続面積が非常に狭くなるため、こ
のスルーホール7bは外部電極4との接続のために必要
不可欠なものとなる。
FIG. 10B shows a chip bead body 6b in which the width of the extraction electrode portion 2a is reduced in order to improve the electrical characteristics of the internal electrode 2. In such a case, since the connection area of the extraction electrode portion 2a becomes very small, the through hole 7b is indispensable for connection with the external electrode 4.

【0026】図10の(c)(d)には内部電極を上下2層に
亘って形成したチップビーズ素体6c,6dが示されて
おり、そのうち図10の(c)には上下の引き出し電極部
2aを一体に接続するスルーホール7cが示され、図1
0の(d)には上下の引き出し電極部2aをそれぞれ別個
に接続するスルーホール7dが示されている。このよう
に、内部電極が多層に亘って形成されている場合にあっ
ても、各スルーホール7c,7dで任意に接続面積を拡
大できる。
FIGS. 10 (c) and 10 (d) show chip bead bodies 6c and 6d in which internal electrodes are formed in two upper and lower layers, of which FIG. A through hole 7c for integrally connecting the electrode portion 2a is shown in FIG.
0 (d) shows a through hole 7d for separately connecting the upper and lower extraction electrode portions 2a. As described above, even when the internal electrodes are formed in multiple layers, the connection area can be arbitrarily increased by the through holes 7c and 7d.

【0027】なお、前記実施例では積層型電子部品中、
積層チップインダクタであるチップビーズについて説明
したが、内部電極とこれに接続する外部電極を有するも
のであれば積層コンデンサ等全ての積層型電子部品に適
用できることは言うまでもない。
In the above embodiment, in the multilayer electronic component,
Although the chip beads, which are multilayer chip inductors, have been described, it goes without saying that the present invention can be applied to all multilayer electronic components such as multilayer capacitors as long as they have internal electrodes and external electrodes connected to them.

【0028】[0028]

【発明の効果】以上説明したように、本発明によれば、
外部電極には内部電極の端部と内部電極に接続したスル
ーホールがそれぞれ接続され、このスルーホールの接続
面積の分、従来の接続面積より大きくなり、これによ
り、内部電極と外部電極との接続信頼性を向上させるこ
とができる。また、この接続面積の拡大に際し、スルー
ホールを形成するだけで良いため、簡単に接続面積を拡
大できる。
As described above, according to the present invention,
The end of the internal electrode and the through-hole connected to the internal electrode are connected to the external electrode, respectively, and the connection area of the through-hole is larger than the conventional connection area, thereby connecting the internal electrode to the external electrode. Reliability can be improved. In addition, when the connection area is increased, it is only necessary to form a through-hole, so that the connection area can be easily increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る磁性体グリーンシートの積層工程
を示す斜視図
FIG. 1 is a perspective view showing a step of laminating a magnetic green sheet according to the present invention.

【図2】本発明に係るチップビーズ素体の斜視図FIG. 2 is a perspective view of a chip bead body according to the present invention.

【図3】図2のA−A線矢視方向の断面図FIG. 3 is a sectional view taken along the line AA of FIG. 2;

【図4】本発明に係る外部電極が形成されたチップビー
ズ素体の断面図
FIG. 4 is a cross-sectional view of a chip bead body on which external electrodes according to the present invention are formed.

【図5】本発明に係る内部電極及びスルーホールの平面
FIG. 5 is a plan view of an internal electrode and a through hole according to the present invention.

【図6】本発明に係る内部電極及びスルーホールの接続
部分を従来例と比較した断面図
FIG. 6 is a cross-sectional view comparing a connection portion of an internal electrode and a through hole according to the present invention with a conventional example.

【図7】チップビーズのたわみ試験及び試験結果を示す
FIG. 7 is a diagram showing a bending test and test results of chip beads.

【図8】たわみ試験による外部電極の剥離状態を示す従
来の断面図
FIG. 8 is a conventional cross-sectional view showing a peeled state of an external electrode by a bending test.

【図9】たわみ試験による外部電極の剥離状態を示す本
実施例の断面図
FIG. 9 is a cross-sectional view of the present example showing a state of peeling of the external electrode by a deflection test.

【図10】本発明に係るチップビーズ素体の他の例を示
す斜視図
FIG. 10 is a perspective view showing another example of the chip bead body according to the present invention.

【図11】従来の磁性体グリーンシートの積層工程を示
す斜視図
FIG. 11 is a perspective view showing a conventional magnetic green sheet laminating process.

【図12】従来のチップビーズ素体の斜視図FIG. 12 is a perspective view of a conventional chip bead element body.

【図13】図12のA−A線矢視方向の断面図FIG. 13 is a sectional view taken along the line AA of FIG. 12;

【図14】従来の外部電極が形成されたチップビーズ素
体の断面図
FIG. 14 is a cross-sectional view of a conventional chip bead body on which external electrodes are formed.

【符号の説明】[Explanation of symbols]

2…内部電極、2a…引き出し電極部、4…外部電極、
6,6a,6b,6c,6d…チップビーズ素体、7,
7a,7b,7c,7d…スルーホール。
2 ... internal electrode, 2 a ... lead electrode part, 4 ... external electrode,
6, 6a, 6b, 6c, 6d: chip bead body, 7,
7a, 7b, 7c, 7d ... through holes.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 少なくとも一層に内部電極が形成された
複数の層を積層してなる積層体と、該積層体外面に形成
され且つ該外面に露出する前記内部電極の端部に接続す
る外部電極とを有する積層型電子部品において、 前記内部電極が形成された層における前記内部電極と外
部電極との接続部位には、導電ペーストで充填されたス
ルーホールが前記内部電極と一括して形成されており、 前記スルーホールは、層の厚さ方向に延びるとともに積
層体外面に厚さ方向に切断された断面が露出し、且つ、
前記内部電極及び外部電極と接続している ことを特徴とする積層型電子部品
1. A laminate formed by laminating a plurality of layers having at least one internal electrode formed thereon, and an external electrode formed on an outer surface of the laminate and connected to an end of the internal electrode exposed on the outer surface. In the multilayer electronic component having: a connection portion between the internal electrode and the external electrode in the layer on which the internal electrode is formed, a portion filled with conductive paste.
A through hole is formed integrally with the internal electrode, and the through hole extends in the thickness direction of the layer and is
The cross section cut in the thickness direction is exposed on the outer surface of the layer body, and
A multilayer electronic component connected to the internal electrode and the external electrode
JP19075794A 1994-08-12 1994-08-12 Multilayer electronic components Expired - Lifetime JP3230932B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19075794A JP3230932B2 (en) 1994-08-12 1994-08-12 Multilayer electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19075794A JP3230932B2 (en) 1994-08-12 1994-08-12 Multilayer electronic components

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2000200694A Division JP2001028312A (en) 2000-01-01 2000-07-03 Manufacture of laminated electronic component

Publications (2)

Publication Number Publication Date
JPH0855727A JPH0855727A (en) 1996-02-27
JP3230932B2 true JP3230932B2 (en) 2001-11-19

Family

ID=16263231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19075794A Expired - Lifetime JP3230932B2 (en) 1994-08-12 1994-08-12 Multilayer electronic components

Country Status (1)

Country Link
JP (1) JP3230932B2 (en)

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JP4687205B2 (en) * 2005-04-01 2011-05-25 株式会社村田製作所 Electronic components
JP2009295819A (en) * 2008-06-05 2009-12-17 Murata Mfg Co Ltd Electronic component
JP6031671B2 (en) * 2012-04-12 2016-11-24 パナソニックIpマネジメント株式会社 Common mode noise filter
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101462747B1 (en) * 2013-01-03 2014-11-17 삼성전기주식회사 Fabricating method for multi layer ceramic electronic device and multi layer ceramic electronic device using thereof

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