JP3230311B2 - Manufacturing method of TFT matrix - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display (LC).
The present invention relates to a method of manufacturing a TFT matrix used in the configuration of D) and the like, and particularly to a method of treating a surface of a barium borosilicate glass substrate used in manufacturing a TFT matrix.

[0002] In recent years, there has been a strong demand for lower cost as well as high quality of LCDs, and in order to meet such demands, it is necessary to further improve the production yield. One of the factors that lowers the LCD production yield is display unevenness, which is often caused by substrate leakage in the TFT matrix that constitutes the LCD, and eliminating the substrate leakage in the TFT matrix improves the LCD yield. Is strongly desired for.

[0003]

2. Description of the Related Art Sodium-free barium borosilicate glass which adversely affects the characteristics of semiconductor elements is mainly used for a glass substrate on which a TFT matrix is formed.

[0004] In the manufacture of a TFT matrix, it is necessary to remove contaminants such as metal compounds adhered to the surface of the barium borosilicate glass substrate during manufacturing and transportation, and fine flaws formed during transportation and the like. Is extremely important for maintaining high quality of the TFT matrix. Therefore, the barium borosilicate glass substrate is subjected to a cleaning process for removing surface contamination and flaws before the TFT matrix manufacturing process.

[0005] This cleaning treatment is performed by using a detergent such as a surfactant,
It is generally performed using an acid-based chemical. Conventionally, in the above-mentioned cleaning treatment, the cleaning treatment with an acid-based chemical is performed by using a strong acid solution that does not dissolve the glass itself, such as sulfuric acid (H ₂ SO ₄ ), which has an oxidizing property and is used for cleaning quartz equipment and the like. The method has been performed by using a POS solution in which hydrogen (H ₂ O ₂ ) is mixed at a ratio of 10: 1, and immersing the glass substrate for about 5 minutes while heating the POS solution to 100 ° C.

[0006]

However, when a POS solution that is a mixture of sulfuric acid and hydrogen peroxide is used,
Some components of the glass substrate (for example, barium and aluminum) contained in the surface of the barium borosilicate glass substrate are selectively eluted into the solution, and the above components are eluted in the subsequent surface of the glass substrate. As a result, there is a phenomenon that a low-density layer that is more porous than the inside is formed at a depth of about 20 nm.

When the low-density layer is thus formed deeply, for example, in the process of manufacturing an inverted staggered type TFT matrix, as shown in FIG. When a metal film, for example, a titanium (Ti) film 3 as a gate electrode material is formed on a glass substrate 1 by sputtering, a deep low density having a depth (t ') of about 20 nm on the surface of the substrate 1 as described above. As shown in FIG. 4 (b), the Ti particles 3P penetrate and adhere to the deep portion of the layer 2 in the next step.
When the gate electrode wiring 3G made of the Ti film 3 is formed on the glass substrate 1 by selectively etching and removing the Ti film 3 using the resist pattern 4 as a mask, the low-density layer 2 on the surface of the substrate 1 is exposed. 3P penetrating into the deep part of the substrate remains without being completely removed by the above-mentioned etching, and forms a high-resistance layer 12 on the surface layer of the exposed barium borosilicate glass substrate 1, thereby deteriorating the insulating property of the substrate surface. Let it.

Therefore, thereafter, as shown in FIG. 4C, a gate insulating film 5 is formed, an amorphous silicon (a-Si) operating layer 6 is formed, and a channel protective film 7 is formed by a usual method. A drain contact layer 8D and a source contact layer 8S made of n ⁺ type a-Si are formed, and a drain electrode wiring 9D is formed.
And the source electrode 9S, forming the transparent pixel electrode 10,
When the surface is selectively covered with a coating insulating film 11 to complete an inverted staggered TFT matrix, the voltage applied to and held by the transparent pixel electrode 10 is applied to the high resistance layer of the surface layer of the glass substrate 1. Leakage to the gate bus line 13 through 12 causes the pixel to drop, reducing the brightness of that pixel,
There has been a problem in that the yield is reduced due to uneven display on an LCD configured using the TFT matrix.

FIG. 5 is an equivalent circuit diagram showing the causes of uneven display of the LCD. GB is a gate bus line, DB is a drain bus line, T is a TFT, G is a gate electrode, D is a drain electrode, and S is a source electrode. , P is a transparent pixel electrode, LC is a liquid crystal, C is a parasitic capacitance of the pixel electrode formed by the overlap of the gate bus line and the pixel electrode, and R is a high resistance layer formed by Ti particles remaining deep in the low density layer. When T is turned on, a charge corresponding to the pixel voltage accumulated in the capacitor C between the pixel electrode P and the gate bus line GB by the drain voltage applied to the pixel electrode P is transferred to the high resistance layer on the substrate surface. This shows a state of leaking to the gate bus line GB via R.

In view of the above, the present invention is to improve the insulating property of the substrate surface by completely removing the high-resistance layer formed of the electrode wiring metal in the low-density layer on the surface of the barium borosilicate glass substrate when patterning the electrode wiring. It is an object of the present invention to provide a possible method of manufacturing a TFT matrix, to prevent a drop in pixel voltage, to improve the reliability of the TFT matrix, and to improve the manufacturing yield of an LCD using the TFT matrix.

[0011]

Solving the problems SUMMARY OF THE INVENTION may, TFT having a step of forming a direct metal electrode on a glass substrate
In the method for producing a matrix, as the glass substrate,
In an acid treatment process for cleaning the glass substrate surface
By controlling the acid treatment amount, a method of manufacturing a TFT matrix using a barium borosilicate glass substrate having a surface low density layer which is more porous than the inside formed at a depth of 10 nm or less is achieved . Further, after performing an acid treatment for cleaning the substrate surface, the entire surface of the substrate is etched by a wet etching means using a hydrofluoric acid-based liquid or a dry etching means using a fluorine-based gas, so that the inside of the substrate is etched from the inside. 10 nm or less porous low density layer
Using a barium borosilicate glass substrate formed at the depth below
It is achieved by the method for producing a TFT matrix that.

[0012]

The inventor has found that, in the inverted staggered type TFT matrix having the structure shown in FIG. 4C, the surface resistance of the surface of the barium borosilicate glass substrate, that is, the surface on which the gate electrode is directly disposed, The relationship between the pixel voltage applied to the transparent pixel electrode and the voltage drop was examined.

As a result, as shown in FIG. 6, if the surface resistance of the glass substrate is 10 ¹² Ω / □ or more, the pixel voltage of about 5 V applied to the transparent pixel electrode is reduced to 15 mS required for LCD operation. While the surface resistance is maintained for
At 10 ¹¹ Ω / □, it was confirmed that the pixel voltage dropped to 2 V or less after 15 ms, and the luminance of the pixel was impaired.

A low-density layer on the surface of a barium borosilicate glass substrate is formed at various depths, a Ti film is formed on each of the low-density layers by a sputtering method, and the Ti film is removed by dry etching. Measure the surface resistance of the surface, if the depth of the surface low-density layer is 10 nm or less, after the dry etching, a low- resistance layer is not formed with the Ti film remaining in the surface low-density layer, It was confirmed that a surface resistance of about 10 ¹² Ω / □ or more was obtained, which was almost the same as before the Ti film was deposited.

Therefore, in the present invention, the TFT is controlled by controlling the amount of acid treatment in an acid treatment step for cleaning the substrate surface, or by etching the entire substrate surface with a hydrofluoric acid-based liquid or a fluorine-based gas after the acid treatment. The depth of the low density layer on the surface of the barium borosilicate glass substrate used for the production of the matrix is 10 nm.
Accordingly, the pixel voltage of the TFT matrix is prevented from dropping, and the decrease in the yield due to the uneven display of the LCD configured using the TFT matrix is prevented.

[0016]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and 2 are cross-sectional views showing steps in one embodiment of the present invention, and FIG. 3 is a cross-sectional view showing steps in another embodiment of the present invention. The same objects are denoted by the same reference symbols throughout the drawings.

When manufacturing an inverted staggered type TFT matrix by the method of the present invention, a barium borosilicate glass substrate 1 used for manufacturing the TFT matrix is, for example, a Corning # 7059 glass substrate. Prior to the manufacturing process, the substrate is subjected to the same POS solution (H ₂ SO ₄ : H ₂ O ₂ = 10: 1 mixture) as before to reduce the surface low-density layer 2 to a depth (t) of 10 nm or less. Cleaning is performed by controlling the liquid temperature and the processing time so as to be as appropriate. At this time, the control conditions of the liquid temperature and the processing time may be, for example, a liquid temperature of 80 ° C. and a processing time of 2 minutes or less.

Referring to FIG. 1 (b), the substrate was sputtered to a thickness of about 100 nm.
A Ti film 3 is formed. At this time, the Ti particles 3P are also penetrated and fixed in the surface low density layer 2 and the high resistance layer 12 is formed on the surface of the substrate 1.

Next, referring to FIG. 1C, using the resist pattern 4 as a mask, the Ti film 3 is patterned by dry etching using a fluorine-based gas such as SF ₆ or a chlorine-based gas such as Cl _2. The gate electrode wiring 3G is formed. At this time, since the depth of the low-density layer 2 formed on the surface of the substrate is suppressed to 10 nm or less as described above, the surface of the substrate 1 on which the Ti film 3 is etched away and exposed is exposed. The minute residue of the Ti film 3 in the surface low-density layer 2, that is, the Ti fine particles 3P are completely removed by etching, and the exposed high-resistance layer on the surface of the substrate 1
12 disappears. Note that the high-resistance layer 12 made of the Ti fine particles 3P selectively remains in the surface low-density layer 2 in the lower region of the gate electrode wiring 3G.

After the resist pattern 4 is removed, a 400 nm-thick film is formed on the substrate 1 having the gate electrode wiring 3G by CVD.
A gate insulating film 5 made of a Si ₃ N ₄ film having a thickness of about 20 nm, a non-doped amorphous silicon (a-Si) operating layer 6 having a thickness of about 20 nm is formed thereon by a CVD method, and then a gate insulating film 5 is formed thereon. A channel protective film 7 made of a Si ₃ N ₄ film having a thickness of about 200 nm is formed by a CVD method, a resist film is formed thereon, and the resist film is exposed from the back side of the substrate using the gate electrode wiring 3G as a mask. Then, development is performed to form a resist pattern 14 on the channel protective film 7 which is self-aligned with the gate electrode wiring 3G.

Next, referring to FIG. 2A, the channel protective film 7 is patterned using the resist pattern 14 as a mask to form a channel protective film pattern 7P on the a-Si operation layer 6 which is self-aligned with the gate electrode wiring 3G. .

Next, referring to FIG. 2B, after removing the resist pattern 14,
In addition, n of about 10 nm thickness is formed by CVD.⁺Form a-Si layer
And then by the usual photolithographic means
⁺Pattern the a-Si layer to form n⁺Type a-Si drain capacitor
Tact layer 8D and n ⁺Formed a-Si source contact layer 8S
Subsequently, the channel protective film pattern 7P is masked.
And self-aligned with the contact layers 8D and 8S,
The layer 6 is patterned. Note that this etching
And the a-Si operation layer 6 located above the gate electrode wiring 3G.
The channel formation region is protected by the channel protective film pattern 7P.
Protected.

Next, as shown in FIG. 2 (c), on the above-mentioned substrate, a thickness of 100
An electrode wiring layer of about nm is formed, and patterning is performed by ordinary photolithography to form a drain electrode wiring 9D and a source electrode 9S that individually cover the drain contact layer 8D and the source contact layer 8S, and then on the substrate. An ITO film made of an oxide of indium and tin is formed to a thickness of about 100 nm by a sputtering method or the like, and is patterned by dry etching using a fluorine-based gas.
A transparent pixel electrode 10 made of ITO and partially in contact with the source electrode 9S is formed.

Next, as shown in FIG. 2D, a coating insulating film 11 of about 200 nm in thickness made of Si ₃ N ₄ is formed on the substrate by CVD, and the upper surface of the transparent pixel electrode 10 is exposed by photolithography. Windows 15
Is formed to complete an inverted staggered TFT matrix.

According to another method of the present invention, for example, the surface treatment of a barium borosilicate glass substrate used for forming the above-mentioned inverted staggered TFT matrix is performed as follows.

Referring to FIG. 3A, first, a cleaning process using a POS solution for removing contaminants and flaws attached to the surface of the barium borosilicate glass substrate 1 is performed, for example, at a liquid temperature of 100 ° C. for 5 minutes. . Thus, a low-density surface layer 2 is formed on the surface of the substrate 1 with a depth (t ') of about 20 nm.

Referring to FIG. 3B, dry etching means using a fluorine-based gas such as SF ₆ capable of etching silicic acid (silica)
Alternatively, the entire surface of the substrate is etched by 10 to 15 nm by wet etching using a mixed solution of hydrofluoric acid (HF) such as HF and ammonium fluoride (NH ₄ F) so that the surface low-density layer 2 has a depth of at least 10 nm. Reduce to the following depth (t):

Referring to FIG. 3C, in the barium borosilicate glass substrate 1 in which the depth of the surface low-density layer 2 is controlled to 10 nm or less by this method, for example, a Ti film is formed on the substrate by sputtering in the same manner as in the above embodiment. Then, when the gate electrode wiring 3G made of the Ti film is formed by patterning by dry etching, the high-resistance layer 12 containing the Ti particles 3P does not remain in the surface low-density layer 2 on the exposed surface of the substrate 1. .

The subsequent steps for manufacturing the inverted staggered TFT matrix are the same as those in the above embodiment. As shown in the above embodiment, according to the method of the present invention, the removal of contaminants and flaws attached to the surface of the barium borosilicate substrate forming the TFT matrix is performed by using an acid-based chemical to remove the substrate surface. Even when a low-density layer is formed on the substrate surface by purifying the substrate, in the subsequent electrode wiring formation process on the substrate,
The formation of the high-resistance layer on the exposed surface of the substrate is prevented. Therefore, high insulation properties of the substrate surface are secured, and current leakage between the electrodes is prevented.

[0030]

As described above, according to the present invention, TF
Since current leakage on the surface of the barium borosilicate glass substrate on which the T matrix is formed is prevented, for example, in an LCD using an inverted staggered TFT, there is no drop in the pixel voltage accumulated in the transparent pixel electrode, causing display unevenness. And the production yield is improved.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view of one embodiment of the present invention (part 1).

FIG. 2 is a process sectional view of an embodiment of the present invention (part 2).

FIG. 3 is a process sectional view of another embodiment of the present invention.

FIG. 4 is a process sectional view showing a problem of the conventional method.

FIG. 5 is an equivalent circuit diagram showing a cause of uneven display of the LCD.

FIG. 6 is a diagram showing the relationship between the surface resistance of a glass substrate and the pixel voltage drop.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Barium borosilicate glass substrate 2 Surface low-density layer 3 Ti film 3G Gate electrode wiring 3P Ti particles 4, 14 Resist pattern 5 Gate insulating film 6 a-Si working layer 7 Channel protective film 7 P channel protective film pattern 8D n ⁺ type a -Si drain contact layer 8S n ⁺ type a-Si source contact layer 9D Drain electrode wiring 9S Source electrode 10 Transparent pixel electrode 11 Cover insulating film 12 High resistance layer 13 Gate bus line 15 Window

──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Tetsuya Fujikawa 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-61-150278 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G02F 1/1368 G02F 1/1333 500 G02F 1/13 101

Claims (2)

(57) [Claims] 1. A method for manufacturing a TFT matrix, comprising the step of forming a metal electrode directly on a glass substrate, wherein the surface of the glass substrate is cleaned as the glass substrate.
By controlling the amount of acid treatment in the acid treatment process for
Using a barium borosilicate glass substrate in which a surface low density layer which is more porous than the inside is formed at a depth of 10 nm or less. 2. A metal electrode is formed directly on a glass substrate.
In the method for manufacturing a TFT matrix having a step, the surface of the glass substrate is cleaned as the glass substrate.
The surface of the substrate with a hydrofluoric acid-based liquid
By wet etching means or fluorine-based gas
Etching the entire surface by dry etching means
Surface low-density layer that is more porous than the inside
Using a barium borosilicate glass substrate formed at the depth below
A method for manufacturing a TFT matrix.