JP3225289B2 - Method for forming metal wiring of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a metal wiring of a semiconductor device, and more particularly, to a method of forming a metal wiring of a semiconductor device capable of reducing a distance between adjacent metal wirings.

[0002]

2. Description of the Related Art FIG. 1 is a plan view showing a metal wiring of a semiconductor device formed by a conventional technique. As shown in FIG. 1, first and second metal wirings 5, 6 are formed on a semiconductor substrate, and the first and second metal wirings 5, 6 are respectively formed in first and second contact holes 3, 4. Through a predetermined portion of the semiconductor substrate. Part of each metal wiring formed in the contact portion is formed wider than a portion away from the contact portion in order to secure an overlap margin with the contact holes 3 and 4, and the first and second metal wirings 5 and 6 are formed. As shown in FIG. 1, they are formed at intervals of A.

FIG. 2 is a sectional view taken along the line II-II ′ of FIG. Hereinafter, a conventional method for forming a metal wiring of a semiconductor device will be described with reference to FIG. As shown in FIG. 2, an insulating film 2 is formed on a semiconductor substrate 1, and a photoresist pattern (not shown) is formed on the insulating film 2 by a normal photolithography process to expose a predetermined portion thereof. . Next, first and second contact holes (not shown) for exposing predetermined portions of the semiconductor substrate 1 by an etching process using the photosensitive film pattern as an etching mask.
Is formed, and the photosensitive film pattern is removed.

Thereafter, a metal film for filling a contact hole is deposited on the entire surface of the substrate 1 and is patterned to form first and second metal wirings on the first and second contact holes and the insulating film 2 adjacent thereto. 5, 6 are formed simultaneously. However, in the conventional method, when forming the metal wiring,
In order to secure an overlap margin between the metal wiring and the contact hole, each metal wiring part formed in the contact part should be formed to have a wider width than other parts. As a result, a larger area is required to maintain the interval between the metal wirings for the purpose of electrical insulation between the metal wirings, so that it is difficult to achieve high integration of the semiconductor element.

[0005]

SUMMARY OF THE INVENTION It is an object of the present invention to minimize the distance between adjacent metal wirings.
It is an object of the present invention to provide a method for forming a metal wiring of a semiconductor device capable of manufacturing a highly integrated semiconductor device.

[0006]

In order to achieve the above object, a method for forming a metal wiring of a semiconductor device according to the present invention comprises the steps of providing a semiconductor substrate having first and second insulating films stacked thereon, (2) forming a photosensitive film pattern exposing a predetermined portion on the insulating film; and performing an etching process using the photosensitive film pattern as an etching mask.
Etching the second insulating layer so that the insulating layer is exposed; wet-etching the exposed first insulating layer surface to a predetermined depth; and forming the first insulating layer having the upper surface wet-etched. Forming first and second contact holes exposing the semiconductor substrate by etching a film, removing the photoresist pattern, and forming the second contact hole so as to fill the first and second contact holes. Forming a first metal film on the insulating film, forming the first metal film on the first contact hole and a portion of the second insulating film adjacent to the first contact hole by patterning the first metal film; Forming a contact plug in the second contact hole; and forming a third insulating film on the second insulating film including the first metal wiring. Forming a third contact hole exposing the contact plug by etching a predetermined portion of the third insulating film; and forming a second metal film on the third insulating film so as to fill the third contact hole. Forming the third contact hole and the third contact hole adjacent to the third contact hole by patterning the second metal film.
Forming a second metal wiring on a portion of the insulating film.

Further, in the present invention, the second insulating film may be formed in the first insulating film.
It is characterized in that it is thinner than the thickness of the insulating film.

Further, in the present invention, the first insulating film is formed of BPSG.
It is a film.

In the present invention, the second insulating film is preferably made of TEOS.
And a film selected from the group consisting of a film and a PSG film.

In the present invention, the first insulating film is preferably made of TEOS.
It is a film.

Further, the present invention is characterized in that the second insulating film is a silicon nitride film.

Further, the present invention is characterized in that each of the metal films is selected from the group consisting of a tungsten film and an aluminum film.

Further, the present invention is characterized in that each of the metal films is a laminated film of a barrier metal film and a tungsten film.

Further, in the present invention, the third contact hole is narrower than an upper width of the contact plug.

[0015]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIGS. 3A to 3E are process cross-sectional views illustrating a method for forming a metal wiring of a semiconductor device according to the first embodiment of the present invention. First, as shown in FIG. 3A, a first insulating film 12 is formed on a semiconductor substrate 11, and the first insulating film 1 is formed by a normal process.
First and second contact holes 13 and 14 for exposing predetermined portions of the substrate 11 are formed in the substrate 2. Next, FIG.
As shown in FIG. 1B, a metal film 15 made of a tungsten film or an aluminum film is formed on the first insulating film 12, and the first and second contact holes 13 and 14 are filled with the metal film 15. Next, as shown in FIG. 3C, the metal film 15 formed on the first insulating film 12 is patterned by a known method, thereby forming the first contact hole 13 and the first insulating film 12 adjacent thereto.
The first metal wiring 16 is formed on a portion of the first metal wiring. The first metal wiring 16 is formed such that the contact portion has a wider width than other portions in order to secure an overlap margin between the contact hole and the metal wiring. Also, the first
During the etching process for forming the metal wiring 16, the second
A contact plug 17 is formed in the contact hole 14, and an upper surface thereof is partially removed.

Next, as shown in FIG. 3D, a second insulating film 18 is formed on the entire surface of the structure shown in FIG. Here, the exposed portion of the second insulating film 18 is referred to as a third contact hole 19 as shown in FIG. The width of the third contact hole 19 is wider than the width of the second contact hole 14. Finally, as shown in FIG. 3E, a metal film made of tungsten or aluminum for filling the third contact hole 19 is deposited on the surface of the structure of FIG. A second metal wiring 20 is formed on the contact hole 19 and the second insulating film 18 adjacent thereto. Here, the third contact hole 19
And the second contact hole 14 are connected to each other, and the contact plug 1 formed in the second contact hole 14 is formed.
7 and the metal film embedded in the third contact hole 19 are electrically connected.

FIG. 4 is a plan view showing a metal wiring formed according to the present invention. As shown in FIG. 4, each metal wiring is formed so that a contact portion has a wider width than other portions in order to secure an overlap margin between the contact hole and the metal wiring. The distance B between the first and second metal wirings 16 and 20 is smaller than the distance A between the metal wirings according to the conventional method shown in FIG. Therefore,
Since the distance between metal wirings can be further reduced as compared with the conventional method, high integration of a semiconductor element can be achieved.

FIGS. 5A to 5F are sectional views showing the steps of a method for forming a metal wiring of a semiconductor device according to a second embodiment of the present invention. First, as shown in FIG. 5A, first and second insulating films 22 and 23 are sequentially formed on a semiconductor substrate 21, and a photosensitive film pattern 24 for forming a contact hole is formed on the second insulating film 23. Formed. First insulating film 2
2 is BPSG (Boron Phosphorus S
The second insulating film 23 is made of TEOS (Tetra Et).
hyl OrthoSilicate: “TEO”
S ") or PSG (Phosphorus S
ilicateGlass: Hereinafter, "PSG")
Or the first insulating film 22 is TEOS,
The second insulating film 23 is formed of a silicon nitride film.

Next, as shown in FIG. 5B, the exposed second insulating film 23 is etched by an etching process using the photoresist pattern 24 as an etching mask, and is exposed by removing the second insulating film 23. First insulating film 2
The upper surface of 2 is isotropically etched. Next, FIG.
As shown in (C), the portion of the first insulating film 22 whose upper surface has been isotropically etched is etched by an anisotropic etching process so that the semiconductor substrate is exposed, whereby the first and second portions are etched. Contact holes 25 and 26 are formed. Here, as illustrated, the upper width of the first and second contact holes 25 and 26 is wider than the lower width. Next, as shown in FIG. 5D, the second insulating film 23 is formed so that the first and second contact holes 25 and 26 are buried.
A metal film made of a tungsten film or an aluminum film is formed thereon by a known process, and a first metal wiring 27 is formed on the first contact hole 25 and the adjacent second insulating film 23 by a known process. At this time, if a tungsten film is used as the metal film, a barrier metal film is deposited before the tungsten film is deposited. Also, as in the first embodiment of the present invention, a contact plug 28 is formed in the second contact hole 26 at the same time as the etching process of the metal film for forming the first metal wiring 27.

Next, as shown in FIG. 5E, a third insulating film 29 is formed on the second insulating film 23 including the first metal wiring 27, and the second contact hole 2 is formed by a known method.
A third contact hole 30 exposing the contact plug 28 buried in 6 is formed. Finally, FIG.
As shown in (F), a metal film is formed on the third insulating film 29 so that the third contact hole 30 is buried,
The metal layer is patterned to form a second metal line 31 on the third contact hole 30 and the third insulating layer 29 adjacent thereto. Here, the second metal wiring 31 is connected to a contact plug 28 formed in the second contact hole 26 and is electrically connected to a predetermined portion of the semiconductor substrate 21.

According to the second embodiment of the present invention, the distance between metal wirings can be reduced, so that the present invention can be applied to be suitable for high integration of semiconductor elements. Also,
In the second embodiment of the present invention, the second contact hole 2
The upper width of the plug buried in 6 is formed wider than the width of the third contact hole 30. When forming the third contact hole 30 for forming the second metal wiring, the third contact hole 30 is formed.
Although the contact hole 30 may not be accurately formed on the upper surface of the plug, the electrical characteristics may be deteriorated.
As shown in FIG. 7E, since the upper width of the plug is large at the time of forming the third contact hole 30 for forming the second metal wiring 31, the alignment margin of the third contact hole 30 is increased, thereby increasing the semiconductor. It is possible to prevent a decrease in the electrical characteristics of the element.

FIGS. 6A to 6D are process sectional views showing a method for forming a metal wiring of a semiconductor device according to a third embodiment of the present invention. First, as shown in FIG. 6A, first, second and third insulating films 42, 43, 4 are formed on a semiconductor substrate 41.
4 are sequentially formed, and a photosensitive film pattern 45 is formed on the third insulating film 44. The second insulating film 43 is formed of an insulating film having a higher wet etching ratio than the first and third insulating films 42 and 44, and is more easily etched during the wet etching than the first and third insulating films 42 and 44. Is used. Preferably, the first and third insulating films 42 and 44 are made of a BPSG film, and the second insulating film 43 is made of a TEOS film or a PSG film.

Next, as shown in FIG. 6B, the third, second, and first insulating films 44, 43, and 42 are sequentially etched by an etching process using the photosensitive film pattern as an etching mask. First and second contact holes 46 and 47 exposing the substrate 41 are formed. Thereafter, the photosensitive film pattern 45 used as the etching mask is removed, and a cleaning process is performed. During the cleaning process, a part of the side surface of the second insulating film 43 exposed by the contact holes 46 and 47 is etched. Next, as shown in FIG. 6C, a first insulating film 44 is formed on the third insulating film 44.
And a metal film filling the second contact holes 46 and 47 is formed, and the metal film is patterned by a normal process. As a result, the first metal wiring 48 is formed on the first contact hole 46 and the third insulating film 44 adjacent thereto. Here, as in the above-described embodiment, a tungsten film or an aluminum film is used as the metal film, and when a tungsten film is used as the metal film, the metal film is formed after the barrier metal film is deposited before the metal film is formed. You can also. A contact plug 49 is formed in the second contact hole 47 simultaneously with the formation of the first metal wiring 48.

Finally, as shown in FIG. 6D, a fourth insulating film 50 is formed on the entire surface of the third insulating film 44 including the first metal wiring 48. Plug 49
The fourth insulating film 50 is etched so that the third contact hole is formed, thereby forming a third contact hole. Next, a metal film for forming a second metal wiring is formed on the entire surface, and a second metal wiring 51 is formed on the third contact hole and the fourth insulating film 50 adjacent thereto by a patterning process. . As illustrated, a portion of a side surface of the third insulating layer 44 may be removed during an etching process for forming a third contact hole. However, the second insulating film 43
Since the width of the metal film embedded therein is wider than the width of the third contact hole, an alignment margin between the third contact hole and the second contact hole 47 can be secured,
As in the second embodiment of the present invention, it is possible to prevent a decrease in the electrical characteristics of the semiconductor device.

[0025]

As described above, the distance between the metal wirings formed by the present invention can be reduced to the minimum, so that the metal wirings can be easily applied to the manufacture of highly integrated semiconductor devices. Further, since the alignment margin is ensured, the reliability of the device can be improved.

[0026] The present invention is not limited to these embodiments. For example, in the above embodiment, the case where the contact hole is formed on the substrate has been described, but the present invention can be applied to the case where the contact hole is formed on the word line or the bit line. Further, in the above embodiment, the metal film is used as the material for filling the contact hole, but a conductive material different from polysilicon may be used. Therefore, the present invention can be variously modified and implemented without departing from the gist thereof.

[Brief description of the drawings]

FIG. 1 is a plan view showing a metal wiring formed by a conventional technique.

FIG. 2 is a cross-sectional view taken along the line II-II ′ of FIG. 1 for explaining a conventional method of forming a metal wiring of a semiconductor device.

FIGS. 3A to 3E are cross-sectional views showing a series of steps showing a method for forming a metal wiring of a semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a plan view showing a metal wiring formed according to the present invention.

FIGS. 5A to 5F are a series of cross-sectional views showing a method for forming a metal wiring of a semiconductor device according to a second embodiment of the present invention.

FIGS. 6A to 6D are cross-sectional views showing a series of steps showing a method for forming a metal wiring of a semiconductor device according to a third embodiment of the present invention.

[Explanation of symbols]

 11, 21, 41 Semiconductor substrate 12, 22, 42 First insulating film 13, 25, 46 First contact hole 14, 26, 47 Second contact hole 15 Metal film 16, 27, 48 First metal wiring 17, 28, 49 contact plug 18, 23, 43 second insulating film 20, 31, 51 second metal wiring 24, 45 photosensitive film pattern 29, 44 third insulating film 30 third contact hole 50 fourth insulating film

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-7-99194 (JP, A) JP-A-8-306781 (JP, A) JP-A-8-97279 (JP, A) JP-A-2- 26020 (JP, A) JP-A-5-308056 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/768 H01L 21/28 301

Claims (9)

(57) [Claims] Providing a semiconductor substrate on which first and second insulating layers are stacked; forming a photosensitive layer pattern exposing a predetermined portion on the second insulating layer; and forming the photosensitive layer pattern on the second insulating layer. Is subjected to an etching step using the first insulating film as an etching mask so that the second insulating film is exposed.
Etching the insulating layer, wet-etching the exposed first insulating layer surface to a predetermined depth, and exposing the semiconductor substrate by etching the first insulating layer having the upper surface wet-etched. Forming first and second contact holes, removing the photoresist pattern, and forming first and second contact holes on the second insulating film so as to fill the first and second contact holes.
Forming a metal film; patterning the first metal film to form a first metal wiring on the first contact hole and a portion of the second insulating film adjacent thereto; Forming a contact plug therein; and forming a second contact plug including the first metal interconnect in the second contact plug.
Forming a third insulating film on the insulating film, etching a predetermined portion of the third insulating film to form a third contact hole exposing the contact plug, and filling the third contact hole. So the third
Forming a second metal layer on the insulating layer; and patterning the second metal layer to form a second metal line on the third contact hole and a portion of the third insulating layer adjacent thereto. A method for forming a metal wiring of a semiconductor device, comprising: Wherein said second insulating film metal wiring formation method of a semiconductor device according to claim 1, wherein a thinner than a thickness of the first insulating film. Wherein said first insulating film is a metal wiring formation method of a semiconductor device according to claim 1, characterized in that it is a BPSG film. Wherein said second insulating film metal wiring formation method of a semiconductor device according to claim 3, wherein a is selected from the group consisting of TEOS film and PSG film. Wherein said first insulating film is a metal wiring formation method of a semiconductor device according to claim 1, characterized in that it is a TEOS film. 6. The method according to claim 5, wherein the second insulating film is a silicon nitride film. 7. A method of forming a metal line in a semiconductor device according to claim 1, wherein the each of the metal films et are those selected from the group consisting of a tungsten film and the aluminum film. 8. A method of forming a metal line in a semiconductor device according to claim 1, wherein the each of the metal films et a laminated film of a barrier metal film and a tungsten film. 9. The method of claim wherein the third contact hole is characterized in that narrower than the top width of the contact plug 1
A method for forming a metal wiring of a semiconductor device according to the above.