JP3224932B2 - High frequency circuit - Google Patents
High frequency circuitInfo
- Publication number
- JP3224932B2 JP3224932B2 JP03138094A JP3138094A JP3224932B2 JP 3224932 B2 JP3224932 B2 JP 3224932B2 JP 03138094 A JP03138094 A JP 03138094A JP 3138094 A JP3138094 A JP 3138094A JP 3224932 B2 JP3224932 B2 JP 3224932B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- matching
- matching circuit
- frequency
- spiral
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【０００１】[0001]
【産業上の利用分野】本発明は、例えば１ＧHz以上の周
波数の信号を扱う高周波回路に関する。なお、本発明の
高周波回路は、通信用ＭＭＩＣやＨＩＣその他の半導体
集積回路として利用される。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency circuit for handling signals having a frequency of, for example, 1 GHz or more. The high-frequency circuit of the present invention is used as a communication MMIC, HIC, or other semiconductor integrated circuit.
【０００２】[0002]
【従来の技術】一般に、増幅器，ミキサ，発振器その他
の高周波回路において、その入出力端子に接続される外
部回路と入出力インピーダンスが等しくない場合には、
接続部で信号の反射が生じて良好な信号伝達ができな
い。そのために、通常の高周波回路では入出力部に整合
回路を設け、インピーダンス整合を行う構成になってい
る。2. Description of the Related Art Generally, in an amplifier, a mixer, an oscillator and other high-frequency circuits, when an input / output impedance is not equal to that of an external circuit connected to the input / output terminals thereof,
Signal reflection occurs at the connection portion, and good signal transmission cannot be performed. For this purpose, a normal high-frequency circuit has a configuration in which a matching circuit is provided in the input / output unit to perform impedance matching.
【０００３】図６は、整合回路を有する従来の高周波回
路の構成および等価回路を示す。図において、半導体基
板１１の下面に接地導体４１が形成され、半導体基板１
１の上面に電子回路１と、電子回路１と入力端子４との
間にマイクロストリップ線路による入力整合回路２と、
電子回路１と出力端子５との間にマイクロストリップ線
路による出力整合回路３が形成される。なお、図６(2)
に示す等価回路は、電子回路１をソース接地の電界効果
トランジスタとした場合のものである。FIG. 6 shows a configuration and an equivalent circuit of a conventional high-frequency circuit having a matching circuit. In the figure, a ground conductor 41 is formed on the lower surface of a semiconductor substrate 11 and the semiconductor substrate 1
1, an electronic circuit 1 on the upper surface, an input matching circuit 2 using a microstrip line between the electronic circuit 1 and the input terminal 4,
An output matching circuit 3 using a microstrip line is formed between the electronic circuit 1 and the output terminal 5. FIG. 6 (2)
The equivalent circuit shown in FIG. 1 is a case where the electronic circuit 1 is a field-effect transistor with a common source.
【０００４】[0004]
【発明が解決しようとする課題】従来の高周波回路にお
いて、整合回路となるマイクロストリップ線路は、その
ストリップ導体の幅が数百μｍから数ｍｍに及ぶ。ま
た、マイクロストリップ線路の基板の厚さも百μｍ程度
から１ｍｍ程度であるので、線路を並行に配置する際に
は線路間隔を広くしなければならない。したがって、従
来の高周波回路では、整合回路の占める面積が非常に大
きくなり、小型で高密度な集積回路を構成することが困
難であった。In a conventional high-frequency circuit, a microstrip line serving as a matching circuit has a width of a strip conductor ranging from several hundred μm to several mm. Further, since the thickness of the substrate of the microstrip line is also about 100 μm to about 1 mm, when the lines are arranged in parallel, the line interval must be widened. Therefore, in the conventional high-frequency circuit, the area occupied by the matching circuit becomes very large, and it has been difficult to configure a small and high-density integrated circuit.
【０００５】なお、マイクロストリップ線路の特性イン
ピーダンスＺ0 は、接地導体４１と線路の距離をｈ、線
路幅をｗとすると、 Ｚ0 ∝ｗ／ｈ の関係がある。したがって、半導体基板１１として薄い
ものを用いることにより、入出力整合回路２，３となる
マイクロストリップ線路の線路幅および線路間隔を小さ
くでき、回路の小型化および高密度化を図ることが可能
である。しかし、半導体基板１１の厚さにも制限がある
ために、回路の小型化および高密度化にも限界があっ
た。The characteristic impedance Z 0 of the microstrip line has a relationship of Z 0 ∝w / h, where h is the distance between the ground conductor 41 and the line, and w is the line width. Therefore, by using a thin semiconductor substrate 11, the line width and line interval of the microstrip lines serving as the input / output matching circuits 2 and 3 can be reduced, and the circuit can be reduced in size and density. . However, since the thickness of the semiconductor substrate 11 is also limited, there is a limit in miniaturization and high density of the circuit.
【０００６】本発明は、整合回路を有する構成におい
て、高集積化に適する高周波回路を提供することを目的
とする。An object of the present invention is to provide a high-frequency circuit suitable for high integration in a configuration having a matching circuit.
【０００７】[0007]
【課題を解決するための手段】本発明の高周波回路は、
整合回路をスパイラル形状の伝送線路で形成する。ただ
し、この伝送線路は、線路間の結合による影響が無視で
きる線路間隔に設定する。さらに、スパイラル形状の伝
送線路で形成された複数の整合回路を同一基板上に形成
する。The high frequency circuit according to the present invention comprises:
The matching circuit is formed by a spiral transmission line. However, the transmission lines are set at line intervals where the influence of the coupling between the lines can be ignored. Further , a plurality of matching circuits formed by spiral transmission lines are formed on the same substrate.
【０００８】そして、スパイラル形状の伝送線路で形成
された複数の整合回路を、電子回路に接続される入力整
合回路と出力整合回路とから構成し、かつ各整合回路が
成す面に対し垂直方向から見たときに電子回路の周囲を
取り囲むスパイラル形状となるようにする。[0008] Then, a plurality of matching circuits formed by transmission line spiral, input integer which is connected to the electronic circuit
And a matching circuit and an output matching circuit.
When viewed from the direction perpendicular to the surface
The shape should be a spiral shape surrounding it.
【０００９】また、スパイラル形状の伝送線路で形成さ
れた複数の整合回路を接地導体を挟んだ異なる層にそれ
ぞれ形成し、各整合回路が形成された層と異なる層にス
ルーホールを介して各整合回路に接続される電子回路を
形成する。さらに、複数の整合回路を、電子回路に接続
される入力整合回路と出力整合回路とから構成し、かつ
各整合回路が成す面に対し垂直方向から見たときに電子
回路の周囲を取り囲むスパイラル形状となるようにす
る。 A plurality of matching circuits formed by spiral transmission lines are formed on different layers sandwiching the ground conductor, and each matching circuit is formed on a different layer from the layer on which each matching circuit is formed via a through hole. Form an electronic circuit that is connected to the circuit. In addition, multiple matching circuits can be connected to electronic circuits
Input matching circuit and output matching circuit, and
When viewed from the direction perpendicular to the plane formed by each matching circuit,
The spiral shape should surround the circuit.
You.
【００１０】[0010]
【作用】整合回路をスパイラル形状の伝送線路で形成す
ることにより、従来形状（メアンダ形状）に比べて回路
面積を小さくすることができる。したがって、高周波回
路全体の小型化および高密度化が可能となり、集積度を
高めることができる。When the matching circuit is formed of a spiral transmission line, the circuit area can be reduced as compared with the conventional shape (meander shape). Therefore, the entire high-frequency circuit can be reduced in size and density, and the degree of integration can be increased.
【００１１】[0011]
【実施例】図１は、本発明の高周波回路の第１実施例の
構成を示す。図において、(1) は上面図であり、(2) は
(1)のＡ−Ａ′断面図である。半導体基板１１の下面に
接地導体４１が形成され、半導体基板１１の上面に電子
回路１と、電子回路１と入力端子４との間にマイクロス
トリップ線路による入力整合回路２と、電子回路１と出
力端子５との間にマイクロストリップ線路による出力整
合回路３が形成される。ただし、入力整合回路２と出力
整合回路３がスパイラル形状に形成されているところが
特徴となっている。なお、電子回路１は、トランジスタ
等の能動素子やフィルタ等の受動素子のいずれでもよ
い。FIG. 1 shows the configuration of a high-frequency circuit according to a first embodiment of the present invention. In the figure, (1) is a top view and (2) is
It is AA 'sectional drawing of (1). A ground conductor 41 is formed on the lower surface of the semiconductor substrate 11, the electronic circuit 1 is provided on the upper surface of the semiconductor substrate 11, the input matching circuit 2 is a microstrip line between the electronic circuit 1 and the input terminal 4, An output matching circuit 3 using a microstrip line is formed between the output matching circuit 3 and the terminal 5. However, the feature is that the input matching circuit 2 and the output matching circuit 3 are formed in a spiral shape. The electronic circuit 1 may be either an active element such as a transistor or a passive element such as a filter.
【００１２】スパイラル形状のマイクロストリップ線路
の線路間隔は、線路間の結合による影響が無視でき、か
つインダクタとして機能しない程度に設定する。これに
より、スパイラル形状のマイクロストリップ線路を整合
回路として機能させることができる。The spacing between the spiral microstrip lines is set to such an extent that the influence of the coupling between the lines can be neglected and does not function as an inductor. Thus, the spiral microstrip line can function as a matching circuit.
【００１３】ここで、線路長に対する回路面積と線路の
折れ曲がり数について、従来形状（メアンダ形状）と本
発明のスパイラル形状の比較例を示す。図２(1) は従来
の高周波回路の計算モデルであり、図２(2) は本発明の
高周波回路の計算モデルである。図２(3) は計算結果で
あり、太線および△印は本発明の高周波回路における回
路面積および線路の折れ曲がり数であり、細線および○
印は従来の高周波回路における回路面積および線路の折
れ曲がり数である。計算条件は、 高周波回路は１つの電子回路と１本の伝送線路と
し、 電子回路の面積を 200μｍ× 200μｍとし、 伝送線路の線路幅を10μｍ、線路間隔を20μｍと
し、 回路面積は高周波回路の最外周を囲む長方形の面積
とし、 従来の高周波回路の一辺の長さを最大１ｍｍとし
た。Here, a comparative example of the conventional shape (meander shape) and the spiral shape of the present invention will be shown with respect to the circuit area and the number of bends of the line with respect to the line length. FIG. 2A is a calculation model of a conventional high-frequency circuit, and FIG. 2B is a calculation model of a high-frequency circuit of the present invention. FIG. 2 (3) shows the calculation results. The bold lines and the triangles indicate the circuit area and the number of bends of the line in the high-frequency circuit of the present invention.
The marks indicate the circuit area and the number of bends in the line in the conventional high-frequency circuit. The calculation conditions are as follows: the high-frequency circuit is one electronic circuit and one transmission line, the area of the electronic circuit is 200 μm × 200 μm, the line width of the transmission line is 10 μm, the line interval is 20 μm, and the circuit area is the maximum of the high-frequency circuit. The area of the rectangle surrounding the outer circumference was set, and the length of one side of the conventional high-frequency circuit was set to 1 mm at the maximum.
【００１４】本発明のスパイラル形状では、図２(3) に
示すように、従来形状に比べて回路面積を小さくするこ
とができる。特に、各線路長に対して無駄の少ない回路
面積となっていることがわかる。また、線路の折れ曲が
り数が少なくなるので、伝送線路の不連続部分を少なく
することができる。したがって、従来回路において大き
な面積を占めていた整合回路をスパイラル形状にするこ
とにより、高周波回路全体の小型化および高密度化を図
ることができる。In the spiral shape of the present invention, as shown in FIG. 2 (3), the circuit area can be reduced as compared with the conventional shape. In particular, it can be seen that the circuit area is small with respect to each line length. In addition, since the number of bent lines is reduced, discontinuous portions of the transmission line can be reduced. Therefore, by making the matching circuit, which occupies a large area in the conventional circuit, a spiral shape, it is possible to reduce the size and density of the entire high-frequency circuit.
【００１５】図３は、本発明の高周波回路の第２実施例
の構成を示す。図において、(1) は図１(2) に対応する
断面図である。本実施例の高周波回路は、半導体基板１
１，電子回路１，入力整合回路２および出力整合回路３
上に、誘電体膜２１を介して接地導体４１を形成したも
のである。半導体基板１１上に形成される入力整合回路
２および出力整合回路３は、図３(2) に示すようにスパ
イラル形状である。本実施例の構成では、誘電体膜２１
の厚さが通常２μｍ程度と薄いので、入出力整合回路と
なるマイクロストリップ線路の線路幅および線路間隔を
小さくすることができる。したがって、第１実施例の構
成に比べて、さらに小型化および高密度化を図ることが
できる。FIG. 3 shows the configuration of a second embodiment of the high-frequency circuit according to the present invention. In the figure, (1) is a sectional view corresponding to FIG. 1 (2). The high-frequency circuit according to the present embodiment includes a semiconductor substrate 1
1, electronic circuit 1, input matching circuit 2, and output matching circuit 3
A ground conductor 41 is formed thereon with a dielectric film 21 interposed therebetween. The input matching circuit 2 and the output matching circuit 3 formed on the semiconductor substrate 11 have a spiral shape as shown in FIG. In the configuration of the present embodiment, the dielectric film 21
Is usually as thin as about 2 μm, the line width and line interval of the microstrip line serving as the input / output matching circuit can be reduced. Therefore, the size and the density can be further reduced as compared with the configuration of the first embodiment.
【００１６】図４は、本発明の高周波回路の第３実施例
の構成を示す。図において、(1) は図１(2) に対応する
断面図である。本実施例の高周波回路は、半導体基板１
１上に電子回路１と入力整合回路２を形成し、その上に
ポリイミド等の薄い誘電体膜２１を形成し、その上に接
地導体４１を形成する。さらに、接地導体４１上に誘電
体膜２２を形成し、誘電体膜２２上に出力整合回路３を
形成した構成である。なお、電子回路１と出力整合回路
３は、スルーホール５１を介して接続される。また、入
出力整合回路内に、例えば集中定数インダクタを挿入接
続してもよい。FIG. 4 shows the configuration of a third embodiment of the high-frequency circuit according to the present invention. In the figure, (1) is a sectional view corresponding to FIG. 1 (2). The high-frequency circuit according to the present embodiment includes a semiconductor substrate 1
1, an electronic circuit 1 and an input matching circuit 2 are formed, a thin dielectric film 21 such as polyimide is formed thereon, and a ground conductor 41 is formed thereon. Further, the dielectric film 22 is formed on the ground conductor 41, and the output matching circuit 3 is formed on the dielectric film 22. Note that the electronic circuit 1 and the output matching circuit 3 are connected via a through hole 51. A lumped constant inductor may be inserted and connected in the input / output matching circuit.
【００１７】誘電体膜２２上に形成される出力整合回路
３および半導体基板１１上に形成される入力整合回路２
は、それぞれ図４(2),(3) に示すようにスパイラル形状
である。本実施例の構成では、スパイラル形状の入出力
整合回路がそれぞれ個別に配置されるので、第１実施例
のような二重スパイラル構造に比べて大幅に小型化する
ことができる。また、第２実施例と同様に、誘電体膜２
１，２２の厚さに応じた線路幅および線路間隔をとるこ
とができるので、小型化および高密度化も容易である。
さらに、本実施例の構成では、入力整合回路２と出力整
合回路３のスパイラル方向を反対にすることも可能であ
り、回路構成の自由度を高めることができる。Output matching circuit 3 formed on dielectric film 22 and input matching circuit 2 formed on semiconductor substrate 11
Have a spiral shape as shown in FIGS. 4 (2) and 4 (3), respectively. In the configuration of the present embodiment, since the spiral shaped input / output matching circuits are individually arranged, the size can be significantly reduced as compared with the double spiral structure as in the first embodiment. Also, as in the second embodiment, the dielectric film 2
Since the line width and the line interval can be set according to the thicknesses of the first and second layers, miniaturization and high density can be easily achieved.
Further, in the configuration of the present embodiment, the spiral directions of the input matching circuit 2 and the output matching circuit 3 can be reversed, and the degree of freedom of the circuit configuration can be increased.
【００１８】図５は、本発明の高周波回路の第４実施例
の構成を示す。図において、(1) は図１(2) に対応する
断面図である。本実施例の高周波回路は、誘電体多層基
板において電子回路１を最上層に実装した構成に対応さ
せたものである。誘電体基板３１の下面に接地導体４１
を形成し、誘電体基板３１上に入力整合回路２を形成す
る。その上に、誘電体基板３２，接地導体４２，誘電体
基板３３の順に積層し、誘電体基板３３上に出力整合回
路３を形成する。さらに、その上に誘電体基板３４を形
成し、誘電体基板３４上に電子回路１を形成した構成で
ある。なお、電子回路１と入力整合回路２および出力整
合回路３は、スルーホール５１，５２を介して接続され
る。FIG. 5 shows the configuration of a fourth embodiment of the high-frequency circuit according to the present invention. In the figure, (1) is a sectional view corresponding to FIG. 1 (2). The high-frequency circuit according to the present embodiment corresponds to a configuration in which the electronic circuit 1 is mounted on the uppermost layer in a dielectric multilayer substrate. A ground conductor 41 is provided on the lower surface of the dielectric substrate 31.
Is formed, and the input matching circuit 2 is formed on the dielectric substrate 31. A dielectric substrate 32, a ground conductor 42, and a dielectric substrate 33 are laminated in that order, and the output matching circuit 3 is formed on the dielectric substrate 33. Further, a dielectric substrate 34 is formed thereon, and the electronic circuit 1 is formed on the dielectric substrate 34. The electronic circuit 1, the input matching circuit 2 and the output matching circuit 3 are connected via through holes 51 and 52.
【００１９】誘電体基板３３上に形成される出力整合回
路３および誘電体基板３１上に形成される入力整合回路
２、それぞれ図５(2),(3) に示すようにスパイラル形状
である。本実施例の構成では、スパイラル形状の入出力
整合回路がそれぞれ単独の配置となるので、第１実施例
のような二重スパイラル構造に比べて、さらに第３実施
例のように電子回路と整合回路を同一面に形成した場合
に比べて小型化および高密度化を図ることができる。ま
た、第２実施例と同様に、誘電体基板３１〜３３の厚さ
に応じた線路幅および線路間隔をとることができるの
で、小型化および高密度化も容易である。さらに、本実
施例の構成では、入力整合回路２と出力整合回路３のス
パイラル方向を反対にすることも可能であり、回路構成
の自由度を高めることができる。The output matching circuit 3 formed on the dielectric substrate 33 and the input matching circuit 2 formed on the dielectric substrate 31 have a spiral shape as shown in FIGS. 5 (2) and 5 (3), respectively. In the configuration of the present embodiment, the input / output matching circuits in the spiral shape are arranged independently of each other. Therefore, as compared with the double spiral structure as in the first embodiment, the matching with the electronic circuit as in the third embodiment is further achieved. The size and the density can be reduced as compared with the case where the circuit is formed on the same surface. Further, similarly to the second embodiment, the line width and the line interval can be set according to the thickness of the dielectric substrates 31 to 33, so that miniaturization and high density can be easily achieved. Further, in the configuration of the present embodiment, the spiral directions of the input matching circuit 2 and the output matching circuit 3 can be reversed, and the degree of freedom of the circuit configuration can be increased.
【００２０】なお、第３実施例および第４実施例の積層
構造において、３段以上の多段構造として各層にスパイ
ラル形状の入出力整合回路を分散して配置することによ
り、さらに小型化および高密度化を図ることができる。In the laminated structure of the third and fourth embodiments, a spiral-shaped input / output matching circuit is dispersed and arranged in each layer as a multi-stage structure of three or more stages, thereby further reducing the size and increasing the density. Can be achieved.
【００２１】[0021]
【発明の効果】以上説明したように、本発明の高周波回
路は、電子回路に対する入出力整合回路をスパイラル形
状の伝送線路で形成することにより、従来回路に比べて
回路全体の小型化および高密度化を図ることができる。As described above, in the high-frequency circuit of the present invention, the input / output matching circuit for an electronic circuit is formed by a spiral transmission line, so that the entire circuit can be made smaller and higher in density than a conventional circuit. Can be achieved.
【００２２】また、半導体基板上に薄い誘電体膜を多層
に積層する多層化ＭＭＩＣにおいて、本発明のスパイラ
ル形状の整合回路を積層することにより、高密度な回路
配置が可能となり、集積度を高めることができる。In a multi-layer MMIC in which thin dielectric films are stacked in multiple layers on a semiconductor substrate, a high-density circuit arrangement can be realized by stacking the spiral-shaped matching circuit of the present invention, and the degree of integration can be increased. be able to.
【００２３】また、誘電体多層基板に電子回路が実装さ
れる高周波回路においても、本発明のスパイラル形状の
整合回路を積層することにより、高密度な回路配置が可
能となり、集積度を高めることができる。In a high-frequency circuit in which an electronic circuit is mounted on a dielectric multilayer substrate, a high-density circuit arrangement can be realized by stacking the spiral-shaped matching circuit of the present invention, thereby increasing the degree of integration. it can.
【００２４】また、本発明の高周波回路を同一基板上に
多数形成する場合には、さらに高密度化が可能となり、
集積化された回路の小型化を図ることができる。Further, when a large number of high-frequency circuits of the present invention are formed on the same substrate, the density can be further increased.
The size of the integrated circuit can be reduced.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の高周波回路の第１実施例の構成を示す
図。FIG. 1 is a diagram showing a configuration of a high-frequency circuit according to a first embodiment of the present invention.
【図２】従来形状（メアンダ形状）と本発明のスパイラ
ル形状の比較例を示す図。FIG. 2 is a diagram showing a comparative example of a conventional shape (meander shape) and a spiral shape of the present invention.
【図３】本発明の高周波回路の第２実施例の構成を示す
図。FIG. 3 is a diagram showing a configuration of a second embodiment of the high-frequency circuit of the present invention.
【図４】本発明の高周波回路の第３実施例の構成を示す
図。FIG. 4 is a diagram showing a configuration of a third embodiment of the high-frequency circuit according to the present invention.
【図５】本発明の高周波回路の第４実施例の構成を示す
図。FIG. 5 is a diagram showing a configuration of a high-frequency circuit according to a fourth embodiment of the present invention.
【図６】整合回路を有する従来の高周波回路の構成およ
び等価回路を示す図。FIG. 6 is a diagram showing a configuration and an equivalent circuit of a conventional high-frequency circuit having a matching circuit.
１ 電子回路 ２ 入力整合回路 ３ 出力整合回路 ４ 入力端子 ５ 出力端子 １１ 半導体基板 ２１，２２ 誘電体膜 ３１，３２，３３，３４ 誘電体基板 ４１，４２ 接地導体 ５１，５２ スルーホール REFERENCE SIGNS LIST 1 electronic circuit 2 input matching circuit 3 output matching circuit 4 input terminal 5 output terminal 11 semiconductor substrate 21, 22 dielectric film 31, 32, 33, 34 dielectric substrate 41, 42 ground conductor 51, 52 through hole
フロントページの続き (72)発明者 鴨川 健司 東京都千代田区内幸町１丁目１番６号 日本電信電話株式会社内 (56)参考文献 特開 昭58−136107（ＪＰ，Ａ) 特開 平５−327325（ＪＰ，Ａ) 特開 平３−196667（ＪＰ，Ａ) 特開 平２−177394（ＪＰ，Ａ) 特開 昭63−38305（ＪＰ，Ａ) 特開 平４−140901（ＪＰ，Ａ) 特開 平５−251914（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01P 3/08 H01P 5/02 Continuation of front page (72) Inventor Kenji Kamogawa Nippon Telegraph and Telephone Corporation, 1-6-1, Uchisaiwaicho, Chiyoda-ku, Tokyo (56) References JP-A-58-136107 (JP, A) JP-A-5-327325 (JP, A) JP-A-3-196667 (JP, A) JP-A-2-177394 (JP, A) JP-A-63-38305 (JP, A) JP-A-4-140901 (JP, A) Kaihei 5-251914 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01P 3/08 H01P 5/02
Claims (2)
えた高周波回路であって、 前記整合回路がスパイラル形状の伝送線路であり、前記
伝送線路は線路間の結合による影響が無視できる線路間
隔を有する高周波回路において、 スパイラル形状の伝送線路で形成された複数の前記整合
回路が、同一基板上に形成され、 前記複数の整合回路が、電子回路に接続される入力整合
回路と出力整合回路とからなり、かつ各整合回路が成す
面に対し垂直方向から見たときに前記電子回路の周囲を
取り囲むスパイラル形状となっている ことを特徴とする
高周波回路。 1. A high-frequency circuit having a matching circuit for performing impedance conversion, high frequency the matching circuit is a transmission line of a spiral shape, the transmission line having a line interval negligible the influence of coupling between the lines In a circuit, a plurality of said matching formed by a spiral transmission line
A circuit is formed on the same substrate, and the plurality of matching circuits are connected to an electronic circuit.
Circuit and output matching circuit, and each matching circuit
Around the electronic circuit when viewed from the direction perpendicular to the surface
A high frequency circuit characterized by having a spiral shape surrounding it.
えた高周波回路であって、 前記整合回路がスパイラル形状の伝送線路であり、前記
伝送線路は線路間の結合による影響が無視できる線路間
隔を有する高周波回路において、 スパイラル形状の伝送線路で形成された複数の前記整合
回路が接地導体を挟んだ異なる層にそれぞれ形成され、
各整合回路が形成された層と異なる層にスルーホールを
介して各整合回路に接続される電子回路が形成され、 前記複数の整合回路が、前記電子回路に接続される入力
整合回路と出力整合回路とからなり、かつ各整合回路が
成す面に対し垂直方向から見たときに前記電子回路の周
囲を取り囲むスパイラル形状となっている ことを特徴と
する高周波回路。2. A matching circuit for performing impedance conversion.
The matching circuit is a spiral transmission line,
Transmission lines are between lines where the effect of coupling between lines can be ignored
In a high-frequency circuit having a gap, a plurality of said matching formed by a spiral transmission line
Circuits are formed on different layers sandwiching the ground conductor, respectively.
Through holes on a layer different from the layer on which each matching circuit is formed
An electronic circuit connected to each of the matching circuits is formed, and the plurality of matching circuits are connected to an input connected to the electronic circuit.
It consists of a matching circuit and an output matching circuit, and each matching circuit
When viewed from the direction perpendicular to the surface
A high-frequency circuit having a spiral shape surrounding an enclosure .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03138094A JP3224932B2 (en) | 1994-03-01 | 1994-03-01 | High frequency circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03138094A JP3224932B2 (en) | 1994-03-01 | 1994-03-01 | High frequency circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07240607A JPH07240607A (en) | 1995-09-12 |
| JP3224932B2 true JP3224932B2 (en) | 2001-11-05 |
Family
ID=12329656
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03138094A Expired - Lifetime JP3224932B2 (en) | 1994-03-01 | 1994-03-01 | High frequency circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3224932B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005130060A (en) * | 2003-10-22 | 2005-05-19 | Ngk Spark Plug Co Ltd | High-frequency switch |
| US7764120B2 (en) * | 2008-08-19 | 2010-07-27 | Cree, Inc. | Integrated circuit with parallel sets of transistor amplifiers having different turn on power levels |
-
1994
- 1994-03-01 JP JP03138094A patent/JP3224932B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07240607A (en) | 1995-09-12 |
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