JP2664589B2 - Multilayer wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin multi-layer substrate for high frequency signals of 800 MHz or more.

[0002]

2. Description of the Related Art There are various transmission lines such as coaxial lines as transmission lines for high-frequency signals. In general, a line pattern 2 is formed on a double-sided substrate 1 by etching as shown in FIG.
Generally, a microstrip line in which a transmission line is constituted by the ground pattern 3 on the back surface of the substrate is used.

In a high-frequency circuit, a design method using a distributed constant circuit is required, and it is necessary to design a circuit in consideration of the characteristic impedance of a circuit pattern. In a high-frequency circuit, the input / output impedance of each circuit is generally designed to be 50Ω, and the transmission line used is also designed to have a characteristic impedance of 50Ω for impedance matching. The characteristic impedance of this microstrip line is determined by the dielectric constant of the dielectric of the substrate, the dielectric thickness, the transmission line width of the conductor, and the conductor thickness. An approximate expression has been published. As an example of the approximate expression, H. K.
A. The equation calculated by Wheeler is shown below. That is, if the line width of the line pattern 2 is W, the thickness is t, the distance from the line pattern 2 to the ground pattern 3 is h, and the relative permittivity of the substrate is ε, the characteristic impedance Z ₀ is expressed by the following equation.

[0004]

(Equation 1)

According to equation (1), a glass epoxy substrate having a substrate thickness of 0.8 mm and a dielectric constant of 4.8 has a characteristic impedance of 5
The line width of 0Ω is 1.4 mm.

In recent years, when a high-frequency circuit is formed on a multi-layer substrate which has been utilized for the purpose of high-density mounting and miniaturization of equipment, for example, taking a four-layer substrate as shown in FIG. 5, a signal transmission line pattern 6 is formed, a ground pattern 7 is formed on a second layer, various signal transmission lines 8 are formed on a third layer, and a ground pattern is formed on a back layer. Form 9 is common. That is, the microstrip line is configured by the surface layer pattern 6 and the second-layer ground pattern 7, and the interference between the surface layer circuit and the third-layer transmission line 8 is suppressed by the second-layer ground pattern 7. Reference numeral 4 denotes a dielectric substrate.

[0007] By the way, in a device which is required to be small and lightweight, the thickness of the multilayer substrate is required to be small. Therefore, a multilayer substrate having a total thickness of 0.4 to 1.0 mm is often used. In this case, the thickness of the dielectric 4 between the respective layers is 0.1 to 0.3 mm, which is extremely smaller than the thickness of the dielectric of the conventional double-sided board. Therefore, for example, a four-layer glass epoxy substrate having a dielectric thickness of 0.25 mm (dielectric constant ε = 4.
In 8), the line width of the microstrip line having a characteristic impedance of 50Ω formed on the surface layer is 0.4 mm. However, it is necessary to mount the component 5 on the pattern of the surface layer line, and the line needs to have a certain width or more in view of soldering accuracy and strength. For example, typically 160
In the case of a chip component having a width of 0.8 mm called type 8, it is said that the line width needs to be 0.8 mm or more of the width of the chip.

As described above, when a high-frequency signal is handled in the conventional thin multilayer board, the width of the line pattern formed on the surface layer is considered to be the width of the mounted component from the viewpoint of high-frequency characteristics.
Although it is necessary to make the line width considerably smaller than (K) (0.4 mm in this example), actually, it is necessary to mount components, so that the line width is considerably wider than the 50Ω characteristic impedance line. Generally, it is required to be 0.8 mm or more. In this case, the characteristic impedance is about 33
As a result, when a high-frequency circuit is formed on a conventional thin multilayer substrate, there has been a problem that good high-frequency performance cannot be obtained due to disturbance of the characteristic impedance of the transmission line.

[0009]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and has as its object to reduce the thickness of a multilayer substrate without deteriorating the high-frequency characteristics. It is.

[0010]

SUMMARY OF THE INVENTION The present invention relates to a signal transmission line pattern formed on a surface conductor on which a circuit component is mounted, and a signal transmission line pattern formed on an inner layer of a multi-layer substrate having circuit wiring and the like formed on an inner layer of a dielectric substrate for handling high-frequency signals. An inner layer conductor pattern is formed so as to keep the distance of the conductor pattern longer than the distance between the surface conductor and the back layer conductor ground pattern.

[0011]

According to the present invention, a 50Ω characteristic impedance line can be designed without limiting the width of the transmission line.

[0012]

FIG. 1 shows an embodiment in which the present invention is applied to a four-layer thin multilayer substrate. A pattern for mounting the electronic component 10 and a signal transmission line pattern 11 are formed on the surface layer, a ground pattern 12 is formed on the second layer, and transmission lines 13 for various signals are formed on the third layer. The ground pattern 14 is formed on the back surface layer. Thus, a microstrip line is formed by the surface layer pattern 6 and the second-layer ground pattern 7, and interference between the surface layer circuit and the third-layer transmission line 8 is suppressed by the second-layer ground pattern 7.
Reference numeral 15 denotes a dielectric substrate. Here, a part of the ground pattern 12 of the second layer, that is, the transmission line pattern 1 of the surface layer
The portion of the pattern which is within a range having a distance h from the center of 1 to the back surface ground pattern 14 as a radius is removed, and the transmission line 13 of the third layer is arranged so as to avoid this range. As a result, the distance between the surface layer line pattern 11 and the second-layer ground pattern 12 and between the surface layer line pattern 11 and the back-side ground pattern 1 are increased.
4 so that the distance is kept at least.

As a result, a microstrip line is constituted by the surface layer line pattern 11 and the back layer ground pattern 14, and the thickness of the dielectric 15 can be made three times as thick as that of the conventional multilayer substrate. The line width is wider than that of the conventional multilayer substrate (the inner conductor thickness is 0.03).
Considering 5 mm, in this example, the line width of 50Ω is 1.4.
mm).

With this configuration, the line width of the 50 Ω characteristic impedance line can be made wider than the width at which components can be mounted even on a thin multilayer substrate, so that a high-frequency circuit having good characteristics can be constituted by the thin multilayer substrate. it can.

In this embodiment, a four-layer substrate is described as an example, but a multilayer substrate having four or more layers can also obtain good results. For example, the conductors 16 and 17 in the second and third layers of a six-layer substrate as shown in FIG.
Is arranged so as to be at least the distance from the fourth-layer ground pattern 18, and a microstrip line is formed by the surface layer and the fourth-layer ground pattern 18, so that the line width of the 50Ω characteristic impedance line on the surface layer can be mounted on parts. The above can be achieved, and a high-frequency circuit having excellent characteristics can be formed.

The present invention only needs to be applied to a circuit pattern portion for handling a high-frequency signal. In other substrate portions, a transmission line can be formed in an inner layer as before, and the characteristic of a three-dimensional wiring inherent in a multilayer substrate is impaired. is not.

[0017]

According to the conventional thin multi-layer substrate, a microstrip line is constituted by a surface layer and a second layer conductor, so that the thickness of the dielectric layer is extremely thin. Therefore, if the line is constituted by a line width capable of mounting components on the surface layer. Line characteristic impedance is 50Ω
However, according to the present invention, it is possible to set the characteristic impedance of the line pattern to 50Ω at a line width at which components can be mounted on a thin multilayer substrate. Therefore, a high-frequency circuit having good characteristics can be formed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a four-layer thin multilayer substrate according to the present invention.

FIG. 2 is a view showing a six-layer thin multilayer substrate according to the present invention.

FIG. 3 is a view showing a conventional thin multilayer substrate.

FIG. 4 is a view showing a conventional thin multilayer substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Circuit component 11 Surface signal transmission line pattern 12 Second layer ground pattern 13 Third layer transmission line pattern 14 Backside ground pattern 15 Dielectric

Claims (3)

(57) [Claims] 1. A multi-layer substrate having circuit wiring and the like formed on an inner layer of a dielectric substrate for handling high-frequency signals, wherein a distance between a signal transmission line pattern formed on a surface conductor on which circuit components are mounted and an inner conductor pattern is determined by the distance between the surface conductor and the inner conductor. A thin multi-layer substrate having an inner conductor pattern formed so as to keep the distance from a back conductor ground pattern or more. 2. A distance between a signal transmission line pattern formed on a surface conductor on which a circuit component is mounted and an inner conductor pattern in a four-layer multi-layer substrate in which circuit wiring and the like are formed on an inner layer of a dielectric substrate for handling high-frequency signals. A thin multilayer board having an inner conductor pattern formed so as to maintain the distance between a conductor and a back conductor ground pattern. 3. A signal transmission line pattern formed on a surface conductor on which a circuit component is mounted, and a signal transmission line pattern formed on two or three layers of a multi-layer substrate having five or more layers in which circuit wiring and the like are formed on an inner layer of a dielectric substrate for handling high-frequency signals. A thin multilayer board having an inner conductor pattern formed so as to keep the distance between the inner conductor pattern and the distance between the surface conductor and the four-layer conductor ground pattern or more.