JP3216940B2 - Multi-chip module assembly board - Google Patents

Multi-chip module assembly board

Info

Publication number
JP3216940B2
JP3216940B2 JP18543093A JP18543093A JP3216940B2 JP 3216940 B2 JP3216940 B2 JP 3216940B2 JP 18543093 A JP18543093 A JP 18543093A JP 18543093 A JP18543093 A JP 18543093A JP 3216940 B2 JP3216940 B2 JP 3216940B2
Authority
JP
Japan
Prior art keywords
chip module
board
module assembly
substrate
assembly board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18543093A
Other languages
Japanese (ja)
Other versions
JPH0722574A (en
Inventor
雅一 稲葉
健 岩山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to JP18543093A priority Critical patent/JP3216940B2/en
Publication of JPH0722574A publication Critical patent/JPH0722574A/en
Application granted granted Critical
Publication of JP3216940B2 publication Critical patent/JP3216940B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers

Landscapes

  • Combinations Of Printed Boards (AREA)
  • Structure Of Printed Boards (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、複数個のLSIベアチ
ップを小型の高密度配線基板に搭載してモジュ−ル化し
たものをプリント基板に搭載する為の複数のマルチチッ
プモジュ−ル基板間を相互に接続したマルチチップモジ
ュ−ル集合基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a plurality of LSI bare chips on a small high-density wiring board and mounting the module on a printed circuit board. And a multi-chip module assembly board.

【0002】[0002]

【従来技術とその問題点】この種の従来のマルチチップ
モジュ−ル基板は、図3の如く、セラミック基板やシリ
コン基板等からなる微細配線多層基板20にLSIチッ
プ等のベアチップ21,22を搭載し、該基板の外周部
に配列されたリ−ドアレイ23を使用してプリント基板
に実装する方法が採用されている。
2. Description of the Related Art As shown in FIG. 3, a conventional multi-chip module substrate of this kind has bare chips 21 and 22 such as LSI chips mounted on a fine wiring multilayer substrate 20 composed of a ceramic substrate, a silicon substrate or the like. Then, a method of mounting on a printed board using a lead array 23 arranged on the outer peripheral portion of the board is adopted.

【0003】しかし、このような方法では、高密度実装
されたマルチチップモジュ−ル基板であってもプリント
基板との接続部分でプリント基板側に於ける回路形成限
界や接続限界の制限を受けるので、全体として高密度実
装配線基板を構成することは困難であった。
However, in such a method, even if the multi-chip module board is mounted at a high density, the circuit formation limit and the connection limit on the printed board side are limited at the connection portion with the printed board. However, it has been difficult to form a high-density mounting wiring board as a whole.

【0004】また、接続部分に於けるインピ−ダンスの
整合を図ることも困難であるので、実装系全体で高速化
を達成することは困難であった。
[0004] Further, it is also difficult to match the impedance at the connection portion, so that it has been difficult to achieve high speed in the entire mounting system.

【0005】[0005]

【課題を解決するための手段】本発明は上記のような従
来のマルチチップモジュ−ル基板実装に伴う問題点を好
適に解消する為のマルチチップモジュ−ル集合基板を提
供するものである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-chip module assembly board for suitably solving the problems associated with the conventional multi-chip module board mounting as described above.

【0006】その為に本発明のマルチチップモジュ−ル
集合基板では、複数個のLSIベアチップを小型の高密
度配線基板に搭載してモジュ−ル化したものをプリント
基板に搭載する為の複数のマルチチップモジュ−ル基板
を有し、この一方のマルチチップモジュ−ル基板に於け
る少なくとも一層の回路配線パタ−ンはその絶縁べ−ス
材と共に外部に折曲げ自在に伸長して他のマルチチップ
モジュ−ル基板の一部の回路配線パタ−ンと連続的に接
続されるように構成したものである。
For this reason, in the multi-chip module assembly board of the present invention, a plurality of LSI bare chips are mounted on a small high-density wiring board, and a plurality of LSI bare chips are mounted on a printed board. multichip modules - has Le substrate, the one of the multi-chip module - in Le substrate at least one layer of circuit wiring patterns - down its insulating base - bent to the outside together with the scan material freely extended to other multi It is configured to be continuously connected to a part of the circuit wiring pattern of the chip module substrate.

【0007】ここで、マルチチップモジュ−ル基板相互
を連続的に接続する為の上記手段は可撓性回路基板で構
成するのが好適である。
Here, it is preferable that the means for continuously connecting the multi-chip module boards be constituted by a flexible circuit board.

【0008】[0008]

【実施例】図1は本発明の一実施例によるマルチチップ
モジュ−ル集合基板を概念的に示す断面構成図であり、
図ではそれぞれ4層の回路配線導体層を有する2つのマ
ルチチップモジュ−ル基板A及びBの間を相互に接続し
た例を示す。
FIG. 1 is a sectional view conceptually showing a multi-chip module assembly board according to an embodiment of the present invention.
The figure shows an example in which two multi-chip module substrates A and B each having four circuit wiring conductor layers are interconnected.

【0009】即ち、一方のマルチチップモジュ−ル基板
Aに於ける第一の層の回路配線パタ−ン1は可撓性回路
基板7として外部に伸長し、他のマルチチップモジュ−
ル基板Bに於ける第二の層の回路配線パタ−ン2と連続
的に接続されている。これらの両基板A,Bの最上層に
はLSIベアチップを搭載する為の半田バンプ3がそれ
ぞれ形成されている。
That is, the circuit wiring pattern 1 of the first layer in one multi-chip module substrate A extends to the outside as a flexible circuit board 7 and the other multi-chip module
And is continuously connected to the circuit wiring pattern 2 of the second layer on the substrate B. Solder bumps 3 for mounting an LSI bare chip are formed on the uppermost layers of these substrates A and B, respectively.

【0010】また、上記両基板A,Bの各層の導体層
は、ヴァイアホ−ル4で電気的に導通されて高密度な三
次元回路を構成している。そして、両基板A,Bの底部
には、高密度に実装されるLSIベアチップからの発熱
を効果的に放熱する為の冷却用フィン5を有する放熱板
6が設けられている。
The conductor layers of the two substrates A and B are electrically connected by via holes 4 to form a high-density three-dimensional circuit. A heat radiating plate 6 having cooling fins 5 for effectively radiating the heat generated from the LSI bare chips mounted at high density is provided at the bottom of both substrates A and B.

【0011】図2は本発明の一実施例によるマルチチッ
プモジュ−ル集合基板の機器搭載状態の一例を示し、各
マルチチップモジュ−ル基板A,B,CにはLSIベア
チップ8が搭載され、また、それら各マルチチップモジ
ュ−ル基板A,B,C相互間を接続する可撓性回路基板
7は柔軟性に富むので、適当なスペ−サ9を使用しなが
ら図の如く可撓性回路基板7の部分で折曲げ積層して機
器にコンパクトに搭載することができる。
FIG. 2 shows an example of a device mounted state of a multi-chip module assembly board according to an embodiment of the present invention. An LSI bare chip 8 is mounted on each of the multi-chip module boards A, B and C. Further, since the flexible circuit board 7 for connecting the multi-chip module boards A, B, and C is rich in flexibility, the flexible circuit board is used as shown in FIG. It can be folded and laminated at the portion of the substrate 7 and compactly mounted on the device.

【0012】[0012]

【発明の効果】本発明のマルチチップモジュ−ル集合基
板によれば、各マルチチップモジュ−ル基板を接続する
折曲げ自在な回路配線パタ−ン層は、マルチチップモジ
ュ−ル基板を構成している回路配線パタ−ンと一体に形
成されるので、接続の為のスぺ−スを必要とせず小型化
を達成できる。
According to the multi-chip module assembly board of the present invention, each multi-chip module board is connected.
The bendable circuit wiring pattern layer is formed integrally with the circuit wiring pattern that constitutes the multi-chip module substrate, so no space is required for connection and the size is reduced. Can be achieved.

【0013】従って、搭載されたLSIベアチップ間の
距離を短縮し、モジュ−ル化されたことによって得られ
た基板の高速化を損なう虞がない。
Therefore, there is no possibility that the distance between the mounted LSI bare chips is shortened and that the speeding up of the substrate obtained by the modularization is not impaired.

【0014】また、各マルチチップモジュ−ル基板間の
接続信頼性を高めることができる一方、折りたたんで積
層するような実装が可能となるので、電子機器の小型化
に大いに寄与する。
Further, while the reliability of connection between the multi-chip module substrates can be improved, mounting such as folding and stacking is possible, which greatly contributes to miniaturization of electronic equipment.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例によるマルチチップモジュ
−ル集合基板を概念的に示す断面構成図。
FIG. 1 is a sectional configuration view conceptually showing a multi-chip module assembly board according to an embodiment of the present invention.

【図2】 本発明の一実施例によるマルチチップモジュ
−ル集合基板の機器搭載状態の一例を示す図。
FIG. 2 is a diagram showing an example of a device mounted state of a multi-chip module aggregate board according to an embodiment of the present invention.

【図3】 従来のマルチチップモジュ−ル基板を示す
図。
FIG. 3 is a view showing a conventional multi-chip module substrate.

【符号の説明】[Explanation of symbols]

A マルチチップモジュ−ル基板 B マルチチップモジュ−ル基板 1 回路配線パタ−ン 2 回路配線パタ−ン 3 半田バンプ 4 ヴァイアホ−ル 5 冷却用フィン 6 放熱板 7 可撓性回路基板 8 LSIベアチップ 9 スペ−サ Reference Signs List A Multi-chip module board B Multi-chip module board 1 Circuit wiring pattern 2 Circuit wiring pattern 3 Solder bump 4 Via hole 5 Cooling fin 6 Heat sink 7 Flexible circuit board 8 LSI bare chip 9 Spacer

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 25/00 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. 7 , DB name) H01L 25/00

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】複数個のLSIベアチップを小型の高密度
配線基板に搭載してモジュ−ル化したものをプリント基
板に搭載する為の複数のマルチチップモジュ−ル基板を
有し、この一方のマルチチップモジュ−ル基板に於ける
少なくとも一層の回路配線パタ−ンはその絶縁べ−ス材
と共に外部に折曲げ自在に伸長して他のマルチチップモ
ジュ−ル基板の一部の回路配線パタ−ンと連続的に接続
されるように構成したマルチチップモジュ−ル集合基
板。
A multi-chip module substrate for mounting a plurality of LSI bare chips on a small high-density wiring board and mounting the module on a printed circuit board. At least one circuit wiring pattern on the multi-chip module substrate is extended to be able to bend to the outside together with the insulating base material, and a circuit wiring pattern of a part of another multi-chip module substrate is provided. A multi-chip module assembly board configured to be continuously connected to a component.
【請求項2】 前記マルチチップモジュ−ル基板相互を
連続的に接続する為の上記手段を可撓性回路基板で構成
した請求項1のマルチチップモジュ−ル集合基板。
2. The multi-chip module assembly board according to claim 1, wherein said means for continuously connecting said multi-chip module boards is formed of a flexible circuit board.
JP18543093A 1993-06-29 1993-06-29 Multi-chip module assembly board Expired - Fee Related JP3216940B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18543093A JP3216940B2 (en) 1993-06-29 1993-06-29 Multi-chip module assembly board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18543093A JP3216940B2 (en) 1993-06-29 1993-06-29 Multi-chip module assembly board

Publications (2)

Publication Number Publication Date
JPH0722574A JPH0722574A (en) 1995-01-24
JP3216940B2 true JP3216940B2 (en) 2001-10-09

Family

ID=16170652

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18543093A Expired - Fee Related JP3216940B2 (en) 1993-06-29 1993-06-29 Multi-chip module assembly board

Country Status (1)

Country Link
JP (1) JP3216940B2 (en)

Also Published As

Publication number Publication date
JPH0722574A (en) 1995-01-24

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