JP2000294725A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device three-dimensionally packaged by building various types of semiconductor devices, circuit elements and electronic circuits in a package. SOLUTION: A semiconductor device 10 is of a two-layered structure which has an element mounting structure 12 as a first layer, an intermediate substrate 14 provided on the first layer, and an element mounting structure 16 as a second layer provided on the intermediate substrate. The element mounting structure of the first layer has a first printed circuit board 18 and a semiconductor chip 20 mounted on the first board 18. The intermediate substrate 14 is formed as a frame-like plate member which has a large through-space for the chip 20 and has a thickness not smaller than a height H of the chip 20 to accommodate the chip 20 in the through-space. The element mounting structure of the second layer has a second printed circuit board 24, a circuit 26 such as a matching circuit mounted thereon, and a semiconductor chip 28. The element mounting structures of the first and second layers are electrically and mechanically connected by connecting wiring patterns thereof to form a three- dimensional package.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a multilayer laminated structure in which elements to be mounted such as semiconductor elements are three-dimensionally packaged.

[0002]

2. Description of the Related Art In recent years, as compared with a planar and two-dimensional multi-chip module (Multi-Chip] Module MCM), the mounting density can be increased and the interconnection density between chips can be reduced. Attention has been paid to the development of dimensional MCM. A semiconductor device in which an IC chip is three-dimensionally packaged is, for example, a storage device of a computer that requires compactness and high-speed operation due to high-density mounting;
Alternatively, it is very useful in the field of large-scale cache memories requiring high-speed access and compactness.

[0003] One conventional method of three-dimensional packaging is a method of stacking IC chips to form one cube. In this method, first, a first-layer IC chip is interconnected on a thin film such as a TAB film by a connection method using gold wires or a flip-chip connection method, and an electrical test and burn-in are performed. Next, a second-layer IC chip is stacked on the first-layer IC chip via a thin film, a solder ball, or the like, and bonding, an electrical test, and burn-in are performed in the same manner as the first-layer IC chip.
In succession, multiple layers of IC chips are stacked to form a cube for three-dimensional packaging. Another method is to mount an IC chip or an IC package on both the front and back surfaces of a lead frame or a die pad of a mounting board.

[0004]

However, since the above-described conventional three-dimensional mounting method three-dimensionally mounts an IC chip composed of the same or the same kind of semiconductor integrated circuit, different types of semiconductor integrated circuits are used. When three-dimensionally mounting an IC chip, it is difficult to apply
There is a limit in increasing the mounting density of electronic components including the C chip, and it has not reached a satisfactory range for practical use.
Further, the conventional three-dimensional mounting method aims at stacking IC chips composed of semiconductor integrated circuits. The three-dimensional packaging as a system including a matching circuit and the like necessary for a high-frequency circuit of about 1 GHz composed of a capacitor or the like is not suitable. Was not taken into account. For example, a power amplifier and a switch amplifier module used in a mobile phone or the like have a matching circuit formed in a two-dimensional manner in the module. It has been difficult to apply the conventional three-dimensional mounting method to realize the above.

Accordingly, an object of the present invention is to provide a three-dimensionally packaged semiconductor device incorporating various semiconductor devices, circuit elements, and electronic circuits.

[0006]

In order to achieve the above object, a semiconductor device according to the present invention comprises a first-layer element mounting structure in which elements to be mounted are mounted on a wiring board, and a first-layer element mounting structure. The device is configured as a two-layer laminated structure having a second-layer device mounting structure in which a mounted device is mounted on a wiring board, the device being mounted on a wiring board, and the mounted device includes a semiconductor device and a circuit device. A circuit body having a circuit formed by at least one of the above, at least one of the semiconductor element, and the circuit element, the wiring board has a wiring pattern for mounting the mounted element on both sides, and both sides Corresponding wires of the wiring pattern are connected to each other, and the intervening body is a plate-like body having a space portion in a central region and a wiring pattern on both surfaces around the space portion, and a first layer element is provided in the space portion. Mounting structure Housing the element and the wiring substrate of the element mounting structure of the first and second layers, respectively, and are electrically and mechanically connected by a connection between the wiring patterns.

According to the present invention, high-density three-dimensional packaging can be achieved by accommodating the mounted element having the first-layer element mounting structure in the space of the intervening body. The intervening body may be, for example, a frame-like plate-shaped body having a through space larger than the dimension of the mounted element in the central region and having a thickness greater than the height of the mounted element, and may be arranged around the mounted element. It may be constituted by inclusions thicker than the height of the plurality of mounted elements. The space does not need to be a through space, and may be a hollow space as long as the device to be mounted having the first-layer device mounting structure can be accommodated. The wiring board may be a single-sided board or a double-sided board, and a printed board is practically used.

[0008] The semiconductor device according to the present invention may be configured as a multilayer laminated structure by repeatedly providing a laminated structure composed of an interposer and an element mounted structure on the second layer element mounting structure by a predetermined number of layers. Can be.

In a preferred embodiment of the present invention, the wiring patterns provided on both sides of the wiring board are such that the corresponding wirings of the wiring patterns on both sides are mutually connected by conducting wires provided in through holes penetrating the board. I have. In another aspect, the wiring patterns provided on both sides of the wiring board are such that the corresponding wirings in the wiring patterns on both sides are mutually connected by side wiring provided on the side surface of the substrate.

In the semiconductor device according to the present invention, the type of the mounted element is not limited, and is a semiconductor element, a circuit element such as an electric resistance or a capacitance element, or an electronic element formed by the semiconductor element and / or the circuit element. Any of circuit bodies composed of circuits may be used. For example, a circuit element in which a semiconductor element and a matching circuit are mounted on a wiring board may be used.

There is no restriction on the connection method of the mounted elements, and they may be mounted by, for example, a flip chip connection method or a wire bonding method.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail based on embodiments with reference to the accompanying drawings. Embodiment 1 This embodiment is an example of an embodiment of a semiconductor device according to the present invention. FIG. 1 is an exploded perspective view of the semiconductor device of this embodiment, and FIG. 2 is a semiconductor device of this embodiment. And FIG. 3 is a layout view of mounting terminals of the semiconductor device. The semiconductor device 10 includes, as shown in FIGS.
First-layer element mounting structure 12 and first-layer element mounting structure 1
2. An intermediate substrate 14 provided as a first intermediate structure on
And an element mounting structure 16 of a second layer provided on the intermediate substrate 14.

The element mounting structure 12 of the first layer includes a first printed circuit board 18 and a semiconductor chip 20 mounted on the first printed circuit board 18.

The intermediate substrate 14 is a first printed circuit board 14
An opening having a width equal to or larger than the size W of the device to be mounted of the device mounting structure 12 of the first layer is provided thereon, and a plate having a thickness equal to or higher than the height H of the device to be mounted, that is, Is formed as a frame-like plate having a thickness equal to or greater than the height H of the semiconductor chip 20. The intermediate substrate 14 is provided with the element mounting structure 12 of the first layer.
When the semiconductor chip 20 is stacked on the wiring board 18, the semiconductor chip 20 is accommodated in the through space 22. In place of the frame-shaped plate, the intermediate substrate 14 is formed as two plate-shaped members having a thickness equal to or more than the height H of the mounted element.
Are provided on both ends of the semiconductor chip 20 with an interval equal to or greater than the width W of the element to be mounted of the element mounting structure 12 of the first layer, that is, in this case, have a thickness equal to or greater than the height H of the semiconductor chip 20. The semiconductor chip 20 is formed as two plate-like bodies having
May be arranged with an interval 22 larger than the width W.

The element mounting structure 16 of the second layer includes a second printed board 24, a circuit body 26 such as a matching circuit which is a semiconductor chip and a circuit element mounted on the second printed board 24, and a circuit body 26. And other semiconductor chips 28.

The first printed circuit board 18 is shown in FIGS.
As shown in FIG. 1, the semiconductor device 10 is mounted on a mounting substrate (not shown).
When mounting on a substrate, a wiring pattern 30 connected to the connection terminal of the mounting substrate is provided on the back surface, and a wiring pattern 34 connected to the electrode 32 of the semiconductor chip 20 is provided on the front surface. And wiring pattern 3 on the surface
4 is provided. The semiconductor chip 20 is a flip-chip bonding type semiconductor chip, and is flip-chip bonded by bonding the electrodes 32 of the semiconductor chip 20 to the wiring pattern 34 of the first printed circuit board 18 by solder bonding.

As shown in FIGS. 1 and 2, when the intermediate substrate 14 is bonded to the first printed circuit board 18, the intermediate substrate 14 is connected to the wiring pattern 40 of the first printed circuit board 20. Is provided on the back surface, and a wiring pattern 44 is provided on the front surface for connecting to the wiring pattern 42 on the back surface of the second printed board 24 when the second printed board 24 is bonded to the intermediate board 14. Also, the intermediate substrate 14
Is provided with a through hole 46 that penetrates the intermediate substrate 14 and penetrates a conductive wire connecting the wiring pattern 40 on the back surface and the wiring pattern 44 on the front surface.

The intermediate printed circuit board 14 includes a first printed circuit board 18.
The surface wiring pattern 34 of the intermediate substrate 14 and the rear surface wiring pattern 40 of the intermediate substrate 14 are joined to the first printed circuit board 18 by soldering 48, and the surface wiring pattern 44 of the intermediate substrate 14 and the surface wiring of the second printed circuit board 24 are Pattern 42
Between the second printed circuit board 24 and the
Is joined to. When performing the solder joint 48, the first
The solder can be printed on the surface wiring pattern 34 on the printed circuit board 18 and on the surface wiring pattern 44 on the intermediate substrate 14, and then the intermediate substrate 14 can be mounted on a mounter and connected by performing a reflow process. When performing the solder joint 50, solder is printed on the surface wiring pattern 44 on the intermediate substrate 14, and then the second printed circuit board 2 is printed.
4 can be connected by mounting on a mounter and performing a reflow process. For the solder joints 48 and 50, a normal eutectic solder or a solder having another composition may be used, or a conductive adhesive or an anisotropic conductive film may be used.

The second printed circuit board 24 is shown in FIGS.
As shown in the figure, a wiring pattern 42 connected to the wiring pattern 44 of the intermediate substrate 14 is provided on the back surface, and a wiring pattern 52 connected to electrodes (not shown) of the circuit body 26 and the semiconductor chip 28 is provided on the front surface. , And a through hole 54 through which a conductive wire connecting the back wiring pattern 42 and the front wiring pattern 52 is passed. Circuit body 26,
The semiconductor chip 28 is solder-bonded 56 to the surface wiring pattern 52 of the second printed circuit board 24,
Is mounted on the printed circuit board 24.

The semiconductor device 10 includes a first printed circuit board 1
8 on the wiring pattern 30 on the back surface of the substrate 8 as shown in FIG.
Terminals 58 having solder bumps for solder bonding with a mounting board (not shown) are provided in an array.

With the above configuration, in the semiconductor device 10,
The semiconductor chip 20 of the element mounting structure 12 of the first layer is connected to the wiring pattern 30 via a conductive wire (not shown) penetrating the wiring pattern 34 and the through hole 36.

The circuit body 26 and the semiconductor chip 28 of the element mounting structure 16 of the second layer include a wiring pattern 52, a lead (not shown) penetrating through the through hole 54, and a wiring pattern 42.
And a wiring (not shown) that is connected to the wiring pattern 44 of the intermediate substrate 14 via the solder joint 50 and penetrates the through hole 46, the wiring pattern 40, and the solder bonding 48.
Is connected to the wiring pattern 34 of the first printed circuit board 18 via a wire, and further connected to the wiring pattern 30 via a conducting wire (not shown) penetrating the through hole 36. Then, the semiconductor chip 20, the circuit body 26, and the semiconductor chip 2
8 is connected to the wiring pattern of the mounting board via the terminal 58.

In the element mounting structure 12 of the first layer, the semiconductor chip 16 is mounted as an element to be mounted. However, the semiconductor chip 16 is not necessarily limited to the semiconductor chip, and may be used in addition to or instead of the semiconductor chip 16. Semiconductor chips, circuit elements such as resistance elements and capacitance elements, matching circuits and the like may be mounted. In the element mounting structure 16 of the second layer,
Although a circuit body 26 such as a matching circuit and a semiconductor chip 28 are mounted as elements to be mounted, the invention is not limited thereto.
In addition to the circuit body 26 and the semiconductor chip 28, or the circuit body 2
Instead of 6 and the semiconductor chip 28, another semiconductor chip, a circuit body, a resistor, and a capacitor may be mounted.

In the present embodiment, an intermediate substrate having the same structure as the intermediate substrate 14 is provided on the element mounting structure 16 of the second layer.
By providing an element mounting structure of the third layer having the same structure as the element mounting structure 16 of the layer, a semiconductor device having a three-layer laminated structure can be formed. Further, by providing the intermediate substrate and the element mounting structure in sequence, A semiconductor device in which a desired number of layers are three-dimensionally packaged can be realized.

Embodiment 2 This embodiment is another example of the embodiment of the semiconductor device according to the present invention. FIG. 4 is a schematic sectional view of the semiconductor device of this embodiment. The semiconductor device 60 of the present embodiment is
As shown in FIG. 4, the semiconductor device 10 has the same configuration as the semiconductor device 10 of the first embodiment, except that an intermediate substrate 64 having a brand via hole 62 is provided as a first intermediate structure. Intermediate substrate 64 with brand via hole 62
Has a wiring pattern 66 in the substrate, and therefore has a high degree of freedom in wiring, which is convenient when mounting a heterogeneous semiconductor chip on the second printed circuit board 24.

Embodiment 3 This embodiment is still another example of the embodiment of the semiconductor device according to the present invention. FIG. 5 is a schematic expanded sectional view of the semiconductor device of this embodiment and FIG. FIG. 6 is a layout view of mounting terminals of the semiconductor device of the present embodiment. The semiconductor device 70 according to the first embodiment is different from the semiconductor device 70 according to the first embodiment except that the method for connecting the wiring patterns is different and the type and arrangement of the terminals for connecting the semiconductor device 70 to the mounting board are different.
The configuration is the same as that of the semiconductor device 10 of FIG.

As shown in FIG. 5, the semiconductor device 70 includes a first printed circuit board 18 of the semiconductor device 10 of the first embodiment.
The back wiring pattern 30 and the front wiring pattern 34 of the first printed circuit board 18 penetrate through holes 36 provided in the first printed circuit board 18.
A substrate side wiring 72 provided on the side surface of the first printed circuit board 18 is provided in place of a conductive wire (not shown) for connecting the first printed circuit board 18 to the first printed circuit board 18. In addition, the semiconductor device 70 includes a conductor (not shown) that penetrates the through hole 46 provided in the intermediate substrate 14 and connects the back wiring pattern 40 and the front wiring pattern 44 of the intermediate substrate 14, instead of the intermediate substrate 14. The substrate side wiring 74 provided on the side surface of the substrate is provided. Further, the semiconductor device 70
Are through holes 54 provided in the second printed circuit board 24.
Instead of conducting wires (not shown) connecting the back wiring pattern 42 and the front wiring pattern 52 of the second printed board 24 to the side of the second printed board 24, the board side wiring 76 provided on the side of the board of the second printed board 24. It has.

As shown in FIG. 6, the semiconductor device 70 is provided with solder bumps for solder connection with a mounting board (not shown).
Are provided along the periphery.

In the first to third embodiments, the first printed circuit board 18 and the second printed circuit board 24 use single-sided mounting boards on which elements to be mounted are mounted on one side. Further, a multilayer substrate may be used. Also,
Although the semiconductor chip is a flip chip bonding type,
A semiconductor chip of a wire bonding method may be used.

[0030]

According to the structure of the present invention, a semiconductor integrated circuit and a matching circuit are mounted on the same substrate, and these are stacked three-dimensionally to increase the mounting density and to stabilize the electrical characteristics. More specifically, the semiconductor device according to the present invention has the following effects. 1) The mounting area can be significantly reduced by three-dimensionally mounting the semiconductor element and the matching circuit required for the high-frequency module circuit. 2) By providing an electrical matching circuit around the semiconductor element for high-frequency operation, electrical loss can be minimized, and high-frequency characteristics can be maximized. 3) Since a plurality of semiconductor elements and a matching circuit can be three-dimensionally packaged in the same package, the semiconductor element characteristics can be maximized even as a module.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view of a semiconductor device according to a first embodiment.

FIG. 2 is a schematic developed cross-sectional view of the semiconductor device according to the first embodiment.

FIG. 3 is a layout view of mounting terminals of the semiconductor device of the first embodiment.

FIG. 4 is a schematic cross-sectional view of a semiconductor device according to a second embodiment.

FIG. 5 is a schematic developed sectional view of a semiconductor device according to a third embodiment.

FIG. 6 is a layout view of mounting terminals of the semiconductor device of Embodiment 3;

[Explanation of symbols]

10 semiconductor device of embodiment 1, 12 element mounting structure of first layer, 14 intermediate board, 16 element mounting structure of second layer, 18 first printed circuit board, 20 ... Semiconductor chip, 22 ... Opening, 24 ... Second printed board, 26 ... Circuit, 28 ... Semiconductor chip, 30 ...
Wiring pattern, 32 ... Semiconductor chip electrode, 34 ...
Wiring pattern, 36: Through hole, 38: Solder joint, 40: Wiring pattern, 42: Wiring pattern,
44 wiring pattern, 46 through hole, 48
... Solder joint, 50 ... Solder joint, 52 ... Wiring pattern, 54 ... Through hole, 56 ... Solder joint, 5
8 terminals, 60 semiconductor device of the second embodiment, 62
…… Brand beer hole, 64 …… Intermediate board, 66 ……
Wiring pattern 70 Semiconductor device 7 of the third embodiment, 7
2. Wiring on the side of the substrate, 74 ... Wiring on the side of the substrate, 76 ...
Board side wiring, 78 ... terminal.

Claims (6)

[Claims] A first device in which a device to be mounted is mounted on a wiring board.
A two-layer laminated structure having a two-layer element mounting structure in which a layered element mounting structure and a second layer element mounting structure in which an element to be mounted is mounted on a wiring board and provided on the first layer element mounting structure with an interposed body therebetween The mounted element is a circuit having a circuit formed by at least one of a semiconductor element and a circuit element, a semiconductor element,
And a circuit element, wherein the wiring board has a wiring pattern for mounting the mounted element on both sides, and connects the corresponding wirings of the wiring patterns on both sides, and the intermediate body is a central region. A space portion, and a plate-shaped body having a wiring pattern on both surfaces around the space portion, wherein the mounted element of the element mounting structure of the first layer is accommodated in the space portion,
In addition, the wiring board of the element mounting structure of the first layer and the second layer,
A semiconductor device characterized by being electrically and mechanically connected by connection of wiring patterns. 2. A multi-layer laminated structure comprising a second layer of an element mounting structure and a laminated structure composed of an intervening body and an element mounting structure repeatedly provided in a predetermined number of layers. 2. The semiconductor device according to 1. 3. A wiring pattern provided on both sides of a wiring board, wherein wirings corresponding to the wiring patterns on both sides are connected to each other by conducting wires provided in through holes penetrating the board. Item 3. The semiconductor device according to item 1 or 2. 4. A wiring pattern provided on both surfaces of a wiring board, wherein wirings corresponding to the wiring patterns on both surfaces are connected to each other by side wiring provided on a side surface of the substrate. 3. The semiconductor device according to 2. 5. The semiconductor device according to claim 1, wherein the semiconductor element and the matching circuit are mounted as elements to be mounted on a wiring board having an element mounting structure. 6. The semiconductor device according to claim 1, wherein the element to be mounted is mounted on a wiring board by a flip-chip connection method.