JP3203176B2 - Hybrid integrated circuit device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device having a multilayer structure having via holes and a method of manufacturing the same, and more particularly to a structure for satisfactorily realizing a plating state formed on the surface of the via hole. And its manufacturing method.

[0002]

2. Description of the Related Art A conventional structure and manufacturing method will be described with reference to FIGS. Generally, a multilayer substrate structure in which a plurality of substrates or sheets are stacked is described in, for example,
No. 128493, IMC 1988 Proceeding, Tokyo, May
25-27, `` THE DEVELOPMENT OFTHE MULTILAYERED IMST S
UBSTRATE ”.

[0003] In particular, the latter document discloses that via hole connection is realized by performing electroless Cu plating first and then performing electrolytic plating in connection with via holes. That is, as can be seen from FIG. 6, the copper foil 3 is attached to the Al substrate 1 whose surface is anodized via the adhesive resin 2 by hot pressing. The copper foil is etched into a predetermined pattern, and a printed resistor, a chip capacitor, a chip resistor, and a bare chip semiconductor element are electrically connected as necessary.

[0004] The sheet adhered to the Al substrate 1 is, for example, a Cu-adhered film 4 with an adhesive. For example, the holes of the via holes 5 are formed by drilling, punching or the like before attaching. ing. Here, reference numeral 6 denotes a patterned Cu foil, which is electrically connected to the first-layer wiring 3 looking into the hole 5 in a later step. FIG.
Indicates that this electrical connection has been achieved by the Cu plating 7, which is electrolessly plated in advance as described above, and then thickened by electrolytic plating.

[0005]

Here, the film 4 comprises:
Generally, it is an insulating resin. In order to place a conductive material inside the hole 5, first, a thin Cu is formed by electroless plating. Once Cu is loaded, the Cu can be loaded thicker by electrolytic plating. However, the electroless plating solution is
1 Dissolve the substrate 1. Therefore, in the plating process, the back surface of the substrate is immersed in the plating solution in the structure of FIG.
Eluted to deteriorate the plating solution. Furthermore, plating failure may occur due to deterioration of the plating solution.

Further, as shown in FIG. 7, a mask 8 is formed on the back surface of the Al substrate.
Is provided, the elution of Al is eliminated, but in the plating step, Cu may be attached, for example, as indicated by reference numeral 9. Since the mask 8 is generally a tape made of resin, the adhesion of Cu itself is poor, and the Cu once adhered at the time of plating peels off and mixes into the plating solution, which is again transferred to via holes and other areas. There is a problem that it causes adhesion and causes plating failure and short circuit failure.

When attaching a heat radiating plate to the Al substrate 1, there is no particular problem if both contact surfaces are flat. However, in general, a heat radiating plate is provided between the heat radiating plate and the Al substrate to reduce thermal resistance. It was necessary to take measures such as applying a paste material with excellent conductivity.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems. First, a Cu sheet is adhered to the back surface of an Al substrate, and the conductive means of the Al substrate and the conductive means of the insulating substrate are used. This can be solved by providing the same material as Cu in the via hole formed by plating on the back surface of the Al substrate in order to achieve the connection. It can be heated and melted via solder and joined thermally. The Cu sheet is
Before the attachment, the surface is sufficiently oxidized. However, since the plating is performed again and the Cu is placed, the soldering of the heat radiation plate can be favorably performed.

Second, after forming a via hole, an Al substrate having a Cu sheet previously adhered to the back surface is put into an electroless plating solution, Cu is plated on the surface of the via hole, and then the Al substrate is electrolyzed. The solution is to solve the problem by putting in a plating solution and further performing Cu plating on the Cu plating layer. Since there is a Cu sheet, elution of the surface of the Al substrate can be prevented, and furthermore, a Cu component to be attached to the back surface of the substrate. Can be completely adhered because the adhered base is Cu, and it can be suppressed that Cu is peeled off during plating. Therefore, the peeled Cu and the eluted Al are not mixed into the plating solution, and the deterioration of the etching solution can be prevented.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.
This will be described with reference to FIG. Here, 1 is placed on the Al substrate.
Sheets of insulating substrate (sheet-like or slightly thick)
Will be described, but may be further laminated. First, there is a lower metal substrate 30, on which conductive means such as a lower conductive path 31 and a lower conductive land are adhered. The lower substrate 30 is made of an Al substrate and has an oxide film 32 indicated by a dotted line formed on the surface thereof. Although this oxide film is formed by anodizing both surfaces by anodic oxidation, it may be formed by thermal oxidation or deposition. Further, an insulating resin 33 having an adhesive property such as an epoxy resin or a polyimide resin is coated, and the conductive means is attached by hot pressing. The conductive means is made of Cu, adhered to the entire surface, and then patterned by etching with a solution such as ferric chloride. The conductive land is an area to which a lower chip semiconductor element or the like of a bare chip is fixed. In this case, a heating element for a large signal is mounted, and a heat sink such as Cu is fixed to the lower layer of the chip via solder or the like. And it is integral with the conductive path or has an island shape. Here, since the semiconductor element has a slight thickness, a region to which the semiconductor element is fixed is hollowed out in a second-layer insulating substrate 34 described later. The semiconductor element may be an IC chip, an LSI chip, a MOSFET chip, an IGBT chip, or the like. In the case of a bipolar power transistor, the base electrode and the emitter electrode on the surface are formed of thin metal wires, and the wiring 35 of the upper insulating substrate 34 Since the back surface of the chip is a collector, it is fixed to a conductive land (metal substrate side) integrated with the conductive path via solder or the like. Further, lower layer components such as chip resistors and chip capacitors are connected to the conductive paths via solder.

As will be described later, a conductive land of a semiconductor element to be bonded to the upper substrate is provided in a region where the upper substrate 34 is bonded, and a relatively thin chip resistor, printed resistor and chip capacitor are provided. And the like are electrically fixed to the conductive path 35 and mounted. On the other hand, the substrate 34 of the second layer, which is an insulating substrate, is a so-called flexible substrate made of a polymer material such as, for example, polyimide, polyester, epoxy, or polycarbonate, and a polymer adhesive (liquid, sheet-like). Or a gel-like material). The adhesive used in FIG. 1 was a two-part, room temperature-curable acrylic adhesive (here, a product called Versaloc of Lord Far East Co., Ltd. was used). It has the advantage that it can be adhered even if it is applied to a substrate and bonded. Since it is possible at room temperature, there is no displacement or the like due to expansion of the flexible substrate, and when two liquids are mixed, curing starts from about 5 minutes. However, in this method, adhesion does not start unless both substrates are brought into contact. There is no need to immediately contact both substrates, and there is flexibility in workability.

The insulating substrate 35 has a conductive path bonded in advance, which may be patterned, or a metal having conductive means bonded to the entire surface and patterned later. . However, for the part to be patterned later, the exposed portion after removing the conductive material must be made of a polymer material. If the adhesive material is exposed, the adhesive material is also made of a polymer material. Needs to be
Although the reason will be described later, when the via holes are to be formed by using a laser, they are to be removed by a so-called ablation effect. That is, when a high-intensity ultraviolet laser such as an excimer laser is irradiated on a polymer material, the irradiated portion is instantaneously decomposed and scattered (ablation effect). Further, since the processing start energy differs by one or more digits between the metal and the polymer, the processing can be performed without affecting the conductor.

As described above, the upper insulating substrate 3
4 has an upper conductive path 35 similar to the metal substrate 30 described above.
And an upper conductive land. Further, since the laser has a selectivity of only the polymer based on the threshold difference between the polymer and the metal, the insulating substrate 3 is previously placed in the upper conductive path 35.
If a hole that exposes the hole 4 is provided, only the insulating substrate in the hole portion can be skipped using the mask 35 as a mask.

An upper component is fixed to the upper conductive path 35, and an upper semiconductor element such as a transistor is fixed to the upper conductive land via solder or the like. Further, the upper layer substrate can be mounted on both sides. In this case, the circuits on both sides of the above-described configuration are electrically connected via through holes. Here, the electrical contact of the circuit between the metal substrate 30 and the upper substrate 34 is provided by an upper bonding pad provided on the periphery of the upper substrate 34 and provided in correspondence with the position thereof, and is provided slightly outside the periphery of the upper substrate. This may be achieved by wire bonding between the conductive means exposed at the opening and the conductive means provided on the uppermost layer by the lower bonding pads provided and the thin metal wires connecting between them.

However, wire bonding has a problem that a certain height is required to draw an arc. Also, it is common to achieve a one-layer circuit only with a metal substrate, but crossover occurs as the circuit becomes more complicated, and this is avoided by jumping, but as this jumping increases, A multilayer substrate and via holes are required.

As described above, the lower conductive path 31 is exposed in the hole formed by skipping the insulating substrate 34.
A Cu plating layer 37 is provided on the side surface of the hole 36, and the upper conductive path 35 and the lower conductive path 31 are electrically connected. In order to further enhance the reliability of the plating layer 37, a conductive means 38 such as solder or conductive paste may be provided.

A feature of the present invention is that the metal substrate 30 has a C
A u-sheet 39 is provided. This Cu sheet 39 will be described in detail in a manufacturing process described later,
At the time of plating, it is already bonded, and a new oxidation-free Cu plating layer is formed on the Cu sheet.
Therefore, a member made of Cu such as a radiation fin can be fixed to the Cu sheet via solder, and the solder between the Cu sheet and the Cu member can be heated and melted to improve the thermal bonding.

Finally, the leads are fixed and housed in a box-shaped housing case or the like (not shown in the drawing), and if necessary, a resin is injected and sealed. Subsequently, a method of manufacturing the hybrid integrated circuit device will be briefly described. 2 to 5 illustrate the following manufacturing method, and particularly focus on only the via hole.

First, as shown in FIG. 2, an Al metal substrate 30 whose surface is anodized is prepared, and copper foils 50 and 51 are attached to both surfaces. The thickness 50 is about 10 to 100 μm, which is hot-pressed with an adhesive resin 33 such as a polyimide or an epoxy resin, to form the lower conductive path 31. Also 5
No. 1 does not cause a current to flow, and a Cu sheet may be used as long as Cu only adheres when plating the via hole. When the heat sink is fixed by soldering, the thickness is determined in consideration of these factors. As the adhesive resin, a low heat resistance adhesive mixed with a Si filler or the like may be used to reduce the heat resistance.

Subsequently, as shown in FIG. 3, the copper foil 50 is patterned. Here, the copper foil 5 is also provided on the back surface of the metal substrate 30.
1, the protective film 52 is also attached to the back surface to prevent etching. In a state where the film 52 is bonded, the metal substrate is immersed in, for example, an etching solution of ferric chloride, and only the copper foil 50 is patterned into a predetermined shape, whereby the lower conductive path 31 is formed. Further, as described in the description of the structure, passive elements and active elements are fixed here.

Subsequently, as shown in FIG. 4, an insulating substrate 34 is bonded. Here, the insulating substrate 34 corresponding to the via hole and the lower conductive path may be removed in advance as shown in FIG. However, since the film 52 is bonded to the back surface of the substrate, patterning may be performed later. Further, there is a removal step using a laser. If the lower conductive path corresponding to the hole 36 has been removed in advance, the conductive path can serve as a mask to irradiate laser light. As described above, the insulating film of the polymer material or the adhesive of the polymer material corresponding to the inside of the hole 36 evaporates due to the ablation effect due to the difference in the evaporation threshold energy between the metal and the polymer.

Subsequently, as shown in FIG.
Is removed, plating is performed on the holes, and the lower conductive path 31 is removed.
And the upper conductive path 35 are electrically connected. Here, like the hole 36 in FIG. 4, since the inside of the hole is an insulating film, Cu is first applied by electroless plating, and then electrolytic plating is performed. This step is a feature of the present invention. After forming a via hole, an Al substrate having a Cu sheet previously adhered to the back surface is put into an electroless plating solution, and Cu is plated on the via hole surface. The Al substrate is put in an electrolytic plating solution, and the C
u plating. That is, since there is a Cu sheet, A
1. The elution of the back surface of the substrate can be prevented, and the Cu component to be attached to the back surface of the substrate can be completely adhered because the adherend is Cu of the Cu sheet, and the Cu is peeled off during plating. Can be suppressed. Therefore, the peeled Cu and the eluted Al are not mixed into the plating solution, and the deterioration of the etching solution can be prevented. Therefore, defects such as plating failure and short circuit between circuit wirings due to the peeled Cu can be prevented, and the yield can be improved.

Finally, a step of fixing a heat sink to the upper conductive land and fixing the semiconductor element thereon, a step of mounting a passive element as necessary, a wire bonding step for connecting the conductive element and the conductive path, and There is a soldering step. However, when the semiconductor IC is fixed, the heat sink can be omitted. Further, in consideration of moisture resistance and the like, a gel resin such as silicone or epoxy resin is injected into the case material, and the substrate is sealed to obtain a completed product.

[0024]

As is clear from the above description, the first
In addition, since a Cu sheet on which new Cu is placed during the plating step is provided on the back surface of the metal substrate, a Cu sheet such as a radiation fin is fixed to the Cu sheet via solder. And the Cu member can be improved in thermal coupling.

That is, if the substrate and a Cu member such as a heat sink attached to the substrate are flat, they can be in contact with each other over the entire surface without any space, so that the thermal coupling is good. There is virtually nothing. Therefore, this problem can be solved by performing the bonding via solder. In addition, when the oxide is formed on the Cu sheet itself, the bonding of the solder may not work well. Due to the lamination, the bonding with the Cu member via the solder is improved.

Second, after forming a via hole, an Al substrate having a Cu sheet previously adhered to the back surface is put into an electroless plating solution, Cu is plated on the surface of the via hole, and then the Al substrate is electrolyzed. If it is put in a plating solution and further Cu plating is applied to the Cu plating layer, the elution of the back surface of the Al substrate can be prevented because of the presence of the Cu sheet. C
Since it is u, it can be completely adhered, and peeling of Cu can be suppressed during plating. Therefore, the peeled Cu and the eluted Al are not mixed into the plating solution, and the deterioration of the etching solution can be prevented. Therefore, defects such as plating failure and short circuit between circuit wirings due to the peeled Cu can be prevented, and the yield can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a hybrid integrated circuit device illustrating an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing method of the present invention.

FIG. 3 is a cross-sectional view illustrating a manufacturing method of the present invention.

FIG. 4 is a cross-sectional view illustrating a manufacturing method of the present invention.

FIG. 5 is a cross-sectional view illustrating the manufacturing method of the present invention.

FIG. 6 is a cross-sectional view illustrating a conventional manufacturing method.

FIG. 7 is a cross-sectional view illustrating a conventional manufacturing method.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H05K 1/05 H05K 1/11 H05K 3/46

Claims (2)

(57) [Claims] At least one layer of an insulating substrate made of a polymer material having conductive means is laminated on an Al substrate having conductive means to which circuit elements comprising bare chip semiconductor elements or passive elements are electrically connected. A multilayer integrated circuit device having a multilayer structure, wherein a Cu sheet is attached to the back surface of the Al substrate,
Cu in a via hole formed by plating to achieve connection between the conductive means of the Al substrate and the conductive means of the insulating substrate
Wherein the same material as described above is also provided on the back surface of the Al substrate. 2. An insulating adhesive on the front and back surfaces of an Al substrate.
Adhering a Cu sheet and patterning the Cu sheet on the Al substrate
Is formed on the Al substrate in the form of a chip or a receiving member.
A step of electrically connecting a circuit element comprising a moving element, and a step of electrically connecting a circuit element comprising a chip-like or passive element on the Al substrate. a step of attaching a plurality of insulating substrate made, the step of forming a via hole to realize the connection of the conductive means of the upper insulating substrate and the underlying insulating substrate or upper layer of the insulating substrate and the Al substrate, wherein Put the Al substrate in the electroless plating solution,
Cu on the Cu sheet on the surface and the back of the Al substrate
And placing the Al substrate in an electrolytic plating solution,
The Cu plating is further added on the Cu plating layer on the front surface and the back of the Al substrate.
And a step of performing a locking operation.
Road device manufacturing method .