JP3177893B2 - Surface mount electronic components - Google Patents

Surface mount electronic components

Info

Publication number
JP3177893B2
JP3177893B2 JP22035589A JP22035589A JP3177893B2 JP 3177893 B2 JP3177893 B2 JP 3177893B2 JP 22035589 A JP22035589 A JP 22035589A JP 22035589 A JP22035589 A JP 22035589A JP 3177893 B2 JP3177893 B2 JP 3177893B2
Authority
JP
Japan
Prior art keywords
magnetic
conductors
printed conductors
conductor
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP22035589A
Other languages
Japanese (ja)
Other versions
JPH0384905A (en
Inventor
一弥 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP22035589A priority Critical patent/JP3177893B2/en
Publication of JPH0384905A publication Critical patent/JPH0384905A/en
Application granted granted Critical
Publication of JP3177893B2 publication Critical patent/JP3177893B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は,積層トランスまたは同相型インダクタンス
素子等の表面実装電子部品に関する。
Description: TECHNICAL FIELD The present invention relates to a surface mount electronic component such as a laminated transformer or an in-phase type inductance element.

(従来の技術) 従来の表面実装電子部品の一例としての積層トランス
は,第9図に示す通り,上下の磁性体シート911,912間
に少くとも2つ以上の直線状あるいは蛇行状の印刷導体
913,915をそれぞれ印刷絶縁層914を介し,かつ前記印刷
導体の端部923A,925Aを除いてほぼ重畳して形成し,一
体焼結するとともに前記積層体の端面には前記各導体と
それぞれ接続する膜状の電極端子933A,933B,935A,935B
を設けられていた。
(Prior Art) As shown in FIG. 9, a laminated transformer as an example of a conventional surface mount electronic component includes at least two or more linear or meandering printed conductors between upper and lower magnetic sheets 911 and 912.
Films 913 and 915 are formed so as to be substantially overlapped with each other with the printed insulating layer 914 interposed therebetween and excluding the end portions 923A and 925A of the printed conductor. Electrode terminals 933A, 933B, 935A, 935B
Was provided.

(発明が解決しようとする課題) しかしながら,前述した従来のトランスの構成,前記
複数の印刷導体層は構造上一回路一層である。そのた
め,電流容量の増大を図ることができない他,前記印刷
導体層相互間の距離を小さくすることは難しく,導体に
流れる電流による磁路のうち印刷導体相互間の磁路部の
磁気抵抗が低下して漏洩インダクタンス成分が増大す
る。その結果,トランスとしての変換効率が大幅に低下
するという致命的な欠陥があった。
(Problems to be Solved by the Invention) However, the configuration of the conventional transformer described above and the plurality of printed conductor layers are one circuit in structure. Therefore, the current capacity cannot be increased, and it is difficult to reduce the distance between the printed conductor layers, and the magnetic resistance of the magnetic path portion between the printed conductors among the magnetic paths due to the current flowing through the conductors is reduced. As a result, the leakage inductance component increases. As a result, there is a fatal defect that the conversion efficiency as a transformer is greatly reduced.

そこで,本発明の技術的課題は,かかる従来技術の欠
点を除去して高性能な表面実装電子部品を提供すること
にある。
Therefore, a technical object of the present invention is to provide a high-performance surface-mounted electronic component by eliminating the disadvantages of the conventional technology.

(課題を解決するための手段) 本発明によれば、焼結されて一体化された上下の磁性
体部と、該磁性体部間に互いに重畳する位置関係をもっ
て介在した複数の印刷導体と、該印刷導体間を絶縁する
ために上記複数の印刷導体の夫々の間に介在した印刷絶
縁磁性体層とを含み、上記複数の印刷導体は、上下に分
かれた複数の端部印刷導体と中間に位置した複数の中間
印刷導体とよりなり、前記複数の端部印刷導体同士及び
前記複数のた複数の中間印刷導体とよりなり、前記複数
の端部印刷導体同士及び前記複数の中間印刷導体同士を
上記上下の磁性体部の端面で別々に複数の膜状の電極端
子により、上記複数の端部印刷導体同士が互いに並列で
かつ上記複数の中間印刷導体同士が互いに並列であるよ
うに、接続したことを特徴とする表面実装電子部品が得
られる。
(Means for Solving the Problems) According to the present invention, upper and lower magnetic portions sintered and integrated with each other, a plurality of printed conductors interposed between the magnetic portions with a positional relationship overlapping each other, A printed insulating magnetic layer interposed between each of the plurality of printed conductors to insulate the printed conductors, wherein the plurality of printed conductors are intermediately disposed with a plurality of vertically separated end printed conductors. Consists of a plurality of intermediate printed conductors located, the plurality of end printed conductors and the plurality of intermediate printed conductors, the plurality of end printed conductors and the plurality of intermediate printed conductors By a plurality of film-shaped electrode terminals separately at the end faces of the upper and lower magnetic portions, the plurality of end printed conductors were connected in parallel with each other and the plurality of intermediate printed conductors were connected in parallel with each other. Surface mount device characterized by the following: A child part is obtained.

(実施例) 本発明の実施例を以下図面を参照して詳細に説明す
る。
Embodiment An embodiment of the present invention will be described below in detail with reference to the drawings.

第1図,第2図,及び第3図は本発明の第1の実施例
による表面実装電子部品の一つである積層トランスを示
し,簡単のため連結状ではなく1個分の構成図としてい
る。
FIGS. 1, 2 and 3 show a laminated transformer which is one of the surface mount electronic components according to the first embodiment of the present invention. I have.

第1図において,生状態の絶縁性フェライト粉末と適
宜な結合樹脂との混練によって生成される第1の磁性体
シート11上にAg或いはAg合金ペーストなどの高融点金属
ペーストを用いて端部を除き,磁性体シート11のほぼ中
央部に位置する第1の直線導体13を印刷する。次いで第
1の直線導体13と端部を除いて積層方向に重畳する第2
の導体15との対向面を少なくとも含むう様に,前記絶縁
性フェライト粉末と適宜な結合樹脂とを混練した絶縁磁
性体ペーストによって第1の絶縁磁性体層14を印刷す
る。更に第2の導体15を同様に印刷形成した後,第1の
絶縁磁性体層14と同様の第2の絶縁磁性体層16を印刷す
る。同様に第3の導体15′,第3の絶縁磁性体層17,及
び第4の導体13′を印刷形成する。その後,第1の磁性
体シート11と同様の第2の磁性体シート12を重畳して第
2図に示す如き積層体が,第1,第2,第3及び第4の導体
13,15,15′,13′の端部を除いて包含する閉磁路形の積
層体を形成する。次いで,前記積層体を適宜な温度にて
一体焼結する。この結果,第1及び第2の磁性体シート
11,12は,焼結されて一体化された上下2つの磁性体部
となる。その後、磁性体部の端面に第1,第2,第3及び第
4の導体13,15,15′,13′とそれぞれ接続される第3図
に示す如き膜状の電極端子35A,35B,33A,33Bを焼き付け
或いはメッキ等にて設ける。第4図に示される等価回路
のように,電子回路内の面実装に好適で高周波に対応可
能な積層トランスが簡素かつ高性能に構成される。
In FIG. 1, an end is formed on a first magnetic sheet 11 formed by kneading a raw insulating ferrite powder and an appropriate binder resin by using a high melting point metal paste such as Ag or Ag alloy paste. Except for this, the first straight conductor 13 located substantially at the center of the magnetic sheet 11 is printed. Next, the second linear conductor 13 is overlapped with the first straight conductor 13 in the laminating direction except for the end portion.
The first insulating magnetic layer 14 is printed using an insulating magnetic paste obtained by kneading the insulating ferrite powder and an appropriate binder resin so as to include at least the surface facing the conductor 15. Further, after the second conductor 15 is similarly formed by printing, a second insulating magnetic layer 16 similar to the first insulating magnetic layer 14 is printed. Similarly, the third conductor 15 ', the third insulating magnetic layer 17, and the fourth conductor 13' are formed by printing. After that, a second magnetic sheet 12 similar to the first magnetic sheet 11 is superimposed to form a laminate as shown in FIG. 2 to form the first, second, third and fourth conductors.
A closed-magnetic-path-type laminate is formed including the end portions of 13,15,15 'and 13'. Next, the laminate is integrally sintered at an appropriate temperature. As a result, the first and second magnetic sheets
The upper and lower magnetic members 11 and 12 are sintered and integrated. Thereafter, the film-shaped electrode terminals 35A, 35B, as shown in FIG. 3 connected to the first, second, third, and fourth conductors 13, 15, 15 ', 13' on the end surfaces of the magnetic body, respectively. 33A and 33B are provided by baking or plating. As in the equivalent circuit shown in FIG. 4, a laminated transformer suitable for surface mounting in an electronic circuit and capable of handling high frequencies is configured simply and with high performance.

つまり,導体の始端と終端とは対向面に位置し,かつ
直線導体であるため寄生容量を低減して自己共振周波数
の低下を大幅に抑制することができる。しかも第1,第2,
第3及び第4のそれぞれ1次側と2次側とを交互に積層
した導体に流れる電流によって生じる磁路のうち漏洩イ
ンダクタンス分として作用する導体相互間の磁路成分に
ついて述べる。前記導体相互が微薄な絶縁磁性体層を介
して積層方向にほぼ重畳する構成であるため,十分な導
体間絶縁耐力を確保しつつ,導体相互間部の磁気抵抗値
が前記4組の導体を包含する外周の上下2つの磁性体部
の主磁気抵抗値に比して大きくとれる。この結果,トラ
ンスとしての結合係数の低下を大幅に抑制することがで
き,高周波対応に適し高性能なつまり高結合係数トラン
スを簡素な工程で安価に構成できる。
That is, since the start and end of the conductor are located on the opposing surfaces and are linear conductors, the parasitic capacitance can be reduced and the decrease in the self-resonant frequency can be greatly suppressed. Moreover, the first, second,
A description will be given of a magnetic path component between conductors acting as a leakage inductance component among magnetic paths generated by a current flowing through a conductor in which third and fourth primary sides and secondary sides are alternately stacked. Since the conductors substantially overlap each other in the laminating direction with a thin insulating magnetic layer interposed therebetween, the magnetic resistance of the conductor-to-conductor portion is reduced by the four sets of conductors while ensuring a sufficient dielectric strength between conductors. It can be larger than the main magnetic resistance of the upper and lower two magnetic portions on the outer circumference that is included. As a result, a reduction in the coupling coefficient of the transformer can be significantly suppressed, and a high-performance, high-coupling-coefficient transformer suitable for high-frequency operation can be constructed at a low cost by a simple process.

第5図,第6図,第7図は本発明の第2の実施例によ
る積層トランスを示すものであり,前例と同様に連結状
としてではなく1個分の構成を示しており,第1の実施
例が,直線導体の2回路1組で1次側と2次側とを交互
に積層した構成に対して蛇行導体による構成を示してい
る。
FIGS. 5, 6, and 7 show a laminated transformer according to a second embodiment of the present invention. As shown in FIG. This embodiment shows a meandering conductor configuration in contrast to a configuration in which the primary side and the secondary side are alternately stacked in one set of two circuits of linear conductors.

以下その詳細について述べる。第1の実施例と同様に
第5図における絶縁性フェライトによる生状態の磁性体
シート51上に蛇行する第5の導体53を前記高融点金属ペ
ーストを用いて印刷形成する。次いで絶縁磁性体層54を
前記磁性絶縁体ペーストを用いて印刷積層し,さらに同
様に第6の蛇行導体55,磁性絶縁体層56,第7の蛇行導体
55′,磁性絶縁体層57,第8の蛇行導体53′を順次積層
印刷する。最後に磁性体シート52を重畳させて,上記4
つの蛇行導体部がそれぞれ磁性体絶縁体層を介して重畳
する第6図に示す如き閉磁路形の積層体を形成する。以
下に同様に一体焼結して第7図に示す如き各導体に接続
する膜状の端子73A,73B,75A,75Bを設けて第8図の等価
回路に示される2回路形の面実装に適した積層トランス
を形成する。
The details will be described below. Similarly to the first embodiment, a meandering fifth conductor 53 is printed on the raw magnetic sheet 51 made of insulating ferrite in FIG. 5 by using the refractory metal paste. Next, an insulating magnetic layer 54 is printed and laminated using the magnetic insulating paste, and the sixth meandering conductor 55, the magnetic insulator layer 56, and the seventh meandering conductor are similarly formed.
55 ', the magnetic insulator layer 57, and the eighth meandering conductor 53' are sequentially laminated and printed. Finally, the magnetic sheet 52 is superimposed, and
As shown in FIG. 6, the two meandering conductor portions overlap each other via the magnetic insulator layer to form a closed magnetic circuit type laminate. Similarly, film-like terminals 73A, 73B, 75A, and 75B connected to the respective conductors as shown in FIG. 7 are provided by integrally sintering to form a two-circuit type surface mount shown in the equivalent circuit of FIG. Form a suitable laminated transformer.

本実施例による閉磁路形の構成において,対向端面間
における蛇行導体を形成することによって,各端子間に
生ずるインダクタンス値或いはインピーダンス値を前例
の直線導体に比して十分高めることが出来る。
In the configuration of the closed magnetic circuit type according to the present embodiment, by forming the meandering conductor between the opposed end faces, the inductance value or the impedance value generated between the terminals can be sufficiently increased as compared with the straight conductor of the previous example.

また,1次側の導体で2次側の導体をもしくは2次側の
導体で1次側の導体をはさみこむように積層し,その蛇
行導体間に介在する前記絶縁体層は前記磁性絶縁体ペー
ストの印刷であるから,54,56,57の如く磁性絶縁体層の
大きさは磁性体シートと等大であっても閉磁路構成上何
等支障なく、前述した如く各導体間の絶縁耐力を確保し
ながら,漏洩インダクタンス成分を十分に低減できるた
め,励磁インダクタンスが高くしかも高結合係数を有す
る積層トランスが得られる。
Also, the secondary conductor is sandwiched between the primary conductors or the primary conductor is sandwiched between the secondary conductors, and the insulating layer interposed between the meandering conductors is the magnetic insulating paste. Since the size of the magnetic insulator layer is the same as that of the magnetic sheet, such as 54, 56, and 57, no problem occurs in the closed magnetic circuit configuration, and the dielectric strength between conductors is secured as described above. However, since the leakage inductance component can be sufficiently reduced, a multilayer transformer having a high excitation inductance and a high coupling coefficient can be obtained.

なお,実施例では2回路の導体を有した積層トランス
について述べたが,同相形インダクタも同様にして得る
ことができる。
In the embodiment, the laminated transformer having two conductors is described, but an in-phase inductor can be obtained in the same manner.

また,上下2つの磁性体シートは印刷によって形成し
ても,ドクタブレード法によって形成してもよい。
The upper and lower magnetic sheets may be formed by printing or by a doctor blade method.

(発明の効果) 以上の通り本発明による表面実装電子部品によれば,
電流容量の増大を図ることができるとともに,簡素な構
成にて所要工程数も極めて少なく安価に製造できる。ま
た、上下に分かれた複数の端部印刷導体同士と中間に位
置した複数の中間印刷導体同士とを異なる電極端子に接
続した構成であるため、印刷導体間の等価浮遊容量を小
さくでき、したがって高周波特性の優れたトランスまた
はインダクタンス素子を提供できる。さらに、低漏洩イ
ンダクタンス形で等価浮遊容量を小さくできるため,変
換効率の高いものが得られる。従って,高周波帯域に対
応可能に実現でき,工業的に益すること極めて大なるも
のと言える。
(Effect of the Invention) As described above, according to the surface mount electronic component of the present invention,
The current capacity can be increased, and the number of required steps can be reduced with a simple configuration and the manufacturing cost can be reduced. In addition, since a plurality of vertically separated end printed conductors and a plurality of intermediate printed conductors positioned in the middle are connected to different electrode terminals, the equivalent stray capacitance between the printed conductors can be reduced, and therefore high frequency A transformer or an inductance element having excellent characteristics can be provided. Furthermore, since the equivalent stray capacitance can be reduced with the low leakage inductance type, a device with high conversion efficiency can be obtained. Therefore, it can be said that it can be realized to correspond to a high frequency band, and that the industrial benefit is extremely great.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の第1の実施例による表面実装電子部品
としての積層トランスの構成を説明するための分解斜視
図、第2図は第1図の積層トランスの電極端子取付前の
外観図,第3図は本発明の第1の実施例による表面実装
電子部品としての積層トランスの外観図,第4図は第3
図の積層トランスの等価回路図,第5図は本発明の第2
の実施例による表面実装電子部品としての積層トランス
の構成を説明するための分解斜視図,第6図は第5図の
積層トランスの電極端子取付前の外観図,第7図は本発
明の第2の実施例による表面実装電子部品としての積層
トランスの外観図、第8図は第7図の積層トランスの等
価回路図,第9図(a)は従来の表面実装電子部品とし
ての積層トランスの構成を説明するための分解斜視図、
第9図(b)は第9図(a)の積層トランスの電極端子
取付前の外観図,第9図(c)は従来の表面実装電子部
品としての積層トランスの外観図である。 図中, 11,12……磁性体シート,13,13′15,15′……導体,14,1
6,17……絶縁体層,23A,23A′,25A,25A′……導体,33A,3
3B,35A,35A′……電極端子,43A,43B,45A,45B……電極端
子,51,52……磁性体シート,53,53′,55,55′……導体,5
4,56,57……絶縁磁性体層,63A,63A′,65A,65A′……導
体,73A,73B,75A,75B……電極端子,83A,83B,85A,85B……
電極端子。
FIG. 1 is an exploded perspective view for explaining the configuration of a laminated transformer as a surface mount electronic component according to a first embodiment of the present invention, and FIG. 2 is an external view of the laminated transformer of FIG. 1 before electrode terminals are attached. 3 is an external view of a laminated transformer as a surface mount electronic component according to the first embodiment of the present invention, and FIG.
5 is an equivalent circuit diagram of the laminated transformer shown in FIG.
FIG. 6 is an exploded perspective view for explaining the configuration of a laminated transformer as a surface mount electronic component according to the embodiment of the present invention, FIG. 6 is an external view of the laminated transformer of FIG. 5 before electrode terminals are attached, and FIG. 8 is an external view of a laminated transformer as a surface mounted electronic component according to the second embodiment, FIG. 8 is an equivalent circuit diagram of the laminated transformer of FIG. 7, and FIG. 9 (a) is a diagram of a conventional laminated transformer as a surface mounted electronic component. Exploded perspective view for explaining the configuration,
FIG. 9 (b) is an external view of the multilayer transformer of FIG. 9 (a) before electrode terminals are mounted, and FIG. 9 (c) is an external view of a conventional multilayer transformer as a surface mount electronic component. In the figure, 11,12 ... magnetic sheet, 13,13'15,15 '... conductor, 14,1
6,17 …… Insulator layer, 23A, 23A ′, 25A, 25A ′ …… Conductor, 33A, 3
3B, 35A, 35A '... electrode terminal, 43A, 43B, 45A, 45B ... electrode terminal, 51, 52 ... magnetic sheet, 53, 53', 55, 55 '... conductor, 5
4,56,57 …… Insulating magnetic layer, 63A, 63A ′, 65A, 65A ′ …… Conductor, 73A, 73B, 75A, 75B …… Electrode terminal, 83A, 83B, 85A, 85B ……
Electrode terminal.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−79307(JP,A) 特開 昭58−89819(JP,A) 特開 昭59−229808(JP,A) 特開 昭51−81933(JP,A) 実開 昭57−6216(JP,U) 実開 昭62−26010(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01F 17/00 H01F 15/10 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-79307 (JP, A) JP-A-58-89819 (JP, A) JP-A-59-229808 (JP, A) JP-A-51- 81933 (JP, A) Japanese Utility Model Showa 57-6216 (JP, U) Japanese Utility Model Showa 62-2610 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H01F 17/00 H01F 15 /Ten

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】焼結されて一体化された上下の磁性体部
と、該磁性体部間に互いに重畳する位置関係をもって介
在した複数の印刷導体と、該印刷導体間を絶縁するため
に上記複数の印刷導体の夫々の間に介在した印刷絶縁磁
性体層とを含み、上記複数の印刷導体は、上下に分かれ
た複数の端部印刷導体と中間に位置した複数の中間印刷
導体とよりなり、上記複数の端部印刷導体同士及び上記
複数の中間印刷導体同士を上記上下の磁性体部の端面で
別々に複数の膜状の電極端子により、上記複数の端部印
刷導体同士が互いに並列でかつ上記複数の中間印刷導体
同士が互いに並列であるように、接続したことを特徴と
する表面実装電子部品。
An upper and lower magnetic body portion that is sintered and integrated, a plurality of printed conductors interposed between the magnetic body portions with a positional relationship overlapping each other; A printed insulating magnetic layer interposed between each of the plurality of printed conductors, wherein the plurality of printed conductors comprises a plurality of vertically separated end printed conductors and a plurality of intermediate printed conductors positioned in the middle. The plurality of end printed conductors and the plurality of intermediate printed conductors are separated from each other at the end faces of the upper and lower magnetic portions by a plurality of film-shaped electrode terminals. A surface-mounted electronic component, wherein the plurality of intermediate printed conductors are connected so as to be in parallel with each other.
JP22035589A 1989-08-29 1989-08-29 Surface mount electronic components Expired - Fee Related JP3177893B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22035589A JP3177893B2 (en) 1989-08-29 1989-08-29 Surface mount electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22035589A JP3177893B2 (en) 1989-08-29 1989-08-29 Surface mount electronic components

Publications (2)

Publication Number Publication Date
JPH0384905A JPH0384905A (en) 1991-04-10
JP3177893B2 true JP3177893B2 (en) 2001-06-18

Family

ID=16749840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22035589A Expired - Fee Related JP3177893B2 (en) 1989-08-29 1989-08-29 Surface mount electronic components

Country Status (1)

Country Link
JP (1) JP3177893B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2580637Y2 (en) * 1992-02-28 1998-09-10 京セラ株式会社 Coil parts
CN207895966U (en) 2015-05-28 2018-09-21 株式会社村田制作所 Inductor module and electrical power transmission system
WO2016190290A1 (en) 2015-05-28 2016-12-01 株式会社村田製作所 Current detection element, power transmitting device, and power transmitting system
WO2023136036A1 (en) * 2022-01-14 2023-07-20 株式会社村田製作所 Chip inductor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6379307A (en) * 1986-09-22 1988-04-09 Murata Mfg Co Ltd Moltilayered transformer

Also Published As

Publication number Publication date
JPH0384905A (en) 1991-04-10

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