JP3155670B2 - Manufacturing method of magnetoelectric conversion element - Google Patents

Manufacturing method of magnetoelectric conversion element

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Publication number
JP3155670B2
JP3155670B2 JP24622394A JP24622394A JP3155670B2 JP 3155670 B2 JP3155670 B2 JP 3155670B2 JP 24622394 A JP24622394 A JP 24622394A JP 24622394 A JP24622394 A JP 24622394A JP 3155670 B2 JP3155670 B2 JP 3155670B2
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Prior art keywords
thin film
insb
substrate
excess
indium
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JPH08109468A (en
Inventor
敏昭 福中
雄毅 松居
健司 甲斐
秀輝 荒木
富士美 熊沢
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旭化成電子株式会社
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、磁電変換素子の製造方
法に関し、さらに詳しくは信頼性に優れたインジウムア
ンチモン系磁電変換素子の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a magnetoelectric conversion element, and more particularly to a method for manufacturing an indium-antimony-based magnetoelectric conversion element having excellent reliability.

【0002】[0002]

【従来の技術】インジウムアンチモン(以下InSbと
略す)は、他の化合物半導体、例えばインジウム砒素
(InAs、移動度30,000cm2 /V/sec)
やガリウム砒素(GaAs、移動度7,000cm2
V/sec)に比べて非常に高い電子移動度(78,0
00cm2 /V/sec)を有するため、磁電変換素子
の素材として好適であることが知られている。ここで、
磁電変換素子としては、VTR、フロッピディスクやC
D−ROM等のドライブモータ用の回転位置検出センサ
として用いられるホール素子;ポテンショメータ、歯車
の回転検出センサあるいは紙幣に塗られている磁気イン
クパターンを検出する紙幣認識用磁気センサとして用い
られる半導体磁気抵抗素子などを挙げることができる。
2. Description of the Related Art Indium antimony (hereinafter abbreviated as InSb) is a compound semiconductor such as indium arsenide (InAs, mobility 30,000 cm 2 / V / sec).
Gallium arsenide (GaAs, mobility 7,000 cm 2 /
V / sec), which is much higher than the electron mobility (78,0).
(00 cm 2 / V / sec), it is known that it is suitable as a material for a magnetoelectric conversion element. here,
VTR, floppy disk, C
Hall elements used as rotational position detection sensors for drive motors such as D-ROMs; semiconductor magnetoresistors used as potentiometers, rotation detection sensors for gears, or magnetic sensors for banknote recognition for detecting magnetic ink patterns applied to banknotes And the like.

【0003】InSbを素材として用いた磁電変換素子
がセンサとして機能するためには、実用上の抵抗値を確
保するため、InSbを厚さ1μm程度に薄膜化する必
要がある。
In order for a magnetoelectric conversion element using InSb as a material to function as a sensor, it is necessary to reduce the thickness of InSb to about 1 μm in order to secure a practical resistance value.

【0004】また、InSbの高感度な特性を用いるた
めには、薄膜化すると同時に高い電子移動度を確保する
必要がある。この要求に応じる一つの方法としては、単
結晶を切り出し研磨して薄膜化する方法がある。しかし
ながら、この方法によるとほぼ単結晶なみの電子移動度
が確保できるものの、所望の厚さ1μm程度の薄膜を均
一につくることは困難である。また、この方法ではコス
トが非常に高いという問題がある。
Further, in order to use the high sensitivity characteristics of InSb, it is necessary to secure high electron mobility at the same time as thinning the film. One method to meet this demand is to cut out a single crystal and polish it to form a thin film. However, according to this method, although electron mobility comparable to that of a single crystal can be secured, it is difficult to uniformly form a desired thin film having a thickness of about 1 μm. In addition, this method has a problem that the cost is very high.

【0005】そこで、量産化可能で、かつ所望の特性を
得ることができるInSbの薄膜化方法が種々検討され
ている。例えば、特公昭51−45234号公報には、
いわゆる転写法が示されている。すなわち、雲母等の結
晶性基板上にInSb薄膜を蒸着により形成した後、こ
の薄膜をエポキシ樹脂などの接着剤を用いて別の絶縁性
基板に接着し、次いで結晶性基板を除去するというもの
である。この場合、結晶性基板を用いるので、蒸着条件
を選べばかなり高い移動度で所望の膜厚のInSb薄膜
が量産性よく形成できるというメリットがある。
Accordingly, various methods for thinning InSb that can be mass-produced and obtain desired characteristics have been studied. For example, Japanese Patent Publication No. 51-45234 discloses that
A so-called transfer method is shown. That is, after forming an InSb thin film on a crystalline substrate such as mica by vapor deposition, this thin film is bonded to another insulating substrate using an adhesive such as an epoxy resin, and then the crystalline substrate is removed. is there. In this case, since a crystalline substrate is used, there is an advantage that an InSb thin film having a desired film thickness can be formed with a relatively high mobility and good mass productivity if the deposition conditions are selected.

【0006】また、本発明者らは、高移動度InSb薄
膜形成のための条件を種々提案してきた。特公平1−1
3211号公報では、InのSbに対する原子比が1.
0ではなく、1.1〜1.7という過剰のInとするこ
とが、高移動度InSb薄膜形成のための必要条件であ
ることを明らかにした。さらに、基板温度、InとSb
とのフラックス等の高移動度化のための他の必要条件を
明らかにした(特公平1−13211号公報、特公平1
−15135号公報、特公平2−47849号公報、特
公平3−59571号公報参照)。このようにして、I
nを著しく過剰にして移動度が極めて高い、例えば6
0,000cm2 /V/secにも達する薄膜を作成す
ることができる。そして、このような薄膜を樹脂を介し
て、例えばフェライト、セラミックスのような別の絶縁
性基板に転写し、パターニング、組立てを行うことによ
り、ホール素子や半導体磁気抵抗素子を作成した。
Further, the present inventors have proposed various conditions for forming a high mobility InSb thin film. Tokuhei 1-1
In JP 3211, the atomic ratio of In to Sb is 1.
It has been clarified that an excess of In of 1.1 to 1.7 instead of 0 is a necessary condition for forming a high mobility InSb thin film. Further, the substrate temperature, In and Sb
And other necessary conditions for increasing the mobility such as flux (Japanese Patent Publication No. 1-13211, Japanese Patent Publication No.
No. 15135, Japanese Patent Publication No. 2-47849, Japanese Patent Publication No. 3-59571). Thus, I
The mobility is extremely high, for example, 6
A thin film that reaches as much as 000 cm 2 / V / sec can be formed. Then, such a thin film was transferred to another insulating substrate such as ferrite or ceramic via a resin, and was patterned and assembled, whereby a Hall element and a semiconductor magnetoresistive element were formed.

【0007】一方、特開昭59−202674号公報に
は、InのSbに対する原子比が、1.1〜1.7の範
囲にあるInSb系複合結晶薄膜を蒸着により形成さ
せ、次いでSbを蒸着して、最終的に原子比が1.0に
近い薄膜とすることが示されている。つまり、予め過剰
のInを含むInSb系複合結晶薄膜を作成し、次いで
単体In量を減少させることにより、ホール係数が高
く、高抵抗の磁電変換素子が作成できることが示されて
いる。
On the other hand, Japanese Patent Application Laid-Open No. 59-202677 discloses that an InSb-based composite crystal thin film having an atomic ratio of In to Sb in the range of 1.1 to 1.7 is formed by vapor deposition, and then Sb is vapor-deposited. Finally, it is shown that a thin film having an atomic ratio close to 1.0 is obtained. In other words, it is shown that by preparing an InSb-based composite crystal thin film containing excess In in advance and then reducing the amount of single In, a magneto-electric conversion element having a high Hall coefficient and high resistance can be formed.

【0008】[0008]

【発明が解決しようとする課題】ところが、このような
薄膜を用いた場合、実用上の信頼性を確保するため、特
に耐湿性を向上させるため、パッケージ用の樹脂と薄膜
の間にパッシベーション層、例えばアルミナ薄膜を形成
するという付加的な処置を施す必要があった。
However, when such a thin film is used, a passivation layer is provided between the package resin and the thin film in order to secure practical reliability, and particularly to improve moisture resistance. For example, it was necessary to take an additional step of forming an alumina thin film.

【0009】本発明者らは、かかる信頼性の問題をさら
に詳しく検討してきたが、基本的には蒸着薄膜にかかわ
るものであることを究明するに到った。
The inventors of the present invention have studied the reliability problem in more detail, but have come to find that the problem is basically related to a deposited thin film.

【0010】ホール素子の場合は転写の前にアルミナを
蒸着することにより、耐湿性等の信頼性を確保すること
ができたが、半導体磁気抵抗素子の場合は感度が特に重
視される関係で、アルミナ蒸着を行わず、湿度進入の防
止処理を施す必要がある。
In the case of the Hall element, the reliability such as moisture resistance can be secured by evaporating alumina before the transfer, but in the case of the semiconductor magnetoresistive element, the sensitivity is particularly important. It is necessary to perform a treatment for preventing humidity from entering without performing alumina deposition.

【0011】一方、技術の発達と共に、信頼性の要求レ
ベルが高くなり、また、コストダウンの要請があるの
で、複雑な工程を導入することなく、つまりアルミナを
蒸着することなく、高い信頼性を有する素子を製造する
ことが求められてきた。
On the other hand, with the development of technology, the required level of reliability has been increased, and there has been a demand for cost reduction. Therefore, high reliability can be achieved without introducing complicated steps, that is, without depositing alumina. It has been demanded to manufacture an element having the same.

【0012】本発明は、以上の事情に鑑み、信頼性の高
い磁電変換素子を作成することができる磁電変換素子の
製造方法を提供することにある。
The present invention has been made in view of the above circumstances, and has as its object to provide a method of manufacturing a magnetoelectric conversion element capable of producing a highly reliable magnetoelectric conversion element.

【0013】[0013]

【課題を解決するための手段】本発明は、InSb自体
は酸化されにくい非常に安定した化合物であり、信頼性
を悪くする要因は過剰の単体Inであり、過剰の単体I
nを無くすことができること、そして、そのようにして
作った薄膜を用いれば何等別の処理をしなくても信頼性
が非常に向上した素子を作ることができることを見いだ
し本発明を完成するに到った。
According to the present invention, InSb itself is a very stable compound that is difficult to be oxidized, and the factor that degrades the reliability is excessive elemental In and excessive elemental In.
n can be eliminated, and the use of the thin film formed in this way makes it possible to produce a device with extremely improved reliability without any other processing. Was.

【0014】すなわち本発明は、基板上に、インジウム
アンチモン(InSb)化合物の結晶と単体インジウム
(In)との複合結晶からなり、かつ全インジウム(I
n)のアンチモン(Sb)に対する原子比が1.1〜
1.7の範囲にあるインジウムアンチモン(InSb)
複合結晶薄膜を蒸着により形成し、次いで、残りのイン
ジウム(In)をインジウムアンチモン(InSb)化
するに必要な量よりも2倍以上の過剰なアンチモン(S
b)を、アンチモン(Sb)の再蒸発が起こる以上の基
板温度で蒸着することを特徴とする磁電変換素子の製造
方法にある。
That is, according to the present invention, a composite crystal of a crystal of an indium antimony (InSb) compound and a simple element of indium (In) is provided on a substrate, and all the indium (I)
The atomic ratio of n) to antimony (Sb) is 1.1 to 1.1.
Indium antimony (InSb) in the range of 1.7
A composite crystal thin film is formed by vapor deposition, and then the excess amount of antimony (S) is twice or more the amount required to convert the remaining indium (In) into indium antimony (InSb).
b) vapor-depositing at a substrate temperature higher than that at which re-evaporation of antimony (Sb) occurs.

【0015】本発明に用いる基板は、InSbの結晶を
よく成長させ、しかもInSb薄膜が強く付着しないで
すぐ後で剥離できる雲母が好ましい。
The substrate used in the present invention is preferably a mica that allows the InSb crystal to grow well and that can be peeled immediately after the InSb thin film does not strongly adhere.

【0016】この基板上にInSb薄膜を形成するため
には、通常蒸着、分子線エピタキシー(MBE)、スパ
ッタリング等の蒸着法が用いることができる。この際、
実用特性の点から薄膜の厚みは0.1〜2μmの範囲が
好適である。
In order to form an InSb thin film on this substrate, a vapor deposition method such as ordinary vapor deposition, molecular beam epitaxy (MBE), and sputtering can be used. On this occasion,
From the viewpoint of practical characteristics, the thickness of the thin film is preferably in the range of 0.1 to 2 μm.

【0017】本発明においては、まず、InSb系薄膜
におけるInSb中のInと単体Inとの合計InのS
bに対する原子比が1.1〜1.7の範囲になるように
制御することが必要である。この範囲は、範囲外のもの
に比べて特に高い移動度を示し、実用的な特性の薄膜を
形成し得るものである。原子比が1.1未満の場合に
は、脆い薄膜しか得られず、結晶性も悪くてノイズも大
きい。また、1.7を越えるとピンホールが生じ収率の
低下をもらす。特に好ましい原子比は、1.2〜1.6
の範囲であって、この範囲内では薄膜の結晶性がよく、
かつ高移動度である上に、ノイズレベルの低い均一性の
よいものとなる。
In the present invention, first, in the InSb-based thin film, the total In of S and In in InSb and S
It is necessary to control so that the atomic ratio to b is in the range of 1.1 to 1.7. This range shows a particularly high mobility as compared with those outside the range, and can form a thin film having practical characteristics. When the atomic ratio is less than 1.1, only a brittle thin film is obtained, and the crystallinity is poor and the noise is large. On the other hand, when the ratio exceeds 1.7, pinholes are generated, and the yield is reduced. A particularly preferred atomic ratio is 1.2 to 1.6.
In this range, the crystallinity of the thin film is good,
In addition to the high mobility, the noise level is low and the uniformity is good.

【0018】InSb系複合結晶薄膜を形成させる方法
として本発明者らが先に提案した方法(特公平1−13
211号公報、特公平2−47849号公報、特公平3
−59571号公報)に基づき、InおよびSbの飛量
と基板温度とを別々に制御する蒸着手段を用いることが
できる。特に高い移動度を有する薄膜を得るためには、
基板温度の上昇などの手段が有用である。
As a method of forming an InSb-based composite crystal thin film, a method proposed by the present inventors (JP-B 1-13).
No. 211, Japanese Patent Publication No. 2-47849, Japanese Patent Publication No. 3
No. 59571), it is possible to use vapor deposition means for separately controlling the flying amounts of In and Sb and the substrate temperature. In order to obtain a thin film with particularly high mobility,
Means such as raising the substrate temperature are useful.

【0019】例えば、特公平3−59571号公報によ
ると、InとSbとの平均原子比を1.1〜1.7の範
囲に蒸着させるに際し、蒸着初期におけるSbに対する
Inの到達速度比を1.0以下とし、かつ基板温度(絶
対温度)Tを以下の式の範囲に入るように選択した場
合、特に高移動度のInSb系複合薄膜が得られる。
For example, according to Japanese Patent Publication No. 3-59571, when the average atomic ratio of In to Sb is vapor-deposited in the range of 1.1 to 1.7, the arrival speed ratio of In to Sb in the initial stage of vapor deposition is 1 0.0 or less, and when the substrate temperature (absolute temperature) T is selected so as to fall within the range of the following equation, a high mobility InSb-based composite thin film can be obtained.

【0020】[0020]

【数1】Tc ≦ T ≦ Tc+30 ここに、Tcは、下記式で与えられる境界の基板温度T
cである。
Tc ≦ T ≦ Tc + 30 where Tc is the substrate temperature T at the boundary given by the following equation.
c.

【0021】[0021]

【数2】1/Tc=1.29×10-3−3.84×10
-5logP (Tcは境界の基板温度(絶対温度)、Pは蒸着中の真
空度(Torr)) この段階で、形成されたInSb系複合結晶薄膜は、I
nSbの膜面にInSb膜内から析出した単体Inが分
布している形態となっている。
1 / Tc = 1.29 × 10 −3 −3.84 × 10
-5 logP (Tc is the substrate temperature at the boundary (absolute temperature), P is the degree of vacuum during deposition (Torr)) At this stage, the InSb-based composite crystal thin film
In this embodiment, simple In deposited from the inside of the InSb film is distributed on the nSb film surface.

【0022】次に、このInが極めて過剰であるInS
b系複合結晶薄膜に、さらに、単体InをInSb化す
るに必要な量よりも2倍以上過剰の、より好ましくは4
倍以上のSbを、Sbの再蒸発が起こる以上の基板温度
で蒸着する。この結果、複合結晶中の単体InがInS
bとなるが、移動度は高いまま保たれる。2倍未満であ
るとInが残ってしまい、後でアルミナを蒸着する方式
の場合以上の信頼性を確保することができない。
Next, InS in which In is extremely excessive
In the b-type composite crystal thin film, an excess of at least 2 times, more preferably, 4 times more than the amount required to convert the single In into InSb.
More than twice the amount of Sb is deposited at a substrate temperature higher than that at which re-evaporation of Sb occurs. As a result, the single element In in the composite crystal becomes InS
b, but the mobility is kept high. If it is less than twice, In remains, and it is not possible to secure more reliability than in the case of a method of depositing alumina later.

【0023】また、基板温度は、蒸着チェンバ中の真空
度にもよるが、熱力学データにより見通しをつけること
ができる。例えば、ストゥル、シンケ量子の著書、サー
モダイナミック・プロパティーズ・オブ・ザ・エレメン
ツ(Thermodynamic Propertie
s of The Elemennts,D.R.St
ull and G.C.Sinke,America
n ChemicalSociety,1956)のデ
ータを参考にすると、427℃で9.9×10-5Tor
r、527℃で6.5×10-3Torrの平衡蒸気圧に
なるから、蒸着器の真空度が例えば10-6Torrであ
れば、427℃の基板温度でSbが再蒸発するというこ
とになる。
The temperature of the substrate depends on the degree of vacuum in the vapor deposition chamber, but can be estimated from thermodynamic data. See, for example, Stul, a book by Sinke Quantum, Thermodynamic Properties of the Elements (Thermodynamic Properties).
s of The Elements, D.C. R. St
ul and G. C. Sinke, America
n Chemical Society, 1956), 9.9 × 10 −5 Torr at 427 ° C.
r, the vapor pressure becomes 6.5 × 10 −3 Torr at 527 ° C., so that if the degree of vacuum of the evaporator is, for example, 10 −6 Torr, Sb is re-evaporated at a substrate temperature of 427 ° C. Become.

【0024】本発明においては、Sbを過剰に蒸着する
ことにより、再蒸発が抑えられ、過剰の単体InはIn
Sb化され、余分のSbは付着しない条件を選択する。
例えば、1016Torrの真空中、基板温度を500℃
にし、Sbを、過剰の単体InがInSb化するに必要
な量の10倍を蒸着するというような条件である。この
ようにして、最終的にInとSbとの原子比が1.0の
薄膜とすることができる。
In the present invention, re-evaporation is suppressed by excessively depositing Sb, and excess single element In is converted to In.
A condition is selected in which Sb is formed and excess Sb does not adhere.
For example, in a vacuum of 10 16 Torr, the substrate temperature is set to 500 ° C.
Under such a condition, Sb is deposited in an amount of 10 times the amount necessary for converting excess In into InSb. In this manner, a thin film having an atomic ratio of In to Sb of 1.0 can be finally obtained.

【0025】Sb蒸発源としては、Sb単体はもちろ
ん、InSbやGaSbを使用できる。さらに、これら
にSbを加えてもよい。この場合、Sbは蒸発するが、
InやGaが蒸発しないボート温度条件を選択すること
が必要である。
As the Sb evaporation source, not only Sb alone but also InSb or GaSb can be used. Further, Sb may be added to these. In this case, Sb evaporates,
It is necessary to select a boat temperature condition under which In and Ga do not evaporate.

【0026】次に、上記のようにして雲母基板上に形成
されたInSb薄膜を樹脂を介して別の絶縁性基板に接
着する。この際、絶縁性基板として、半永久的に素子を
保持するための基板であるから、高い信頼性のあるもの
が好ましい。例えば、無機材料が挙げられ、アルミナ、
フェライト、窒化ケイ素、石英、サファイア等を用いる
ことができる。このうち、特公昭51−45234号公
報に記載されたように、フェライトを用いると、磁気集
束チップを新たに載置することにより、さらに大幅な感
度アップをはかることができる。
Next, the InSb thin film formed on the mica substrate as described above is bonded to another insulating substrate via a resin. In this case, since the insulating substrate is a substrate for semi-permanently holding the element, a highly reliable substrate is preferable. For example, inorganic materials include alumina,
Ferrite, silicon nitride, quartz, sapphire, or the like can be used. As described in JP-B-51-45234, when ferrite is used, the sensitivity can be further greatly increased by newly mounting a magnetic focusing chip.

【0027】かかる絶縁性基板にInSb薄膜を接着す
る樹脂は、熱硬化性樹脂、熱可塑性樹脂等、例えばエポ
キシ樹脂、ポリミド樹脂等から選ぶことができる。ま
た、接着は極めて簡便な方法を用いることができる。例
えば、薄膜上に樹脂を滴下し、絶縁性基板をその上に載
置し、加温、あるいは、さらに加圧して所定時間放置す
るといった方法である。滴下するかわりにスクリーン印
刷を用いてもよい。一般に、樹脂の適度な粘度のもとで
は、接着層である樹脂層の厚みは数μmまで均一に転写
することが可能である。
The resin for bonding the InSb thin film to the insulating substrate can be selected from a thermosetting resin, a thermoplastic resin and the like, for example, an epoxy resin and a polyimide resin. In addition, an extremely simple method can be used for adhesion. For example, there is a method in which a resin is dropped on a thin film, an insulating substrate is placed thereon, and the film is heated or further pressurized and left for a predetermined time. Screen printing may be used instead of dropping. In general, under an appropriate viscosity of the resin, the thickness of the resin layer as the adhesive layer can be uniformly transferred to several μm.

【0028】次いで、雲母を剥離し、半永久的な絶縁性
基板に担持されたInSb薄膜が形成される。
Next, the mica is peeled off, and an InSb thin film carried on a semi-permanent insulating substrate is formed.

【0029】以上のようにして形成されたInSb薄膜
を担持した基板を、パターニング工程で電極形成および
個別素子化を行う。この電極用金属としてAl、Ni、
Cr、Cu、Pd、Au等が用いられ、電極は一般にこ
れらの金属の積層構造とする。さらにダイシング工程に
より、一個一個のペレットとし、これらのペレットをダ
イボンダ等でリードフレームに固着し、ペレットの電極
とリードフレームとをワイヤボンダ等でつなぎ、さらに
モールド工程等をにより、磁電変換素子とする。
In the substrate carrying the InSb thin film formed as described above, electrodes are formed and individual elements are formed in a patterning step. Al, Ni,
Cr, Cu, Pd, Au or the like is used, and the electrode generally has a laminated structure of these metals. Further, individual pellets are formed by a dicing process, these pellets are fixed to a lead frame by a die bonder or the like, the electrodes of the pellets are connected to the lead frame by a wire bonder or the like, and a magnetoelectric conversion element is formed by a molding process or the like.

【0030】[0030]

【作用】このようにしてつくった磁電変換素子は、過剰
のInのないInSb薄膜を作成でき、信頼性が極めて
優れた素子となる。
The magneto-electric conversion device thus manufactured can produce an InSb thin film free of excessive In, and has extremely high reliability.

【0031】[0031]

【実施例】次に、実施例によって本発明をさらに詳細に
説明する。
Next, the present invention will be described in more detail by way of examples.

【0032】まず、結晶成長用基板として雲母を用い、
この12枚の結晶成長用基板を、円盤状の基板ホルダに
設置する。回転駆動される基板ホルダには、同心円上に
52mm角の大きさの穴が形成され、結晶成長用基板
は、これらの穴の部分に設置される。基板ホルダは、3
つの蒸着源用ボートを有する真空蒸着装置内に設置さ
れ、かかる真空蒸着装置を用いて、結晶成長用基板上に
InSbを蒸着した。蒸着にあたっては、真空度を7×
10-6Torrにし、基板温度を400℃に設定して、
トータル蒸着時間は17分間とし、最終温度を480℃
とした。この間の基板温度上昇速度を、蒸着開始後0〜
6分、6〜14分、14〜17分で各々0℃/分、1
2.5℃/分、0℃/分に設定した。
First, mica was used as a substrate for crystal growth,
These 12 substrates for crystal growth are set on a disk-shaped substrate holder. Holes having a size of 52 mm square are formed concentrically on the substrate holder that is driven to rotate, and the substrate for crystal growth is placed in these holes. The substrate holder is 3
InSb was installed in a vacuum evaporation apparatus having two evaporation source boats, and InSb was evaporated on a substrate for crystal growth using the vacuum evaporation apparatus. At the time of vapor deposition, the degree of vacuum is 7 ×
Set to 10 -6 Torr, set the substrate temperature to 400 ° C,
Total deposition time is 17 minutes, final temperature is 480 ° C
And During this time, the substrate temperature rising rate is set to 0 to 0 after the start of vapor deposition.
0 ° C./min for 6 minutes, 6 to 14 minutes, and 14 to 17 minutes, 1
It was set to 2.5 ° C / min and 0 ° C / min.

【0033】このような条件でボートからのInおよび
Sbの飛び量をそれぞれ2gおよび3gとすると、最初
の14分間のInとSbとの比は、Inが約30%過剰
となる。
Assuming that the amounts of In and Sb flying from the boat under these conditions are 2 g and 3 g, respectively, the ratio of In to Sb in the first 14 minutes is about 30% excess of In.

【0034】最後の3分間はSbのみを、過剰である単
体Inの当量より、飛び量から換算して、約1.5倍、
2倍、4倍、8倍過剰にして、それぞれSb蒸着した。
なお、比較のため、Sbのみの蒸着を行わないもの(0
倍)も作製した。
In the last three minutes, only Sb was converted to the amount of flight from the equivalent of the excess single element In by about 1.5 times,
Sb was vapor-deposited in excess of 2, 4 and 8 times, respectively.
Note that, for comparison, the case where only Sb was not deposited (0
Times) were also prepared.

【0035】各蒸着条件において、それぞれ、12枚の
薄膜がともに同一の性状を示した。また、8倍過剰にし
た場合の、12枚のうち1枚の組成分析をXMAで行っ
たが、ウェハ全面の組成比が1.0であった。さらに、
この薄膜について、ファン・デル・パウ法で移動度を測
定したところ、45,000±500cm2 /V/se
cであった。また、厚みは0.7±0.05μmであっ
た(パターニング後ディックタックで測定)。
Under each of the deposition conditions, each of the 12 thin films showed the same properties. In addition, when the composition was excessively increased by 8 times, the composition analysis of one of the 12 wafers was performed by XMA, and the composition ratio of the entire wafer was 1.0. further,
When the mobility of this thin film was measured by the van der Pauw method, 45,000 ± 500 cm 2 / V / sec.
c. The thickness was 0.7 ± 0.05 μm (measured by Dick tack after patterning).

【0036】得られた薄膜のうち、Sbのみの蒸着を2
倍以上で行ったもは金色かかった色に近いが、Sbのみ
の蒸着を行わなかったもの(0倍)およびSb蒸着を
1.5倍で行ったものは、白っぽい外観を有するので、
本発明によりできる薄膜は目視で識別できる。700倍
以上拡大した金属顕微鏡での膜面観察では、Sb蒸着前
では半球状に析出している単体InがSb蒸着後潰れた
様態になっている。この表面状態の形状差と、単体In
がInSb化となる膜構成成分差が外観色調に変化を与
えているものと考えられる。
Of the obtained thin films, evaporation of only Sb was carried out for 2 hours.
Although it was close to a golden color when it was performed at twice or more times, those without Sb only deposition (0 times) and those with 1.5 times Sb deposition had a whitish appearance,
Thin films made according to the invention can be visually identified. Observation of the film surface with a metallurgical microscope magnified 700 times or more shows that, before Sb vapor deposition, single element In deposited in a hemispherical shape is crushed after Sb vapor deposition. The difference in shape between the surface states and the simple substance In
It is considered that the difference between the film constituents that gives InSb changes the appearance color tone.

【0037】次に、50mm角のフェライトを準備し、
InSb薄膜上にポリイミド樹脂を滴下し、フェライト
をその上に重ね、重しを置いて200℃で12時間放置
した。次に室温に戻し、雲母を剥ぎ取った。このInS
b薄膜を担持したウェハよりホール素子パターンを形成
するのに、フォトリソグラフィの手法を用いた。
Next, a 50 mm square ferrite is prepared,
A polyimide resin was dropped on the InSb thin film, ferrite was overlaid thereon, and a weight was placed and left at 200 ° C. for 12 hours. Next, the temperature was returned to room temperature, and the mica was peeled off. This InS
Photolithography was used to form a Hall element pattern from a wafer carrying the thin film b.

【0038】図1〜図2にパターニング後のホール素子
の構造を示す。図1はその平面図、図2は図1のA−A
線断面図である。図示したように、絶縁性基板1上に
は、ポリイミド樹脂層2およびInSb薄膜層3が順次
積層されている。このInSb薄膜層3の中央の感磁部
3a以外の部分には、オーミックコンタクトしたCuな
どの導体層4が形成されており、さらにその上に、ボン
ディングのための電極層としてNi層5、およびAu層
6が積層されている。本実施例では、Cu、Ni、Au
各層の厚みは約3μmであった。ペレットの大きさは
0.8mm角であった。
FIGS. 1 and 2 show the structure of the Hall element after patterning. FIG. 1 is a plan view thereof, and FIG.
It is a line sectional view. As shown, a polyimide resin layer 2 and an InSb thin film layer 3 are sequentially laminated on an insulating substrate 1. A conductor layer 4 made of ohmic contact Cu or the like is formed in a portion of the InSb thin film layer 3 other than the center magneto-sensitive portion 3a, and a Ni layer 5 as an electrode layer for bonding is further formed thereon. An Au layer 6 is laminated. In this embodiment, Cu, Ni, Au
The thickness of each layer was about 3 μm. The size of the pellet was 0.8 mm square.

【0039】次いで、ダイシングして個々の素子に分割
し、これらのペレットをリードフレーム上のアイランド
部にダイボンドし、さらにリードとペレットの電極部と
をワイヤボンディングによりAu線でつないで電気的接
続をした。さらに、トランスファーモールド、電気検査
等の工程を経てホール素子が完成した。
Next, dicing is performed to divide the individual elements, these pellets are die-bonded to the island portions on the lead frame, and furthermore, the leads and the electrode portions of the pellets are connected by an Au wire by wire bonding to make electrical connection. did. Further, the Hall element was completed through processes such as transfer molding and electrical inspection.

【0040】これらの素子の中から100ケ抜き取っ
て、半田ディップ300℃を5秒間行った後、85℃、
85%RHの恒温恒湿槽中に200時間放置という信頼
性テストを行った。
After removing 100 pieces from these elements and performing solder dip at 300 ° C. for 5 seconds, 85 ° C.
A reliability test was performed in which the sample was left in a thermo-hygrostat at 85% RH for 200 hours.

【0041】この信頼性試験前後で、ホール素子の電気
磁気特性を示す抵抗値と0.05テラス中でのホール電
圧の各値がそれぞれどれだけ変化したかを変化率に換算
し評価した。
Before and after this reliability test, the change in the resistance value indicating the electro-magnetic characteristics of the Hall element and the value of the Hall voltage in the 0.05 terrace were converted into a change rate and evaluated.

【0042】過剰の単体Inの等等の8倍過剰にしてS
bのみを蒸着した場合、抵抗値の変化率が約0.6%、
ホール電圧の変化率が約0.5%であり、変化率の偏差
でも、抵抗値が約0.3%、ホール電圧が約0.4%で
あり、良好な結果が得られた。
An excess of 8 times, such as an excess of simple In, etc.
When only b is deposited, the rate of change of the resistance value is about 0.6%,
The change rate of the Hall voltage was about 0.5%, and even with the deviation of the change rate, the resistance value was about 0.3% and the Hall voltage was about 0.4%, and good results were obtained.

【0043】過剰の単体Inの等量の4倍過剰にしてS
bのみを蒸着した場合、XMAでの成分分析において、
組成比1.0であった。信頼性試験を実施したところ、
抵抗値の変化率の平均で0.9%、0.05テラス中で
のホール電圧の変化率が0.5%であった。また、変化
率の偏差でも、抵抗値が0.3%、ホール電圧が0.5
%であり、良好な結果が得られた。
An excess of 4 times the equivalent amount of the excess In
When only b is deposited, in the component analysis by XMA,
The composition ratio was 1.0. After conducting a reliability test,
The average change rate of the resistance value was 0.9%, and the change rate of the Hall voltage in the 0.05 terrace was 0.5%. Also, in the deviation of the change rate, the resistance value is 0.3% and the Hall voltage is 0.5%.
%, And good results were obtained.

【0044】過剰の単体Inの等量の2倍過剰にしてS
bのみを蒸着した場合、XMAでの成分分析において、
組成比1.0であった。信頼性試験を実施したところ、
抵抗値の変化率の平均が1.7%、0.05テラス中で
のホール電圧の変化率が0.7%であった。また、変化
率の偏差でも、抵抗値が0.3%、ホール電圧が0.6
%であり、良好な結果が得られた。
An excess of two times the equivalent amount of the excess elemental In
When only b is deposited, in the component analysis by XMA,
The composition ratio was 1.0. After conducting a reliability test,
The average change rate of the resistance value was 1.7%, and the change rate of the Hall voltage in the 0.05 terrace was 0.7%. Also, in the deviation of the change rate, the resistance value is 0.3% and the Hall voltage is 0.6%.
%, And good results were obtained.

【0045】過剰の単体Inの等量の1.5倍過剰にし
てSbのみを蒸着した場合、X線解析によるIn(10
1)ピークがみられた。この薄膜を用いて素子をつく
り、信頼性テストを行ったところ、抵抗値の変化率が
9.7%、0.05テラス中でのホール電圧の変化率が
約8.9%であった。Sbの蒸着を行わなかった場合
(0倍)に比べ若干向上するが過剰の単体Inの等量の
2倍過剰にしてSbのみを蒸着した場合より変化率が大
きい。また、この結果は、少しのInの存在も信頼性を
低下させることを示している。
In the case where only Sb was vapor-deposited with an excess of 1.5 times the equivalent amount of the excess single element In, the In (10
1) A peak was observed. An element was fabricated using this thin film, and a reliability test was performed. As a result, the rate of change in resistance was 9.7%, and the rate of change in Hall voltage in 0.05 terraces was about 8.9%. Although this is slightly improved as compared with the case where Sb is not deposited (0 times), the rate of change is larger than the case where only Sb is deposited with twice the equivalent amount of the excess single element In. This result also indicates that the presence of a small amount of In lowers the reliability.

【0046】後半のSbのみの蒸着を行わなかった場
合、すなわち過剰の単体Inの等量の0倍過剰にしてS
bのみを蒸着した場合、抵抗値の変化率の平均が11.
1%、0.05テラス中でのホール電圧の変化率が1
0.5%であった。また、変化率の偏差でも、抵抗値が
0.8%、ホール電圧が0.7%であった。
When the latter half of Sb alone was not deposited, that is, when the equivalent amount of the excess elemental In was excessively increased by 0 times, S
When only b is deposited, the average of the rate of change of the resistance value is 11.
1%, 0.05 Hall voltage change rate in terrace is 1
0.5%. Also, the deviation of the rate of change was 0.8% for the resistance value and 0.7% for the Hall voltage.

【0047】なお、Sbのみの蒸着を行わなかった場
合、すなわち過剰Inの状態にしてその薄膜上にアルミ
ナを2,500Å程度蒸着した薄膜を用いてホール素子
を作成し、同様の信頼性試験を行ったところ、抵抗変化
率は平均が約2.5%、0.05テラス中でのホール電
圧の変化率は平均が約3.2%であった。これよりSb
を過剰の単体Inの等量の2倍以上過剰に蒸着した場合
の方が、アルミナ蒸着より信頼性において優れているこ
とが判る。また、この結果は、過剰に存在する単体In
が、耐湿性に対して悪影響を与えていることを示してい
る。
When the deposition of Sb alone was not performed, that is, in a state of excess In, a Hall element was prepared using a thin film obtained by evaporating alumina at about 2,500 ° on the thin film, and a similar reliability test was performed. As a result, the average rate of change in resistance was about 2.5%, and the average rate of change in Hall voltage in the 0.05 terrace was about 3.2%. From this Sb
It can be seen that the case where the excess amount of elemental In is vapor-deposited at least twice as much as the equivalent amount of the elemental In is more reliable than the vapor-deposition of alumina. Further, this result indicates that the excess In
Indicates that it has an adverse effect on moisture resistance.

【0048】過剰である単体Inの当量とSb飛び量か
ら換算したSbの等量との比と半田ディップ(300
℃、5秒)後の湿度放置試験(85℃、85%RH)の
結果を表1に示す。
The ratio between the excess equivalent of the single element In and the equivalent amount of Sb calculated from the Sb jump amount and the solder dip (300
Table 1 shows the results of a humidity storage test (85 ° C., 85% RH) after (5 ° C., 5 seconds).

【0049】[0049]

【表1】 [Table 1]

【0050】次に、他の実施例として、最初にInおよ
びSbのボートからの飛び量を、それぞれ2.1gおよ
び4g、1.5gおよび3gに変える以外は上記の実施
例と同じようにして、組成上1.0のInSb薄膜を作
成した。これらの移動度は各々41,000±500c
2 /V/sec、37,000cm2 /V/secで
あった。これらの薄膜から上記の実施例と同様にしてホ
ール素子をつくり、信頼性テストにかけたところ、Sb
を過剰の単体Inの等量の2倍以上過剰に蒸着した場
合、変化率と偏差の平均はいずれも1%以下で、良好な
結果が得られた。
Next, as another embodiment, in the same manner as in the above embodiment except that the amounts of In and Sb jumped from the boat were changed to 2.1 g, 4 g, 1.5 g and 3 g, respectively. An InSb thin film having a composition of 1.0 was formed. Each of these mobilities is 41,000 ± 500c
m 2 / V / sec and 37,000 cm 2 / V / sec. When a Hall element was formed from these thin films in the same manner as in the above embodiment, and subjected to a reliability test,
Was excessively deposited at least twice the equivalent amount of the elemental In, the average of the rate of change and the average of the deviations were both 1% or less, and good results were obtained.

【0051】また、電極構造のみを3μmのCu、3.
5μmのNi、および0.5μmのPdの積層構造に変
えた場合でも、信頼性テストの結果は、上記と同程度の
優れたものであった。
Further, only the electrode structure is made of 3 μm Cu,
Even when the laminated structure was changed to 5 μm Ni and 0.5 μm Pd, the result of the reliability test was as excellent as the above.

【0052】次に、ホール素子を作成したものと同様の
薄膜を用い、半導体磁気抵抗素子を作成した。
Next, a semiconductor magnetoresistive element was prepared using the same thin film as that for forming the Hall element.

【0053】50mm角のアルミナ基板を準備し、In
Sb薄膜上にポリイミド樹脂を滴下し、アルミナ基板を
その上に重ね、重しを置いて200℃、12時間放置し
た。それから室温に戻し、雲母を剥ぎ取った。このIn
Sb薄膜を担持したウェハより半導体磁気抵抗素子パタ
ーンを形成するのに、フォトリソグラフィの手法を用い
た。
A 50 mm square alumina substrate was prepared, and In
A polyimide resin was dropped on the Sb thin film, an alumina substrate was overlaid on the thin film, and a weight was placed and left at 200 ° C. for 12 hours. Then it was returned to room temperature and the mica was stripped off. This In
Photolithography was used to form a semiconductor magnetoresistive element pattern from a wafer carrying an Sb thin film.

【0054】図3〜図5には、パターニング後の半導体
磁気抵抗素子の構造を示す。図3はその平面図、図4は
図3のB−B線断面図、図5は図3のC−C線断面図で
ある。
FIGS. 3 to 5 show the structure of the semiconductor magnetoresistive element after patterning. 3 is a plan view thereof, FIG. 4 is a sectional view taken along line BB of FIG. 3, and FIG. 5 is a sectional view taken along line CC of FIG.

【0055】これらの図に示すように、絶縁性基板11
上には、ポリイミド樹脂層12およびInSb薄膜層1
3が順次積層されている。このInSb薄膜層13の感
磁部以外の部分には、オーミックコンタクトしたCuな
どの導体層16が短冊状に形成されており、ラスタ電極
と呼ばれる電界を短絡する部分が構成されている。ラス
タ電極の幅Wを200μm、ラスタ電極間のInSbの
間隔Lを30μmで形成した。
As shown in these figures, the insulating substrate 11
On top are the polyimide resin layer 12 and the InSb thin film layer 1
3 are sequentially stacked. A conductor layer 16 made of ohmic contact, such as Cu, is formed in a strip shape in a portion other than the magnetically sensitive portion of the InSb thin film layer 13 to form a portion called a raster electrode for short-circuiting an electric field. The width W of the raster electrode was 200 μm, and the interval L of InSb between the raster electrodes was 30 μm.

【0056】さらに外部の回路と接続するための電極層
17を半田で形成し、0.03mm厚のリン青銅箔でで
きたリード端子を半田付けした。その上に、0.15m
m厚の保護ガラスをシリコーン樹脂で貼り付け、ポテン
ショメータ用半導体磁気抵抗素子を作成した。
Further, an electrode layer 17 for connecting to an external circuit was formed with solder, and a lead terminal made of phosphor bronze foil having a thickness of 0.03 mm was soldered. On top of that, 0.15m
An m-thick protective glass was adhered with a silicone resin to prepare a semiconductor magnetoresistive element for a potentiometer.

【0057】これらの素子の中から100ケ抜き取っ
て、300℃の半田ディップを5秒間行った後、85
℃、85%RHの恒温恒湿層中に200時間放置という
信頼性テストを行った。この信頼性試験前後で、半導体
磁気抵抗素子の電気磁気特性を示す項目である抵抗値と
0.4テラス中での磁気抵抗変化率がそれぞれどのくら
い変化したかを変化率に換算し評価した。抵抗値の変化
率、磁気抵抗変化率の変化率とも平均で1%以下であっ
た。また、変化率の偏差でも、抵抗値で0.2%、磁気
抵抗変化率で0.3%であった。
After 100 pieces were taken out of these elements and subjected to a solder dip at 300 ° C. for 5 seconds,
A reliability test was conducted in which the sample was left for 200 hours in a thermo-hygrostat at 85 ° C. and 85% RH. Before and after this reliability test, the resistance value, which is an item indicating the electro-magnetic characteristics of the semiconductor magnetoresistive element, and the degree of change in the magnetoresistance in the 0.4 terrace were each converted and evaluated. The rate of change of the resistance value and the rate of change of the magnetoresistance were both 1% or less on average. Also, the deviation of the change rate was 0.2% in the resistance value and 0.3% in the magnetoresistance change rate.

【0058】しかし、後半の蒸着を行わないで、半導体
磁気抵抗素子を作成し、同じ信頼性試験を実施したとこ
ろ、抵抗値の変化率、磁気抵抗変化率の変化率とも10
%以上であった。半導体磁気抵抗素子においては、蒸着
膜にアルミナを蒸着すると磁気抵抗変化率が10%低下
するため、感度を重視しアルミナは蒸着しない。従っ
て、半導体磁気抵抗素子では、本発明によって信頼性が
著しい改善となった。
However, a semiconductor magnetoresistive element was prepared without performing the latter deposition, and the same reliability test was performed. As a result, both the rate of change of the resistance value and the rate of change of the magnetoresistance were 10%.
% Or more. In a semiconductor magnetoresistive element, when alumina is vapor-deposited on a vapor-deposited film, the magnetoresistance ratio decreases by 10%. Therefore, sensitivity is emphasized and alumina is not vapor-deposited. Therefore, the reliability of the semiconductor magnetoresistive element is significantly improved by the present invention.

【0059】[0059]

【発明の効果】以上の説明から明らかなように、本発明
の磁電変換素子は、アルミナ等のパッシベーションを形
成することなく、耐湿性に優れ、信頼性の極めて優れた
ものである。
As is apparent from the above description, the magnetoelectric conversion element of the present invention is excellent in moisture resistance and extremely excellent in reliability without forming passivation of alumina or the like.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を適用したホール素子の平面図である。FIG. 1 is a plan view of a Hall element to which the present invention is applied.

【図2】図1のA−A線断面図である。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】本発明を適用した半導体磁気抵抗素子の平面図
である。
FIG. 3 is a plan view of a semiconductor magnetoresistive element to which the present invention is applied.

【図4】図3のB−B線断面図である。FIG. 4 is a sectional view taken along line BB of FIG. 3;

【図5】図3のC−C線断面図である。FIG. 5 is a sectional view taken along line CC of FIG. 3;

【符号の説明】[Explanation of symbols]

1 絶縁性基板 2 樹脂層 3 InSb薄膜層 4 導電層 5 ボンディング用電極層 6 ラスタ電極層 7 リード端子半田付け用電極層 REFERENCE SIGNS LIST 1 insulating substrate 2 resin layer 3 InSb thin film layer 4 conductive layer 5 bonding electrode layer 6 raster electrode layer 7 lead terminal soldering electrode layer

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI C30B 23/06 C30B 23/06 G01R 33/09 H01L 43/12 H01L 43/12 G01R 33/06 R (72)発明者 荒木 秀輝 宮崎県延岡市旭町6丁目4100番地 旭化 成電子株式会社内 (72)発明者 熊沢 富士美 宮崎県延岡市旭町6丁目4100番地 旭化 成電子株式会社内 (56)参考文献 特公 昭47−40672(JP,B1) 特公 昭62−50993(JP,B2) 特公 昭62−50994(JP,B2) (58)調査した分野(Int.Cl.7,DB名) C23C 14/00 - 14/58 C01G 30/00 C30B 23/06 G01R 33/09 H01L 43/12 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification code FI C30B 23/06 C30B 23/06 G01R 33/09 H01L 43/12 H01L 43/12 G01R 33/06 R (72) Inventor Hideki Araki Asahi Kasei Electronics Co., Ltd., 6-4100 Asahicho, Nobeoka City, Miyazaki Prefecture (72) Inventor Fujimi Kumazawa 6-4100 Asahicho, Nobeoka City, Miyazaki Prefecture Asahi Kasei Electronics Corporation (56) -40672 (JP, B1) JP-B-62-50993 (JP, B2) JP-B-62-50994 (JP, B2) (58) Fields investigated (Int. Cl. 7 , DB name) C23C 14/00- 14/58 C01G 30/00 C30B 23/06 G01R 33/09 H01L 43/12

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 基板上に、インジウムアンチモン化合物
の結晶と単体インジウムとの複合結晶からなり、かつ全
インジウムのアンチモンに対する原子比が1.1〜1.
7の範囲にあるインジウムアンチモン複合結晶薄膜を蒸
着により形成し、次いでインジウムをインジウムアンチ
モン化するに必要な量よりも2倍以上過剰のアンチモン
を、アンチモンの再蒸発が起こる以上の基板温度で蒸着
することを特徴とする磁電変換素子の製造方法。
1. A substrate comprising a composite crystal of a crystal of an indium antimony compound and a simple element of indium, and having an atomic ratio of all indium to antimony of 1.1 to 1.
The indium-antimony composite crystal thin film in the range of 7 is formed by vapor deposition, and then at least a two-fold excess of antimony in excess of the amount required to convert indium to indium-antimony is deposited at a substrate temperature higher than the re-evaporation of antimony. A method for manufacturing a magnetoelectric conversion element, comprising:
JP24622394A 1994-10-12 1994-10-12 Manufacturing method of magnetoelectric conversion element Expired - Lifetime JP3155670B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24622394A JP3155670B2 (en) 1994-10-12 1994-10-12 Manufacturing method of magnetoelectric conversion element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24622394A JP3155670B2 (en) 1994-10-12 1994-10-12 Manufacturing method of magnetoelectric conversion element

Publications (2)

Publication Number Publication Date
JPH08109468A JPH08109468A (en) 1996-04-30
JP3155670B2 true JP3155670B2 (en) 2001-04-16

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3155670B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6042077B2 (en) * 2012-02-16 2016-12-14 旭化成エレクトロニクス株式会社 Method for producing compound semiconductor thin film
WO2017175308A1 (en) * 2016-04-05 2017-10-12 株式会社ヴィーネックス Magnetic line sensor and discriminating device including same

Also Published As

Publication number Publication date
JPH08109468A (en) 1996-04-30

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