JP3147226B2 - Digital radio equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital radio apparatus, and more particularly, to fading in a long span,
The present invention relates to a digital radio apparatus which is suitable for a line whose reception level fluctuates greatly and which improves the line quality.

[0002]

2. Description of the Related Art Japanese Unexamined Patent Publication No. 59-201564 (hereinafter referred to as "first publication") to which conventional digital radio technology is applied, discloses a multi-level QAM having 32 or more values.
(Quadrature phase modulation system) discloses a wireless communication system that can be put to practical use. In the case of this first publication, the transmitting system modulates the carrier wave of the frequency f0 with the digital signal of the clock frequency fcl and transmits the modulated wave to the receiving system. The receiving system receives the modulated wave and extracts the carrier wave. When a digital signal is reproduced using the extracted carrier wave, a frequency corresponding to the sum of 1 / N (N is an integer of 2 or more) of the frequency f0 and the clock frequency fcl on the signal spectrum of the modulated wave in the transmission system. A first having {f0 + (1 / N) .fcl} and a frequency {f0- (1 / N) .fcl} corresponding to the difference,
And the second carrier for reproduction are inserted into a modulated wave. In the receiving system, the frequency is ｛f0 + (1 / N) · fc
l｝ the first carrier for reproduction and the frequency are ｛f0- (1 / N)
A second carrier of fcl｝ is added to the modulator, and a carrier of frequency f0 and a signal of clock frequency fcl are extracted to reproduce a digital signal.

In Japanese Patent Laid-Open Publication No. Sho 64-71223 (hereinafter referred to as "the second publication"), a network control station is provided with a network synchronization device for generating a reference clock, and a reference clock signal generated from the network synchronization device is provided. The transmission clock for the common signal line is generated by dividing the frequency by a predetermined period and transmitted to the common signal line, and the controlled station is provided with clock recovery means, and the transmission clock of the common signal line is divided by the clock recovery means. There is disclosed a digital satellite communication system in which a reference clock and a data transmission clock are regenerated for use.

[0004] However, none of these first and second publications disclose a technical idea relating to a case where the reception level fluctuates when applied to a line in which fading occurs. On the other hand, a digital radio apparatus adaptable to a line in which fading occurs is also known. FIG. 4 is a block diagram showing a configuration of a transmission unit in this type of conventional digital radio apparatus.

[0005] First, the configuration of the transmitting section in FIG. 4 will be described.
In the transmitting section 301, input data is input from a data input terminal 303 and input to a modulator 305, and a clock signal is input from a clock input terminal 304. The modulator 305 outputs a carrier output output from a carrier oscillator 306. Modulates with input data. This modulated output signal is converted to a frequency in a transmission frequency band by a transmission frequency converter 307, amplified to a certain level, and transmitted to a transmission signal output terminal 3.
08 to output a transmission signal. The frequency spectrum of this transmission signal is shown in FIG. FIG.
The horizontal axis indicates the offset frequency, and the vertical axis indicates the level, and the transmission signal spectrum 401 is shown.

On the other hand, in the receiving section 302 shown in FIG. 5, a received signal is input from a received signal input terminal 309 and input to a received frequency converter 310. Receive frequency converter 310
Is converted into a frequency in an intermediate frequency band and sent to an automatic gain control amplifier (hereinafter, referred to as an AGC amplifier) 311. The AGC amplifier 311 fixes the level fluctuation of the received signal to a predetermined level. In the AGC amplifier 311, the level of the received signal in the intermediate frequency band is removed by flat fading, and the received signal having a constant level is removed. The signal is sent to the decision feedback equalizer 312.

The received signal input to the decision feedback equalizer 312 is free of intersymbol interference caused by multipath fading. The clock is regenerated by the clock regenerator 314 from the received signal after removing the intersymbol interference, and the regenerated clock signal is sent to the demodulator 313. The clock regenerator 314 performs non-linear processing on the received signal after removing the intersymbol interference, extracts the timing information, and converts the internal reference clock into a PLL (not shown).
A method of synchronizing with a received signal by a circuit is adopted.

[0008] Further, the carrier is regenerated by the carrier regenerator 315 from the received signal of the reception intermediate frequency band after the intersymbol interference removal, and the regenerated carrier is sent to the demodulator 313. The demodulator 313 obtains a reception determination signal based on the clock signal reproduced by the clock regenerator 314. The reception determination signal is output from a data output terminal 316, and the clock signal is output from a clock output terminal 317.

[0009]

In such a conventional digital radio apparatus, the decision feedback equalizer 312 of the receiving section 302 performs reception after removing intersymbol interference caused by multipath fading. Since the clock is regenerated by the clock regenerator 314 from the signal,
In a line in which long-span fading occurs, there has been a problem that the reception level fluctuates greatly, and when a reception signal is interrupted, clock synchronization is lost and it takes time to re-synchronize.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and is relatively simple even in a line in which long-span fading occurs and reception level fluctuation is severe without expanding a signal band. Provided is a digital radio device capable of supplying a stable clock with a configuration, reducing clock synchronization loss due to fluctuations in reception level, and shortening the time required to return from an out-of-synchronization state to a synchronization state again. With the goal.

[0011]

To achieve the above object, a digital radio apparatus according to the present invention comprises a modulator for modulating a carrier output from a carrier oscillator by input data, and an output from the modulator. Notch creating means for creating a notch at 1 / N (N is an arbitrary integer) of the clock frequency of the modulation signal spectrum, and a signal synchronized with the transmission clock signal is converted into an intermediate frequency band by a carrier output from the carrier oscillator. A transmission unit comprising: a frequency conversion unit that converts the output of the notch generation unit and an output of the frequency conversion unit to an output of the modulator to output a transmission signal; And a means for shifting the position of the reference tap so as to remove the intersymbol interference and the clock frequency component of the received signal. An equalizer, a carrier regenerator that regenerates a carrier from an output signal of the decision feedback equalizer, a clock regenerating unit that regenerates a clock from the received signal and a carrier generated by the carrier regenerator, A demodulator for receiving a carrier generated by a carrier regenerator and a clock signal generated by the clock regenerating means and demodulating an output signal of the decision feedback equalizer to a reception determination signal; Characterized by the following.

According to the present invention, in the transmitting section, the modulator modulates the carrier output from the carrier oscillator by the input data and divides the output into two, one of which is sent to the combiner and the other is sent to the notch creating means. Send out. The notch creating means creates a notch in the output of the modulator at 1 / N of the clock frequency of the modulation signal spectrum and outputs the notch to the synthesizer. The frequency conversion means converts a signal synchronized with the transmission clock signal into a frequency in an intermediate frequency band by using a carrier output from the carrier oscillator, and outputs the frequency to the synthesizer. The combiner superimposes the output of the notch creation means and the output of the frequency conversion means on the output of the modulator and combines them to output a transmission signal. On the other hand, the receiving section inputs the received signal to the decision feedback equalizer and the clock recovery means. In the decision feedback equalizer, the position is shifted to the reference tap and output to the demodulator and the carrier regenerator so as to remove the code interference and the clock frequency component of the received signal given by the transmission unit. The carrier regenerator regenerates the carrier from the received signal output from the decision feedback equalizer and outputs the carrier to the demodulator and the clock regenerating means. The clock recovery unit receives the received signal and the carrier, recovers the clock, and outputs the recovered clock to the demodulator. The demodulator demodulates the received signal output from the decision feedback equalizer from the reproduced carrier and clock into a reception decision signal and outputs the signal.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a digital radio apparatus according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a transmitting unit in the first embodiment of the digital radio apparatus of the present invention, and FIG. 2 is a block diagram showing a configuration of a receiving unit. First, the configuration of the transmitting unit in FIG. 1 will be described. Input data is input to the data input terminal 103 of the transmission unit 101 and input to the modulator 105. Further, a transmission clock signal is input to the clock input terminal 104, and this transmission clock signal is transmitted to the modulator 105 by 1 / N (N is an arbitrary integer).
The signal is input to the frequency dividing circuit 110.

The modulator 105 includes a carrier oscillator 109
Is also input, the carrier is modulated by the input data, the modulated signal is branched into two, and one of them is sent to the combiner 10. The other modulation signal of the modulator 105 is sent to the phase shifter 106. The phase shifter 106 arbitrarily shifts the phase of the data output from the modulator, creates a notch at 1 / N of the clock frequency of the modulation signal spectrum, and outputs the notch to the delay unit 107. . The delay unit 107 is a phase shifter 10
6 is delayed and output to the synthesizer 108. The notch creating means A is constituted by the phase shifter 106 and the delay unit 107.

The transmission clock signal input to the frequency dividing circuit 110 is divided there by 1 / N, and the divided output is sent to the sine wave generator 111. The sine wave generator 111 generates a sine wave synchronized with the divided transmission clock signal and sends the sine wave to the first mixer 112. The carrier generated from the carrier oscillator 109 is also input to the first mixer 112. The first mixer 112 mixes the sine wave and the carrier, converts the sine wave to a frequency in an intermediate frequency band, and outputs it to a first bandpass filter (hereinafter, the bandpass filter is referred to as a BPF) 113. I am trying to do it.

The frequency dividing circuit 110 and the sine wave generator 11
1 and the first mixer 112 constitute frequency conversion means B. The output of the first mixer 112 includes a target signal component on the frequency axis with respect to the carrier, and the first BPF 113 is provided to remove one of the target signal components. The output of the first BPF 113 is sent to the synthesizer 108.

The combiner 108 outputs the output of the modulator 105,
The output of the notch creating means A and the output of the first BPF 113 are input, and the output of the notch creating means A and the output of the first BPF 113 are superimposed on the output of the modulator 105 to transmit the transmission frequency converter. 114.
The transmission frequency converter 114 is configured to receive the output of the synthesizer 108, convert the modulated signal to a frequency in the transmission frequency band, amplify the frequency to a certain level, and output the transmission signal from the transmission output terminal 115. ing. Thus, the transmitting unit 10
1.

Next, the configuration of the receiving section will be described with reference to FIG. In FIG. 2, a reception signal is input to a reception input terminal 116. Receive input terminal 1
Reference numeral 16 is connected to an input terminal of a reception frequency converter 117. When the reception signal is input to the reception frequency converter 117 through the reception input terminal 116, the signal is converted into a frequency in an intermediate frequency band, and an AGC amplifier 118 is provided. To be sent. The AGC amplifier 118 is a circuit for fixing the level of the reception signal output from the reception frequency converter 117 to a predetermined level. The output of the AGC amplifier 118 is sent to the decision feedback equalizer 119 and the second BPF 121. It is supposed to.

The decision feedback equalizer 119 is composed of a transversal filter type front filter and a rear filter, and removes intersymbol interference and clock frequency components generated in the transmission section 101 of the reception signal in the reception intermediate frequency band. As described above, a means for shifting the position of the reference tap is included, the waveform of the received signal is equivalent, and the equivalent received signal is output to the demodulator 120 and the carrier regenerator 124. The carrier regenerator 124 regenerates a carrier from the received signal in the reception intermediate frequency band and outputs the carrier to the demodulator 120 and the second mixer 122. Second BPF 12
Reference numeral 1 extracts a clock frequency component from a reception signal in the reception intermediate frequency band, and sends the clock frequency component to the second mixer 122.

The second mixer 122 includes a second BPF 1
By inputting and mixing the clock frequency component extracted from 21 and the carrier reproduced from the carrier regenerator 124, it is converted into a baseband frequency and a baseband signal is output to the clock regenerator 123. I have. The clock regenerator 123 receives the baseband signal from the second mixer 122 and generates a clock signal in synchronization with the baseband signal. This clock signal is sent to the modulator 120. Thus, the second BPF 121 and the second mixer 122
And the clock regenerator 123 constitute a clock generating means C.

The demodulator 120 is a clock regenerator 123
And the carrier reproduced by the carrier regenerator 124 are input to the decision feedback equalizer 11.
9 demodulates a reception signal in the reception intermediate frequency band equalized to a reception determination signal, outputs a reception determination signal from a data output terminal 125, and outputs a clock signal from a clock output terminal 126. It has become. Thus, the receiving unit 102 is configured.

Next, the first device having the above-described structure will be described.
The operation of the embodiment will be described. First, the transmission unit 1
Operation 01 will be described first. Input data externally input to the data input terminal 103 is input to the modulator 105, and a transmission clock signal input to the clock input terminal 104 is input to the modulator 105 and the frequency divider 110. Further, the carrier generated by carrier oscillator 109 is sent to modulator 105 and first mixer 112. Modulator 1
A modulator 05 modulates the carrier with input data to split the modulated signal into two, and sends one of the modulated signal to the combiner 108 and the other to the phase shifter 106.

The phase of the modulation signal input to the phase shifter 106 is shifted by a predetermined amount by the phase shifter 106 and sent to the delay unit 107. The output signal of the phase shifter 106 is delayed by a predetermined time, for example, 1 / (2 fs), and is output to the synthesizer 108 by the delay unit 107, so that a notch is formed at 1 / N of the clock frequency of the modulated signal spectrum. create. On the other hand, a system from the frequency dividing circuit 110 to the first BPF 113, that is,
The frequency conversion means B transmits the clock frequency component to the transmitting unit 10.
It is used to make a baseline spectrum when superimposed on the transmission signal output from 1, and that point will be described below.

As described above, the transmission clock signal input to the clock input terminal 104 is divided by the frequency divider 110 into 1 / N in order to transmit the transmission signal with the clock frequency component superimposed thereon. The frequency division result is output to the sine wave generator 111. The sine wave generator 111 receives the output signal of the frequency dividing circuit 110, and synchronizes the transmission clock signal 2fs (fs is the symbol rate) with, for example, 4 in synchronization with the transmission clock signal divided by 1 / N. Frequency dividing and frequency dividing circuit 11
A fs / 2 sine wave signal synchronized with the output of 0 is generated.
In other words, the transmission clock signal is converted into a sine wave signal. This sine wave signal is used to make the base line spectrum when the clock frequency component is superimposed on the transmission signal.

This sine wave signal is sent to the first mixer 112. The carrier is also input to the first mixer 112. Therefore, the first mixer 112 mixes the carrier and the sine wave signal, converts the sine wave signal to a frequency in the intermediate frequency band, and To the BPF 113. The first BPF 113 is provided to remove the output signal of the first mixer 112 from including a target signal component on the frequency axis centering on the carrier frequency. When the output signal of the first mixer 112 is input to the first BPF 113, the first BPF 113 removes one of the target signal components on the frequency axis, extracts only one clock component, and extracts the one clock component. Output to 108.

The combiner 108 adds the output signal of the delay unit 107 and the first BPF to the modulated signal output from the modulator 105.
A notch is given to the spectrum of the transmission signal by superimposing the output signal of 113, that is, the sine wave signal of the frequency of the intermediate frequency band, and the base line spectrum is superimposed on the notch frequency as clock information. The modulated signal on which the baseline spectrum is superimposed is transmitted from the synthesizer 108 to the transmission frequency converter 11.
4 is output. The output spectrum of this combiner 108 is shown in FIG. In FIG. 3, the horizontal axis represents the offset frequency, and the vertical axis represents the level.

In FIG. 3, spectrum 201 of the transmission signal gives intersymbol interference by combining the outputs of modulator 105 and delay unit 107, for example, + fs.
An example in which a notch is formed at the position of / 2 is shown. A baseline spectrum 202 is superimposed as clock information on a frequency having this notch. This uses a method for facilitating the extraction of the clock component by the receiving unit 102. The transmission frequency converter 114 converts the modulated signal to a frequency in a transmission frequency band, amplifies the signal to a certain level, and outputs a transmission signal from a transmission output terminal 115.

Next, the operation of the receiving section 102 of FIG. 2 will be described. The reception signal input to signal input terminal 116 is input to reception frequency converter 117. The reception signal input to the reception frequency converter 117 is converted into a frequency of an intermediate frequency band there and output to the AGC amplifier 118. The AGC amplifier 118 fixes the fluctuating level of the reception signal output from the reception frequency converter 117 to a predetermined level, and the second BPF 121 and the decision feedback equalizer 119.
Output to

In the AGC amplifier 118, a flat
Eliminate level fluctuation due to fading. Here, the output spectrum of the received signal is as shown in FIG. Therefore, the clock frequency component as well as the intersymbol interference given by the transmitting unit 101 is 1
Since the waves become CW interference waves, they need to be removed. A decision feedback equalizer 119 is used to remove this interference wave. Since the decision feedback equalizer 119 includes a transversal filter type front filter and a rear filter, the position of the reference tap is fixed to the last stage of the front filter.

It is known that by shifting the position of the reference tap to the input side of the forward filter, it is possible to remove the intersymbol interference generated in the transmitting unit 101 and simultaneously remove the narrow-band interference wave component. Therefore, the decision feedback equalizer 119 in which the reference tap is shifted removes the intersymbol interference and the clock frequency component, and outputs the received signal to the demodulator 120 and the carrier regenerator 124. The carrier regenerator 124 receives the received signal, regenerates the carrier, and sends the regenerated carrier to the demodulator 120 and the second mixer 122.

On the other hand, the received signal of the intermediate frequency band fixed to a fixed level by the AGC amplifier 118 is a second BPF.
121, and in this second BPF 121,
The component of + fs / 2 is separated on the frequency axis, the clock frequency component is extracted from the received signal in the intermediate frequency band, and the output is sent to the second mixer 122. In the second mixer 122, the carrier is also input, and the second BPF 12
One output signal is converted into a baseband signal by mixing a carrier with the output signal. This baseband signal is a sine wave of fs / 2 synchronized with the received signal.

The baseband signal is sent to the clock regenerator 123. The clock regenerator 123 converts the baseband signal into a clock signal (2
fs) to the demodulator 120. The demodulator 120 receives the carrier reproduced by the carrier regenerator 124 and the clock signal reproduced by the clock regenerator 123 and demodulates the reception signal output from the decision feedback equalizer 119 into a reception determination signal. Then, while outputting this reception determination signal from the data output terminal 125, the clock output terminal 126
Outputs a clock signal.

[0033]

As described above, according to the digital radio apparatus of the present invention, the clock frequency component is superimposed on the modulation signal on the frequency axis independently of the input data to be transmitted by the transmission section. Even on a line in which fading occurs in a long span and the reception level fluctuates greatly, a stable clock can be supplied with a relatively simple configuration without expanding the signal band. Also, the receiving unit converts the received signal in the intermediate frequency band and the reproduced carrier into a baseband signal, and reproduces the clock signal from the sine wave synchronized with the received signal from the baseband signal.
It is not necessary to perform feedback control as in the L circuit, clock loss due to reception level fluctuation can be reduced, and the time from the loss of synchronization to the re-synchronization can be reduced. Therefore, the quality of the line can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a transmitting unit in a digital wireless device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a receiving unit in the first embodiment of the digital wireless device of the present invention.

FIG. 3 is a characteristic diagram showing an output spectrum of a combiner of a transmission unit in the first embodiment of the digital radio apparatus of the present invention.

FIG. 4 is a block diagram illustrating a configuration of a transmission unit of a conventional digital wireless device.

FIG. 5 is a block diagram illustrating a configuration of a receiving unit of a conventional digital wireless device.

FIG. 6 is a characteristic diagram showing a frequency spectrum of a transmission signal of a conventional digital radio device.

[Explanation of symbols]

A: Notch creation means, B: Frequency conversion means, C:
Clock recovery means, 101: transmission unit, 102: reception unit, 105: modulator, 106: phase shifter, 10
7 delay unit, 108 synthesizer, 109 carrier oscillator, 110 divider circuit, 111 sine wave generator, 112 first mixer, 113 first BP
F, 114: transmission frequency converter, 117: reception frequency converter, 118: AGC amplifier, 119: decision feedback equalizer, 120: demodulator, 121: second BP
F, 122 ... second mixer, 123 ... clock regenerator, 124 ... carrier regenerator.

Claims (8)

(57) [Claims] 1. A modulator for modulating a carrier output from a carrier oscillator by input data, and a location where 1 / N (N is an arbitrary integer) of a clock frequency of a modulation signal spectrum by inputting an output of the modulator. Notch creating means for creating a notch, frequency converting means for converting a signal synchronized with a transmission clock signal to a frequency in an intermediate frequency band by a carrier output from the carrier oscillator, output of the notch creating means and the frequency conversion A combiner for outputting a transmission signal obtained by superimposing an output of the modulator on an output of the modulator; and a transmission unit comprising: receiving the received signal, removing intersymbol interference and a clock frequency component of the received signal. Feedback equalizer including means for shifting the position of the reference tap, and a carrier for reproducing a carrier from the output signal of the feedback feedback equalizer. A regenerator, a clock regenerating means for regenerating a clock from the received signal and a carrier generated by the carrier regenerator, a carrier generated by the carrier regenerator and a clock signal generated by the clock regenerating means. And a demodulator for receiving an input signal and demodulating an output signal of the decision feedback equalizer into a reception decision signal. 2. The digital radio according to claim 1, wherein the transmission unit includes a transmission frequency converter that converts and amplifies an output of the combiner to a frequency in a transmission frequency band and outputs a transmission signal. apparatus. 3. The digital radio apparatus according to claim 1, wherein the receiving unit includes a receiving frequency converter that converts a received signal to a frequency in an intermediate frequency band and outputs a received intermediate frequency signal. 4. The notch creating means comprises a phase shifter for arbitrarily shifting the phase of output data of the modulator and a delayer for delaying the output of the phase shifter. The digital wireless device according to claim 1. 5. A frequency dividing circuit for dividing a transmission clock by 1 / N, and a sine wave generator for generating a sine wave synchronized with the transmission clock signal divided by the frequency dividing circuit. And a first mixer that mixes the sine wave generated by the sine wave generator and the carrier generated by the carrier oscillator to convert the sine wave to a frequency in an intermediate frequency band. The digital wireless device according to claim 1, wherein: 6. The digital signal according to claim 3, wherein the output signal of the first mixer extracts a signal of a predetermined frequency band by a first band-pass filter and outputs the extracted signal to the synthesizer. Wireless device. 7. A second band-pass circuit for extracting a clock frequency component from the received signal.
A filter, a second mixer that mixes an output signal of the second bandpass filter with a carrier reproduced by the carrier regenerator and converts the signal into a baseband frequency, and an output signal of the second mixer. 2. The digital radio apparatus according to claim 1, further comprising: a clock regenerator that regenerates a clock signal in synchronization. 8. The reception intermediate frequency signal output from the reception frequency converter, the level variation of which is fixed to a predetermined level by an automatic gain control amplifier. A digital wireless device according to claim 1.