JP3137537U - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP3137537U
JP3137537U JP2007006308U JP2007006308U JP3137537U JP 3137537 U JP3137537 U JP 3137537U JP 2007006308 U JP2007006308 U JP 2007006308U JP 2007006308 U JP2007006308 U JP 2007006308U JP 3137537 U JP3137537 U JP 3137537U
Authority
JP
Japan
Prior art keywords
electrode body
support electrode
plating layer
semiconductor device
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007006308U
Other languages
Japanese (ja)
Inventor
敦哉 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP2007006308U priority Critical patent/JP3137537U/en
Application granted granted Critical
Publication of JP3137537U publication Critical patent/JP3137537U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

【課題】支持電極体を放熱体（５）の嵌合孔に圧入する際に生じる半導体チップに対する応力（Ｐ）を低減し、電気的特性の劣化を防止して信頼性の高い半導体装置を提供する。
【解決手段】この半導体装置は支持電極体に半導体チップが固着されている。支持電極体は外部放熱板に形成された嵌合孔に圧入により装着される。支持電極体は金属製の本体部と、本体部の表面に形成されたメッキ層を備えている。メッキ層は本体部の硬度よりも高い硬度を有する。
【選択図】図１
Provided is a highly reliable semiconductor device in which stress (P) to a semiconductor chip generated when a support electrode body is press-fitted into a fitting hole of a radiator (5) is reduced, and deterioration of electrical characteristics is prevented. To do.
In this semiconductor device, a semiconductor chip is fixed to a support electrode body. The support electrode body is mounted by press-fitting into a fitting hole formed in the external heat radiating plate. The support electrode body includes a metal main body and a plating layer formed on the surface of the main body. The plating layer has a hardness higher than that of the main body.
[Selection] Figure 1

Description

本考案は半導体装置にかかり、特に半導体装置を放熱板に圧入する際に半導体チップに発生する応力が低減された半導体装置に関する。 The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which stress generated in a semiconductor chip when the semiconductor device is press-fitted into a heat sink is reduced.

半導体チップを固着した支持電極体が放熱体の嵌合孔に圧入して装着される半導体装置は、例えば下記特許文献１により公知の技術である。このような構造の半導体装置は図２に示すように、支持電極体（３１）と、支持電極体（３１）の上面（４０）に固着された半導体チップ（３２）と、半導体チップ（３２）の上面に固着された棒状のリード（３３）と、支持電極体（３１）の上面（４０）の外周縁に沿って環状に形成された筒状の側壁（３９）と、側壁（３９）の内側に充填されて半導体チップ（３２）及びリード（３３）を保護膜として被覆する樹脂被覆体（３４）とを備えた半導体装置である。 A semiconductor device in which a support electrode body to which a semiconductor chip is fixed is press-fitted into a fitting hole of a radiator is a known technique, for example, from Patent Document 1 below. As shown in FIG. 2, the semiconductor device having such a structure includes a support electrode body (31), a semiconductor chip (32) fixed to the upper surface (40) of the support electrode body (31), and a semiconductor chip (32). A rod-shaped lead (33) fixed to the upper surface of the electrode, a cylindrical side wall (39) formed in an annular shape along the outer peripheral edge of the upper surface (40) of the support electrode body (31), and a side wall (39) The semiconductor device includes a resin cover (34) filled inside and covering the semiconductor chip (32) and the lead (33) as a protective film.

この半導体装置は、図３に示すようにして、半導体チップ（３２）の固着された支持電極体（３１）が放熱体（３５）の嵌合孔（４５）に圧入されて使用される。すなわち、図２及び図３に示すように、支持電極体（３１）の底面（４１）を冶具（３６）により押圧して、半導体装置をリード（３３）側から放熱体（３５）の嵌合孔（４５）に圧入する。このとき、支持電極体（３１）の外径を放熱体（３５）の嵌合孔（４５）の内径よりも大きくすることによって、支持電極体（３１）を放熱体（３５）の嵌合孔（４５）に圧入したときに、支持電極体（３１）により放熱体（３５）の嵌合孔（４５）の内壁面が掘削されて装着されるため、支持電極体（３１）と放熱体（３５）との嵌合強度が十分に得られる。
特開 2002−261210号公報 As shown in FIG. 3, the semiconductor device is used by pressing the support electrode body (31) to which the semiconductor chip (32) is fixed into the fitting hole (45) of the radiator (35). That is, as shown in FIGS. 2 and 3, the bottom surface (41) of the support electrode body (31) is pressed by the jig (36), and the semiconductor device is fitted to the heat radiating body (35) from the lead (33) side. Press fit into hole (45). At this time, by making the outer diameter of the support electrode body (31) larger than the inner diameter of the fitting hole (45) of the radiator (35), the support electrode body (31) is fitted into the fitting hole of the radiator (35). Since the inner wall surface of the fitting hole (45) of the heat radiating body (35) is excavated and mounted by the support electrode body (31) when press-fitted into (45), the support electrode body (31) and the heat radiating body ( 35) is sufficiently obtained.
JP 2002-261210 A

上述のように、支持電極体（３１）を放熱体（３５）の嵌合孔（４５）に圧入したとき、支持電極体（３１）には放熱体（３５）から押圧力（圧縮力）が伝達され、支持電極体（３１）はその上面（４０）側を凸あるいは凹とする湾曲に変形するおそれがある。この結果、支持電極体（３１）の上面（４０）に固着された半導体チップ（３２）に応力が発生し、半導体チップ（３２）の電気的特性が劣化することがあった。この問題を解決するために、下記特許文献２の半導体装置では、支持電極体（３１）に関して硬度の高い素材を使用する試みをしている。すなわち、支持電極体（３１）の材質に加熱によって硬度増大が可能なジルコニウム銅を使用している。ジルコニウム銅は、水素雰囲気中で３８０℃程度の温度で10分間の熱処理を施すことにより、硬度を１２２Ｈｖから１３９Ｈｖにまで増大する事が出来る。それにより放熱体（３５）との硬度差が大きくなり、つまり支持電極体（３１）の硬度を放熱体（３５）の硬度よりも大きくでき、支持電極体（３１）を放熱体（３５）の嵌合孔（４５）に圧入したときに、支持電極体（３１）が変形することが抑制されて支持電極体（３１）側に伝達される応力が低減されると考えられた。
しかし、ジルコニウム銅は比較的高価であるために、この技術は比較的製造上のコストが高かった。
特開 2004−56015号公報 As described above, when the support electrode body (31) is press-fitted into the fitting hole (45) of the heat dissipation body (35), the support electrode body (31) receives a pressing force (compression force) from the heat dissipation body (35). As a result, the support electrode body (31) may be deformed into a curve having a convex or concave upper surface (40). As a result, stress is generated in the semiconductor chip (32) fixed to the upper surface (40) of the support electrode body (31), and the electrical characteristics of the semiconductor chip (32) may be deteriorated. In order to solve this problem, in the semiconductor device of Patent Document 2 below, an attempt is made to use a material having high hardness for the support electrode body (31). That is, zirconium copper capable of increasing the hardness by heating is used as the material of the support electrode body (31). Zirconium copper can be increased in hardness from 122 Hv to 139 Hv by performing heat treatment for 10 minutes at a temperature of about 380 ° C. in a hydrogen atmosphere. Thereby, the hardness difference from the radiator (35) becomes large, that is, the hardness of the support electrode body (31) can be made larger than the hardness of the radiator (35), and the support electrode body (31) When press-fitted into the fitting hole (45), the support electrode body (31) was restrained from being deformed, and the stress transmitted to the support electrode body (31) side was considered to be reduced.
However, because zirconium copper is relatively expensive, this technique was relatively expensive to manufacture.
Japanese Patent Laid-Open No. 2004-56015

より低いコストで支持電極体（１）の硬度を高める手段として、支持電極体（１）の本体部表面に高い硬度を有するメッキ層を形成するという解決策を選択する。硬度の高いメッキ層としては、たとえばリンニッケルメッキ層がある。このリンニッケルメッキ層は、ジルコニウム銅と同様に加熱処理を施すことによってその硬度がさらに増大するという性質を持っている。従来技術は支持電極体（１）の素材そのものを高価なジルコニウム銅で作成していたが、本考案においてはメッキを行うだけで硬度増大をはかる事が出来るという点でコスト的にも優れている。支持電極体（１）の本体部表面に高い硬度を有するメッキ層（１４）を形成することにより、支持電極体（１）の全体としての硬度を増大することができる。このため、支持電極体（１）を放熱体（５）の嵌合孔（１３）に圧入したとき、支持電極体（１）が半導体チップ（２）の電気的特性に影響を与えるほどに変形することがない。メッキ層（１４）をリンニッケルメッキ層とした場合には、その厚さが３μ以上で顕著な効果が現れる。焼き入れ（加熱処理）の条件として行った実験では、約４００℃の加熱処理を約１０分間行うことにより７００Hv以上のビッカーズ硬度を得ることが確認できている。 As a means for increasing the hardness of the support electrode body (1) at a lower cost, a solution of forming a plating layer having a high hardness on the surface of the main body portion of the support electrode body (1) is selected. An example of the plating layer having high hardness is a phosphor nickel plating layer. This phosphonickel plating layer has the property that its hardness is further increased by heat treatment in the same manner as zirconium copper. In the prior art, the material of the supporting electrode body (1) itself was made of expensive zirconium copper. However, in the present invention, the hardness can be increased only by plating, which is excellent in terms of cost. . By forming the plating layer (14) having a high hardness on the surface of the main body of the support electrode body (1), the overall hardness of the support electrode body (1) can be increased. For this reason, when the support electrode body (1) is press-fitted into the fitting hole (13) of the radiator (5), the support electrode body (1) is deformed so as to affect the electrical characteristics of the semiconductor chip (2). There is nothing to do. When the plating layer (14) is a phosphor nickel plating layer, a remarkable effect appears when the thickness is 3 μm or more. In an experiment conducted as a condition for quenching (heat treatment), it has been confirmed that a Vickers hardness of 700 Hv or more is obtained by performing a heat treatment at about 400 ° C. for about 10 minutes.

本考案によれば、支持電極体（１）を放熱体（５）の嵌合孔（１３）に圧入したときに、放熱体（５）からの押圧力によって支持電極体（１）が変形することが抑制される。この結果、半導体チップ（２）に発生する応力を低減でき、半導体チップ（２）の電気的特性が劣化することが防止される。 According to the present invention, when the support electrode body (1) is press-fitted into the fitting hole (13) of the radiator (5), the support electrode body (1) is deformed by the pressing force from the radiator (5). It is suppressed. As a result, the stress generated in the semiconductor chip (2) can be reduced, and the electrical characteristics of the semiconductor chip (2) are prevented from deteriorating.

本考案による半導体装置では、図１に示すように、底壁（７）及び底壁（７）の外周部に環状に形成された筒状の側壁（９）を有する皿状の支持電極体（１）と、支持電極体（１）の底壁（７）の上面（１０）に半田（１２）を介して固着された一方の電極面（２ａ）を有する半導体チップ（２）と、半導体チップ（２）の他方の電極面（２ｂ）に半田（１２）を介して固着されたリード（３）と、半導体チップ（２）及びリード（３）を被覆する樹脂被覆体（４）とを備えている。ここで、リード（３）は銅等の導電性金属材料により形成されており、樹脂被覆体（４）はエポキシ樹脂から形成されている。皿状の支持電極体（１）は上面に凹部（８）を有し、樹脂被覆体（４）はこの凹部（８）に充填されている。本実施形態の半導体装置は、底壁（７）の下面から冶具（６）を押し当て、支持電極体（１）が放熱体（５）の嵌合孔（１３）に圧入して装着される。 In the semiconductor device according to the present invention, as shown in FIG. 1, a dish-shaped support electrode body (9) having a bottom wall (7) and a cylindrical side wall (9) formed annularly on the outer periphery of the bottom wall (7). 1), a semiconductor chip (2) having one electrode surface (2a) fixed to the upper surface (10) of the bottom wall (7) of the support electrode body (1) via solder (12), and a semiconductor chip A lead (3) fixed to the other electrode surface (2b) of (2) via a solder (12), and a resin coating (4) covering the semiconductor chip (2) and the lead (3). ing. Here, the lead (3) is formed of a conductive metal material such as copper, and the resin cover (4) is formed of an epoxy resin. The dish-shaped support electrode body (1) has a recess (8) on the upper surface, and the resin cover (4) is filled in the recess (8). In the semiconductor device of the present embodiment, the jig (6) is pressed from the bottom surface of the bottom wall (7), and the support electrode body (1) is press-fitted into the fitting hole (13) of the heat radiating body (5). .

支持電極体（１）は、銅から形成された本体部（１ａ）と、この本体部（１ａ）の表面、即ち底壁（７）の上面（１０）および下面（１１）と側壁（９）の内側面、外側面および上面に形成されリンニッケルメッキから成るメッキ層（１４）を有する。リンニッケルメッキ層は、周知の無電解メッキ法によって形成されたリンニッケルメッキ層に約４００℃の加熱処理を約10分間施すことによって形成された金属メッキ層である。この金属メッキ層は加熱処理により結果的にリンニッケルメッキ合金層となっていると考えられる。 The supporting electrode body (1) includes a main body (1a) made of copper and the surface of the main body (1a), that is, the upper surface (10) and the lower surface (11) and the side wall (9) of the bottom wall (7). And a plating layer (14) made of phosphor nickel plating on the inner surface, the outer surface and the upper surface. The phosphorous nickel plating layer is a metal plating layer formed by subjecting a phosphoric nickel plating layer formed by a well-known electroless plating method to a heat treatment at about 400 ° C. for about 10 minutes. This metal plating layer is considered to be a phosphor nickel plating alloy layer as a result of heat treatment.

メッキ層の厚みは、支持電極体（１）の硬度を高めて変形が効果的に防止されるように３μｍ以上とするのが望ましい。しかし、リンニッケルメッキ層は、銅から成る本体部（１ａ）に比較して熱伝導性に劣るので、１０μｍ以下とするのが良い。本考案によれば、支持電極体（１）の硬度が増大しているので支持電極体（１）が変形することが抑制される。この結果、半導体チップ（２）に発生する応力を低減でき、半導体チップ（２）の電気的特性が劣化することが防止される。 The thickness of the plating layer is preferably 3 μm or more so as to increase the hardness of the support electrode body (1) and effectively prevent deformation. However, since the phosphor nickel plating layer is inferior in thermal conductivity as compared with the main body portion (1a) made of copper, it is preferable to set it to 10 μm or less. According to the present invention, since the hardness of the support electrode body (1) is increased, the support electrode body (1) is suppressed from being deformed. As a result, the stress generated in the semiconductor chip (2) can be reduced, and the electrical characteristics of the semiconductor chip (2) are prevented from deteriorating.

上記実施形態では、支持電極体（１）の表面全体にメッキ層（１４）を形成したが、メッキ層（１４）は支持電極体（１）の底壁（７）の上面および下面のいずれか一方または両方にのみ形成しても良い。このように支持電極体（１）の底壁（７）の上面および下面のいずれか一方または両方に形成すれば、支持電極体（１）を放熱体（５）の嵌合孔（１３）に圧入した時に、支持電極体（１）に放熱体（５）から加わる圧縮力に対する対抗力が強まる。この結果、支持電極体（１）が湾曲に変形する事が防止される。 In the said embodiment, although the plating layer (14) was formed in the whole surface of a support electrode body (1), a plating layer (14) is either the upper surface of the bottom wall (7) of a support electrode body (1), or a lower surface. You may form only in one or both. Thus, if it forms in any one or both of the upper surface of the bottom wall (7) of a support electrode body (1), and a lower surface, a support electrode body (1) will be in the fitting hole (13) of a heat radiator (5). When it press-fits, the opposing force with respect to the compressive force added to a support electrode body (1) from a heat radiator (5) becomes strong. As a result, the support electrode body (1) is prevented from being deformed into a curve.

図４に示すものは本考案の変形例である。支持電極体（１）の上部（１６）に保護リング（１５）を形成し、その内部に半導体チップ（２）を有する半導体装置において、底壁（７）、側壁（９）、上部（１６）にリンニッケルによるメッキ層（１４）を形成する。メッキ層（１４）の厚みは、支持電極体（１）の硬度を高めて変形が効果的に防止されるように３μｍ以上、１０μｍ以下とするのが望ましい。これにより支持電極体（１）の硬度が増大し支持電極体（１）が変形することが抑制される。この結果、半導体チップ（２）に発生する応力を低減でき、半導体チップ（２）の電気的特性が劣化することが防止される。


FIG. 4 shows a modification of the present invention. In a semiconductor device having a protective ring (15) formed on the upper part (16) of the support electrode body (1) and having a semiconductor chip (2) therein, a bottom wall (7), a side wall (9), and an upper part (16) Then, a plating layer (14) of phosphor nickel is formed. The thickness of the plating layer (14) is preferably 3 μm or more and 10 μm or less so as to increase the hardness of the support electrode body (1) and effectively prevent deformation. Thereby, the hardness of the support electrode body (1) is increased and the support electrode body (1) is suppressed from being deformed. As a result, the stress generated in the semiconductor chip (2) can be reduced, and the electrical characteristics of the semiconductor chip (2) are prevented from deteriorating.


は本考案による半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to the present invention. は従来技術において支持電極体を圧入しようとする状態を示す図である。These are figures which show the state which tries to press-fit a support electrode body in a prior art. は（図２）において支持電極体を圧入し終え、嵌合孔に装着された状態を示す図である。(FIG. 2) is a figure which shows the state which finished press-fitting a support electrode body in (FIG. 2), and was mounted | worn with the fitting hole. は本考案の変形例である。Is a modification of the present invention.

符号の説明Explanation of symbols

１、支持電極体
２、半導体チップ
２ａ、電極面
２ｂ、他方の電極面
３、リード
４、樹脂被覆体
５、放熱体
６、治具
７、底壁
８、凹部
９、側壁
９ａ、支持電極体表面
１０、内面
１１、外面
１２、半田
１３、嵌合孔
１４、メッキ層
１５、樹脂リング
１６、上部 DESCRIPTION OF SYMBOLS 1, Support electrode body 2, Semiconductor chip 2a, Electrode surface 2b, The other electrode surface 3, Lead 4, Resin coating body 5, Radiator 6, Jig 7, Bottom wall 8, Recess 9, Side wall 9a, Support electrode body Surface 10, inner surface 11, outer surface 12, solder 13, fitting hole 14, plating layer 15, resin ring 16, upper part

Claims (4)

支持電極体に半導体チップが固着され、前記支持電極体が外部放熱板に形成された嵌合孔に圧入により装着される半導体装置において、
前記支持電極体は、金属製の本体部と、該本体部の表面に形成され且つ前記本体部の硬度よりも高い硬度を有するメッキ層とを備えていることを特徴とする半導体装置。 In a semiconductor device in which a semiconductor chip is fixed to a support electrode body, and the support electrode body is mounted by press-fitting into a fitting hole formed in an external heat sink,
The support electrode body includes a metal main body and a plating layer formed on a surface of the main body and having a hardness higher than the hardness of the main body. 前記メッキ層は、無電解メッキで形成された金属層に加熱処理を施して形成されたメッキ層である事を特徴とする請求項１記載の半導体装置。 2. The semiconductor device according to claim 1, wherein the plating layer is a plating layer formed by subjecting a metal layer formed by electroless plating to a heat treatment. 前記支持電極体の本体部は銅又は銅合金から成り、前記メッキ層はリンニッケルから成ることを特徴とする請求項１記載の半導体装置。 2. The semiconductor device according to claim 1, wherein the main body portion of the support electrode body is made of copper or a copper alloy, and the plating layer is made of phosphorus nickel. 上部に保護リングに囲まれた樹脂被覆体を形成している支持電極体において、し、その内部に半導体チップを有し、かつ請求項２と３に示されたメッキ層を有する半導体装置。
4. A semiconductor device comprising: a support electrode body having a resin coating surrounded by a protective ring at an upper portion thereof; a semiconductor chip having a semiconductor chip therein; and a plating layer according to claim 2 and 3.
JP2007006308U 2007-08-15 2007-08-15 Semiconductor device Expired - Fee Related JP3137537U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007006308U JP3137537U (en) 2007-08-15 2007-08-15 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007006308U JP3137537U (en) 2007-08-15 2007-08-15 Semiconductor device

Publications (1)

Publication Number Publication Date
JP3137537U true JP3137537U (en) 2007-11-29

Family

ID=43287889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007006308U Expired - Fee Related JP3137537U (en) 2007-08-15 2007-08-15 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3137537U (en)

Similar Documents

Publication Publication Date Title
US9922911B1 (en) Power module with double-sided cooling
US9177934B2 (en) Connection arrangement of an electric and/or electronic component
CN107112316B (en) Semiconductor module
US9000580B2 (en) Power semiconductor module with pressed baseplate and method for producing a power semiconductor module with pressed baseplate
JP5071405B2 (en) Power semiconductor device
JPWO2014181426A1 (en) Semiconductor module
US20140367702A1 (en) Semiconductor device and method of manufacturing the same
US10505286B2 (en) Sensor element and manufacturing method of sensor element
US9401320B2 (en) Combined substrate
JP2018107276A (en) Electronic device
JP2014038993A (en) Core substrate and printed circuit board using the same
JP2006066813A (en) Semiconductor device
CN103681495A (en) Semiconductor device and method of manufacturing same
CN110071071A (en) The manufacturing method of semiconductor device and semiconductor device
JP4244760B2 (en) Semiconductor device
JP3137537U (en) Semiconductor device
US9299633B2 (en) Semiconductor device, heat radiation member, and manufacturing method for semiconductor device
JP2007053252A (en) Package for optical semiconductor devices and its manufacture
JP2020047377A (en) Semiconductor device and method of manufacturing the same
JP4637009B2 (en) Manufacturing method of semiconductor device
JP3137937U (en) Semiconductor device
JP3140903U (en) Semiconductor device
JP3140466U (en) Semiconductor device
JP4096776B2 (en) Semiconductor device
JP6509138B2 (en) Electrode built-in ceramic sintered body and method for manufacturing the same

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070925

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101107

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees