JP3131128B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP3131128B2
JP3131128B2 JP21175095A JP21175095A JP3131128B2 JP 3131128 B2 JP3131128 B2 JP 3131128B2 JP 21175095 A JP21175095 A JP 21175095A JP 21175095 A JP21175095 A JP 21175095A JP 3131128 B2 JP3131128 B2 JP 3131128B2
Authority
JP
Japan
Prior art keywords
hole
side wall
sealing material
coaxial connector
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP21175095A
Other languages
Japanese (ja)
Other versions
JPH0964219A (en
Inventor
博司 柴山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP21175095A priority Critical patent/JP3131128B2/en
Publication of JPH0964219A publication Critical patent/JPH0964219A/en
Application granted granted Critical
Publication of JP3131128B2 publication Critical patent/JP3131128B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Coupling Device And Connection With Printed Circuit (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子を収容
するための半導体素子収納用パッケージに関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device.

【0002】[0002]

【従来の技術】従来、半導体素子、特に高周波で作動す
る半導体素子を収容するための半導体素子収納用パッケ
ージは、一般に鉄−ニッケル−コバルト合金や銅−タン
グステン合金等の金属から成り、上面中央部に半導体素
子が搭載される搭載部を有する底板と、該底板上面外周
部に前記搭載部を囲繞するようにして立設され、その一
部に貫通孔を有する枠状の側壁と、前記側壁の貫通孔内
に挿入されるとともに該貫通孔内壁に側壁の内外を気密
に仕切るようにして接合され、且つ側壁内外に導出する
メタライズ配線層を有するセラミック端子と、前記側壁
上面に接合され、前記底板上面と側壁内面とで囲まれる
空間を気密に封止するための金属製蓋体とから構成され
ており、前記底板の搭載部に半導体素子を、該半導体素
子の各電極と電気的に接続された配線導体を有するセラ
ミック製の回路基板に実装された状態で搭載固定すると
ともに前記回路基板の配線導体とセラミック端子のメタ
ライズ配線層とをボンディングワイヤーを介して電気的
に接続し、しかる後、前記側壁の上面に金属製蓋体をロ
ウ付け法やシームウエルド法等の溶接法を採用して接合
し、底板、側壁、セラミック端子及び蓋体から成る容器
内部に半導体素子を気密に封止することによって製品と
しての半導体装置となり、前記側壁の外側に導出したセ
ラミック端子のメタライズ配線層を、半導体素子が電気
的に接続される外部電気回路基板の配線導体に例えば金
属リボンを介して電気的に接続することによって内部に
収容する半導体素子が外部電気回路に電気的に接続され
ることとなる。
2. Description of the Related Art Conventionally, a semiconductor device housing package for housing a semiconductor device, particularly a semiconductor device operating at a high frequency, is generally made of a metal such as an iron-nickel-cobalt alloy or a copper-tungsten alloy, and has a central portion on the upper surface. A bottom plate having a mounting portion on which a semiconductor element is mounted, a frame-shaped side wall having a through hole in a part of the bottom plate and being erected around an outer peripheral portion of an upper surface of the bottom plate; A ceramic terminal having a metallized wiring layer which is inserted into the through hole and is joined to the inner wall of the through hole so as to hermetically separate the inside and outside of the side wall, and is connected to the upper surface of the side wall; A metal lid for hermetically sealing a space surrounded by the upper surface and the inner surface of the side wall; a semiconductor element is mounted on the mounting portion of the bottom plate; And mounted and fixed in a state of being mounted on a ceramic circuit board having a wiring conductor connected to the wiring conductor, and electrically connecting the wiring conductor of the circuit board and the metallized wiring layer of the ceramic terminal via a bonding wire. Then, a metal lid is joined to the upper surface of the side wall by using a welding method such as a brazing method or a seam welding method, and the semiconductor element is hermetically sealed in a container including the bottom plate, the side wall, the ceramic terminal and the lid. By stopping, the metallized wiring layer of the ceramic terminal led out of the side wall is electrically connected to the wiring conductor of the external electric circuit board to which the semiconductor element is electrically connected via, for example, a metal ribbon. As a result, the semiconductor element housed inside is electrically connected to an external electric circuit.

【0003】しかしながら近時、半導体素子の作動周波
数の更なる高周波化に伴い、該半導体素子が電気的に接
続される外部電気回路基板は、その配線導体として、連
続して一定の特性インピーダンスが得られ、且つ外部か
らの電磁波シールド性に優れた同軸ケーブルが用いられ
るようになってきている。
However, recently, as the operating frequency of a semiconductor device has been further increased, an external electric circuit board to which the semiconductor device is electrically connected has been continuously provided with a constant characteristic impedance as its wiring conductor. In addition, coaxial cables having excellent electromagnetic wave shielding properties from the outside have been used.

【0004】そこで、前記半導体素子を収容する半導体
素子収納用パッケージも、外部電気回路基板の配線導体
である同軸ケーブルとの電気的接続を容易なものとする
ために外部電気回路基板の配線導体と電気的に接続され
る端子として、従来のセラミック端子に代えて同軸コネ
クターを備えたものが提案されている。
Therefore, a semiconductor element housing package for housing the semiconductor element is also connected to a wiring conductor of the external electric circuit board in order to facilitate electrical connection with a coaxial cable which is a wiring conductor of the external electric circuit board. As an electrically connected terminal, a terminal provided with a coaxial connector instead of a conventional ceramic terminal has been proposed.

【0005】この同軸コネクターを備えた半導体素子収
納用パッケージを図5に示す。図中、11は底板、12
は側壁、13は同軸コネクター、14は蓋体、15は半
導体素子、16はセラミック製の回路基板である。
FIG. 5 shows a semiconductor device housing package provided with the coaxial connector. In the figure, 11 is a bottom plate, 12
Is a side wall, 13 is a coaxial connector, 14 is a lid, 15 is a semiconductor element, and 16 is a ceramic circuit board.

【0006】この同軸コネクターを備えた半導体素子収
納用パッケージは、底板11の上面中央部に設けられた
搭載部11aに半導体素子15が該半導体素子15の電
極とボンディングワイヤー17を介して電気的に接続さ
れた配線導体16aを有する回路基板16に実装された
状態で搭載固定される。
In a package for housing a semiconductor element having this coaxial connector, a semiconductor element 15 is electrically connected to an electrode of the semiconductor element 15 via a bonding wire 17 on a mounting portion 11a provided at the center of the upper surface of the bottom plate 11. It is mounted and fixed while being mounted on the circuit board 16 having the connected wiring conductor 16a.

【0007】また、この同軸コネクターを備えた半導体
素子収納用パッケージは、側壁12の一部に同軸コネク
ター13が挿入固定される貫通孔12aが形成されてお
り、該貫通孔12a内には同軸コネクター13が挿入さ
れるとともに該同軸コネクター13と貫通孔12a内壁
とが半田等の封着材18を介して接合されている。
In the package for housing a semiconductor device having the coaxial connector, a through-hole 12a into which the coaxial connector 13 is inserted and fixed is formed in a part of the side wall 12, and the coaxial connector is provided in the through-hole 12a. 13, the coaxial connector 13 and the inner wall of the through hole 12a are joined via a sealing material 18 such as solder.

【0008】前記同軸コネクター13は、鉄−ニッケル
−コバルト合金等の金属から成る円筒状の外周導体13
aの中心部に同じく鉄−ニッケル−コバルト合金等の金
属から成る棒状の中心導体13bがガラス部材13cを
介して固定されて成り、外周導体13aが封着材18を
介して側壁12に電気的に接続されており、また中心導
体13bが半田を介して回路基板16の配線導体16a
に電気的に接続される。
The coaxial connector 13 has a cylindrical outer conductor 13 made of a metal such as an iron-nickel-cobalt alloy.
A rod-shaped central conductor 13b, also made of a metal such as an iron-nickel-cobalt alloy, is fixed to the central portion of a through a glass member 13c, and the outer peripheral conductor 13a is electrically connected to the side wall 12 via a sealing material 18. The center conductor 13b is connected to the wiring conductor 16a of the circuit board 16 via solder.
Is electrically connected to

【0009】この同軸コネクターを備えた半導体素子収
納用パッケージは、同軸コネクター13を外部電気回路
基板の配線導体である同軸ケーブルに接続することによ
って内部に収容する半導体素子15が外部電気回路に電
気的に接続されることとなる。
In the semiconductor element housing package provided with the coaxial connector, the coaxial connector 13 is connected to a coaxial cable, which is a wiring conductor of an external electric circuit board, so that the semiconductor element 15 housed inside is electrically connected to the external electric circuit. Will be connected.

【0010】尚、前記側壁12には、その上面から貫通
孔12aに至る封着材挿入孔12bが形成されており、
貫通孔12a内に同軸コネクター13を挿入するととも
に封着材挿入孔12bに半田等の封着材を挿入し、しか
る後、これを加熱して前記半田等の封着材を熔融させ、
該熔融した封着材を毛管現象により同軸コネクター13
と貫通孔12aの内壁との隙間に充填させることによっ
て同軸コネクター13が側壁部12の貫通孔12a内に
半田等の封着材18を介して固定される。
The side wall 12 is formed with a sealing material insertion hole 12b extending from the upper surface to the through hole 12a.
The coaxial connector 13 is inserted into the through hole 12a, and a sealing material such as solder is inserted into the sealing material insertion hole 12b. Thereafter, the sealing material is heated to melt the sealing material such as the solder.
The fused sealing material is removed from the coaxial connector 13 by capillary action.
The coaxial connector 13 is fixed in the through hole 12a of the side wall 12 via a sealing material 18 such as solder by filling the gap between the hole and the inner wall of the through hole 12a.

【0011】[0011]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージは、封着材挿入孔12
bが側壁12の上面側のみに設けられており、そのため
封着材挿入孔12b内に挿入した半田等の封着材が熔融
した際に、該熔融した封着材が同軸コネクター13と貫
通孔12a内壁との隙間のうち、前記封着材挿入孔12
bと反対側の隙間に十分に充填されず、その結果、側壁
部12内外の気密が十分に確保されず、内部に収容する
半導体素子15を長期間にわたり正常、且つ安定に作動
させることができないという欠点を有していた。
However, this conventional package for housing a semiconductor element has a sealing material insertion hole 12.
b is provided only on the upper surface side of the side wall 12, so that when the sealing material such as solder inserted into the sealing material insertion hole 12b is melted, the molten sealing material is connected to the coaxial connector 13 and the through hole. Of the sealing material insertion hole 12a in the gap with the inner wall 12a.
The gap on the side opposite to b is not sufficiently filled. As a result, the airtightness between the inside and outside of the side wall portion 12 is not sufficiently ensured, and the semiconductor element 15 housed therein cannot be operated normally and stably for a long period of time. Had the disadvantage that

【0012】[0012]

【課題を解決するための手段】本発明は、上面に半導体
素子が搭載される搭載部を有する底板と、該底板の上面
外周部に前記搭載部を囲繞するようにして立設され、且
つその一部に同軸コネクターが挿入固定される貫通孔が
設けられた枠状の側壁と、前記側壁の貫通孔に挿入さ
れ、且つ前記貫通孔内壁に封着材を介して固定された同
軸コネクターと、前記枠状の側壁上面に接合され、前記
底板上面と側壁内面とで囲まれる空間を気密に封止する
蓋体とから成る半導体素子収納用パッケージであって、
前記側壁に設けられた貫通孔は、側壁の内面側又は外面
側の少なくとも一方に該貫通孔の直径が側壁表面に向け
て全周にわたり段状又はテーパー状に広がる封着材挿入
部を有していることを特徴とするものであり、これによ
り前記貫通孔内に同軸コネクターを挿入するとともに封
着材挿入部の全周にわたり貫通孔内壁とコネクターとを
接合するための封着材となる半田材を挿入保持させ、該
半田材を加熱溶融させれば、貫通孔内壁と同軸コネクタ
ーとの間の隙間が全周にわたり封着材により充填され
る。
According to the present invention, there is provided a bottom plate having a mounting portion on which a semiconductor element is mounted on an upper surface, and an erect outer peripheral portion of the upper surface of the bottom plate surrounding the mounting portion. A frame-shaped side wall provided with a through hole in which a coaxial connector is partially inserted and fixed, and a coaxial connector inserted into the through hole of the side wall and fixed to the inner wall of the through hole with a sealing material, A semiconductor element housing package comprising: a lid joined to the upper surface of the frame-shaped side wall and hermetically sealing a space surrounded by the upper surface of the bottom plate and the inner surface of the side wall;
The through hole provided in the side wall has a sealing material insertion portion on at least one of the inner surface side and the outer surface side of the side wall, in which the diameter of the through hole spreads stepwise or tapered over the entire circumference toward the side wall surface. And a solder which serves as a sealing material for inserting the coaxial connector into the through hole and joining the inner wall of the through hole and the connector over the entire periphery of the sealing material insertion portion. When the material is inserted and held and the solder material is heated and melted, the gap between the inner wall of the through hole and the coaxial connector is filled with the sealing material over the entire circumference.

【0013】[0013]

【発明の実施の形態】次に本発明を添付図面に基づき詳
細に説明する。図1乃至図3は本発明の半導体素子収納
用パッケージの一実施例を示し、1は底板、2は側壁、
3は同軸コネクター、4は蓋体である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. 1 to 3 show one embodiment of a package for housing a semiconductor device according to the present invention, wherein 1 is a bottom plate, 2 is a side wall,
3 is a coaxial connector and 4 is a lid.

【0014】前記底板1は、鉄−ニッケル−コバルト合
金や銅−タングステン合金等の金属から成る略四角形状
の板体であり、その上面中央部には、半導体素子を搭載
するための搭載部1aが形成されており、該搭載部1a
には半導体素子5が、例えばアルミナ質セラミックスか
ら成り、上面に該半導体素子5の電極とボンディングワ
イヤー7を介して電気的に接続された配線導体16aを
有する回路基板6に実装された状態で搭載固定される。
The bottom plate 1 is a substantially rectangular plate made of a metal such as an iron-nickel-cobalt alloy or a copper-tungsten alloy, and a mounting portion 1a for mounting a semiconductor element is provided at the center of the upper surface. Is formed, and the mounting portion 1a
The semiconductor device 5 is mounted on a circuit board 6 made of, for example, alumina ceramics and having on its upper surface a wiring conductor 16a electrically connected to electrodes of the semiconductor device 5 via bonding wires 7. Fixed.

【0015】また前記底板1の上面外周部には搭載部1
aを囲繞するようにして枠状の側壁2が立設されてお
り、該側壁2は底板1とともに半導体素子5を収容する
空所を形成する作用を為す。
A mounting portion 1 is provided on the outer peripheral portion of the upper surface of the bottom plate 1.
A frame-shaped side wall 2 is erected so as to surround a. The side wall 2 functions to form a space accommodating the semiconductor element 5 together with the bottom plate 1.

【0016】前記側壁2は、底板1と同様に鉄−ニッケ
ル−コバルト合金や銅−タングステン合金等の金属から
成り、底板1と一体成形されることによって、あるいは
底板1に銀ロウ等のロウ材を介してロウ付けされたり、
シーム溶接法等の溶接法により溶接されることによって
底板1の上面外周部に立設される。
The side wall 2 is made of a metal such as an iron-nickel-cobalt alloy or a copper-tungsten alloy similarly to the bottom plate 1 and is formed integrally with the bottom plate 1 or the brazing material such as silver brazing is formed on the bottom plate 1. Or brazed through
The bottom plate 1 is erected on the outer periphery of the upper surface of the bottom plate 1 by being welded by a welding method such as a seam welding method.

【0017】前記側壁2は、その一部に同軸コネクター
が挿入固定される貫通孔2aが形成されており、該貫通
孔2a内には同軸コネクター3が挿入されるとともに同
軸コネクター3と貫通孔2a内壁とが半田から成る封着
材8を介して固定される。
The side wall 2 has a through hole 2a in which a coaxial connector is inserted and fixed. The coaxial connector 3 is inserted into the through hole 2a, and the coaxial connector 3 and the through hole 2a are inserted into the through hole 2a. The inner wall is fixed via a sealing material 8 made of solder.

【0018】更に前記側壁2に形成された貫通孔2a
は、図2に示す如く、その直径が外面に向けて全周にわ
たり段状に広がった封着材挿入部2bを有しており、該
封着材挿入部2bは、貫通孔2a内に同軸コネクター3
を封着材8を介して挿入固定する際に貫通孔2a内壁と
同軸コネクター3とを固定するための封着材8となる半
田材を貫通孔2a内壁と同軸コネクター3とを接合する
際に貫通孔2a内壁と同軸コネクター3との間の隙間の
全周に沿って保持する作用を為す。
Further, a through hole 2a formed in the side wall 2 is provided.
Has a sealing material insertion portion 2b whose diameter is spread stepwise over the entire circumference toward the outer surface, as shown in FIG. 2, and the sealing material insertion portion 2b is coaxial with the through hole 2a. Connector 3
When the solder is used as the sealing material 8 for fixing the inner wall of the through hole 2a and the coaxial connector 3 when the inner wall of the through hole 2a is inserted and fixed via the sealing material 8, It functions to hold along the entire circumference of the gap between the inner wall of the through hole 2a and the coaxial connector 3.

【0019】前記側壁2に形成された貫通孔2aは、そ
の直径が外面に向けて全周にわたり段状に広がった封着
材挿入部2bを有していることから、貫通孔2a内に同
軸コネクター3を挿入するとともに封着材挿入部2bの
全周にわたり貫通孔2a内壁とコネクター3とを接合す
るための封着材8となる半田材を挿入保持させ、該半田
材を加熱溶融させれば、貫通孔2a内壁と同軸コネクタ
ー3との間の隙間が全周にわたり封着材8により充填さ
れ、従って側壁2の内外が完全に気密に仕切られる。
The through hole 2a formed in the side wall 2 has a sealing material insertion portion 2b whose diameter is stepwise spread over the entire circumference toward the outer surface. The connector 3 is inserted, and a solder material serving as a sealing material 8 for joining the inner wall of the through hole 2a and the connector 3 is inserted and held over the entire periphery of the sealing material insertion portion 2b, and the solder material is heated and melted. For example, the gap between the inner wall of the through hole 2a and the coaxial connector 3 is filled with the sealing material 8 over the entire circumference, and therefore the inside and outside of the side wall 2 are completely airtightly partitioned.

【0020】前記貫通孔2a内に挿入固定される同軸コ
ネクター3は、内部に収容する半導体素子5を外部電気
回路基板の配線導体としての同軸ケーブルに電気的に接
続する作用を為し、鉄−ニッケル−コバルト合金等の金
属から成る円筒状の外周導体3aの中心部に同じく鉄−
ニッケル−コバルト合金等の金属から成る中心導体3b
が封着ガラス部材3cを介して固定された構造をしてお
り、外周導体3aが側壁2に封着材8を介して、中心導
体3bが回路基板6の配線導体6aに半田等の導電性接
着剤を介してそれぞれ電気的に接続されている。
The coaxial connector 3 inserted and fixed in the through-hole 2a functions to electrically connect the semiconductor element 5 housed therein to a coaxial cable as a wiring conductor of an external electric circuit board. An iron-like material is also provided at the center of the cylindrical outer conductor 3a made of a metal such as a nickel-cobalt alloy.
Center conductor 3b made of metal such as nickel-cobalt alloy
Has a structure in which the outer conductor 3a is fixed to the side wall 2 via the sealing material 8 and the center conductor 3b is fixed to the wiring conductor 6a of the circuit board 6 by soldering or the like. Each is electrically connected via an adhesive.

【0021】尚、前記同軸コネクター3を側壁2の貫通
孔2a内に封着材8を介して固定するには、図3
(a)、(b)に示すように側壁2の貫通孔2a内に同
軸コネクター3を挿入するとともに貫通孔2aの封着材
挿入部2bに例えば、封着材8となるリング状の半田材
Aをコネクター3を取り囲むようにして挿入し、しかる
後、前記半田材Aを一旦加熱熔融させるとともに冷却固
化させる方法が採用され、この場合、溶融したリング状
の半田材Aは貫通孔2a内壁と同軸コネクター3との間
の隙間の全周にわたり充填されて封着材8となり、その
結果、側壁2の内外の気密が損なわれることは一切な
い。
In order to fix the coaxial connector 3 in the through hole 2a of the side wall 2 via the sealing material 8, FIG.
(A) As shown in (b), the coaxial connector 3 is inserted into the through hole 2a of the side wall 2 and, for example, a ring-shaped solder material serving as the sealing material 8 is inserted into the sealing material insertion portion 2b of the through hole 2a. A is inserted so as to surround the connector 3, and thereafter, a method is adopted in which the solder material A is once heated and melted and then solidified by cooling. In this case, the molten ring-shaped solder material A is connected to the inner wall of the through hole 2 a. The sealing material 8 is filled over the entire circumference of the gap between the coaxial connector 3 and the sealing material 8. As a result, the inside and outside airtightness of the side wall 2 is not impaired at all.

【0022】かくして本発明の半導体素子収納用パッケ
ージによれば、底板1の搭載部1aに半導体素子5を該
半導体素子5の電極と電気的に接続された配線導体6a
を有する回路基板6に実装した状態で搭載固定し、しか
る後、前記回路基板6の配線導体6aと同軸コネクター
3の中心導体3bとを半田を介して電気的に接続し、最
後に側壁2の上面に鉄−ニッケル−コバルト合金等の金
属から成る蓋体を半田付け法やシームウエルド法により
接合することにより製品としての半導体装置となり、同
軸コネクター3と外部電気回路基板の配線導体としての
同軸ケーブルとを嵌合させることにより内部に収容する
半導体素子5が外部電気回路に電気的に接続されること
となる。
Thus, according to the semiconductor element housing package of the present invention, the semiconductor element 5 is mounted on the mounting portion 1a of the bottom plate 1 by the wiring conductor 6a electrically connected to the electrode of the semiconductor element 5.
The wiring conductor 6a of the circuit board 6 and the center conductor 3b of the coaxial connector 3 are electrically connected to each other via solder, and finally the side wall 2 is fixed. A semiconductor device as a product is obtained by joining a lid made of a metal such as an iron-nickel-cobalt alloy on the upper surface by a soldering method or a seam welding method, and a coaxial cable as a wiring conductor of the coaxial connector 3 and an external electric circuit board. The semiconductor element 5 housed inside is electrically connected to an external electric circuit by fitting the two.

【0023】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば上述の実施例では側壁2
に形成された貫通孔2aに段状の封着材挿入部2bを設
けたが、これを図4に示す如く、テーパー状の封着材挿
入部2bに変えてもよく、更に上述の実施例では側壁2
の外面側に封着材挿入部2bを設けたが、これを側壁2
の内面側、或いは内面側と外面側の両方に設けてもよ
い。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.
Although the step-like sealing material insertion portion 2b is provided in the through hole 2a formed in the first embodiment, as shown in FIG. 4, this may be changed to a tapered sealing material insertion portion 2b. Then side wall 2
The sealing material insertion portion 2b is provided on the outer surface side of the
May be provided on the inner surface side or on both the inner surface side and the outer surface side.

【0024】[0024]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、側壁に設けられた貫通孔が側壁の内面側又は外
面側の少なくとも一方に該貫通孔の直径が側壁表面に向
けて全周にわたり段状又はテーパー状に広がる封着材挿
入部を有していることをから、貫通孔内に同軸コネクタ
ーを挿入するとともに封着材挿入部の全周にわたり貫通
孔内壁とコネクターとを接合するための封着材となる半
田材を挿入保持させ、該半田材を加熱溶融させれば、貫
通孔内壁と同軸コネクターとの間の隙間が全周にわたり
封着材により充填され、その結果、側壁の内外が完全に
気密に仕切られることとなり、従って半導体素子を収容
する容器の気密が損なわれることはなく、内部に収容す
る半導体素子を長期にわたり正常、且つ安定に作動させ
ることができる。
According to the semiconductor device housing package of the present invention, the through hole provided in the side wall has at least one of the inner surface side and the outer surface side of the side wall, and the diameter of the through hole extends over the entire circumference toward the side wall surface. Because it has a sealing material insertion portion that spreads in a stepped or tapered shape, it is necessary to insert the coaxial connector into the through hole and to join the through hole inner wall and the connector over the entire circumference of the sealing material insertion portion. If a solder material serving as a sealing material is inserted and held, and the solder material is heated and melted, the gap between the inner wall of the through hole and the coaxial connector is filled with the sealing material over the entire circumference, and as a result, the side wall The inside and the outside are completely airtightly partitioned, so that the airtightness of the container housing the semiconductor element is not impaired, and the semiconductor element housed inside can be operated normally and stably for a long time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

【図2】図1に示す半導体素子収納用パッケージの要部
拡大断面図である。
2 is an enlarged cross-sectional view of a main part of the package for housing a semiconductor element shown in FIG. 1;

【図3】(a)(b)はそれぞれ図1に示す半導体素子
収納用パッケージの側壁に設けた貫通孔内に同軸コネク
ターを封着材を介して挿入固着する方法を説明するため
の断面図である。
FIGS. 3A and 3B are cross-sectional views for explaining a method of inserting and fixing a coaxial connector via a sealing material into a through hole provided in a side wall of the package for housing a semiconductor element shown in FIG. 1; It is.

【図4】本発明の他の実施の形態を示す要部断面図であ
る。
FIG. 4 is a cross-sectional view of a principal part showing another embodiment of the present invention.

【図5】従来の半導体素子収納用パッケージを示す断面
図である。
FIG. 5 is a cross-sectional view showing a conventional semiconductor device housing package.

【符号の説明】[Explanation of symbols]

1・・・・・・底板 1a・・・・・搭載部 2・・・・・・側壁 2a・・・・・貫通孔 2b・・・・・封着材挿入部 3・・・・・・同軸コネクター 4・・・・・・蓋体 5・・・・・・半導体素子 8・・・・・・封着材 1 Bottom plate 1a Mounting part 2 Side wall 2a Through hole 2b Sealing material insertion part 3 Coaxial connector 4 Lid 5 Semiconductor element 8 Sealing material

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】上面に半導体素子が搭載される搭載部を有
する底板と、該底板の上面外周部に前記搭載部を囲繞す
るようにして立設され、且つその一部に同軸コネクター
が挿入固定される貫通孔が設けられた枠状の側壁と、前
記側壁の貫通孔に挿入され、且つ前記貫通孔内壁に封着
材を介して固定された同軸コネクターと、前記枠状の側
壁上面に接合され、前記底板上面と側壁内面とで囲まれ
る空間を気密に封止する蓋体とから成る半導体素子収納
用パッケージであって、前記側壁に設けられた貫通孔
は、側壁の内面側又は外面側の少なくとも一方に該貫通
孔の直径が側壁表面に向けて段状又はテーパー状に広が
る封着材挿入部を有していることを特徴とする半導体素
子収納用パッケージ。
1. A bottom plate having a mounting portion on which a semiconductor element is mounted on an upper surface, and a coaxial connector is inserted and fixed on an outer peripheral portion of the upper surface of the bottom plate so as to surround the mounting portion. A frame-shaped side wall provided with a through hole to be provided, a coaxial connector inserted into the through hole of the side wall and fixed to the inner wall of the through hole via a sealing material, and joined to an upper surface of the frame-shaped side wall And a lid for hermetically sealing a space enclosed by the upper surface of the bottom plate and the inner surface of the side wall, wherein the through-hole provided in the side wall has an inner surface side or an outer surface side of the side wall. Characterized in that at least one of the above has a sealing material insertion portion in which the diameter of the through hole expands stepwise or tapered toward the side wall surface.
JP21175095A 1995-08-21 1995-08-21 Package for storing semiconductor elements Expired - Fee Related JP3131128B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21175095A JP3131128B2 (en) 1995-08-21 1995-08-21 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21175095A JP3131128B2 (en) 1995-08-21 1995-08-21 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH0964219A JPH0964219A (en) 1997-03-07
JP3131128B2 true JP3131128B2 (en) 2001-01-31

Family

ID=16610969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21175095A Expired - Fee Related JP3131128B2 (en) 1995-08-21 1995-08-21 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP3131128B2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141594A (en) * 2000-10-30 2002-05-17 Kyocera Corp Package for containing semiconductor element
JP3720726B2 (en) * 2001-04-20 2005-11-30 京セラ株式会社 Semiconductor element storage package and semiconductor device
JP3690656B2 (en) * 2001-04-20 2005-08-31 京セラ株式会社 Semiconductor element storage package and semiconductor device
JP3934972B2 (en) * 2002-03-26 2007-06-20 京セラ株式会社 Circuit board, semiconductor element storage package, and semiconductor device
JP3934971B2 (en) * 2002-03-26 2007-06-20 京セラ株式会社 Circuit board, semiconductor element storage package, and semiconductor device
JP2004207259A (en) * 2002-10-04 2004-07-22 Kyocera Corp Optical semiconductor device and package for housing the same
JP2011123189A (en) * 2009-12-09 2011-06-23 Anritsu Corp Bonding method of core of connector, and optical modulator module manufactured thereby
JP2012134350A (en) * 2010-12-22 2012-07-12 Kyocera Corp Semiconductor device package structure
JP2014167995A (en) * 2013-02-28 2014-09-11 Kyocera Corp Electronic component storing package and electronic device using the same
JP6239999B2 (en) * 2014-02-25 2017-11-29 京セラ株式会社 Electronic component storage package and electronic device

Also Published As

Publication number Publication date
JPH0964219A (en) 1997-03-07

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