JP3126478B2 - Radar equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radar device mounted on a ship or the like, and more particularly to an improvement in S / N.

[0002]

2. Description of the Related Art A radar device mounted on a ship or the like has an aerial that can rotate in a horizontal plane. This aerial is installed at a place with a good view on the ship, and transmits radio waves to the surroundings at a predetermined timing. When this radio wave is reflected by a target (such as another ship) existing in the surroundings, the reflected wave is received by the antenna. The distance to the target can be known by the time from transmission to reception, and the azimuth of the target can be known by the azimuth of the antenna at the time of transmission and reception, so the information obtained by the radar device is the information that represents the surrounding situation in polar coordinate format You can say that.

FIG. 3 shows the configuration of a radar apparatus according to a conventional example. The device shown in this figure comprises an antenna 1 rotatable in a horizontal plane. When a signal is given to the transceiver control circuit 10 by the CPU circuit 11,
In response to this signal, the transceiver control circuit 10 causes the antenna 1 to transmit radio waves. When the reflected wave is received by the antenna 1, an analog signal is output from the antenna 1 in response to the analog signal, and the analog signal is converted into digital data by the A / D conversion circuit 2 and is changed every one sweep (one transmission / reception). Is stored in the sweep memory 3. Since the data obtained in this way is polar coordinate type data as described above, when displaying a radar image on the screen of the raster scan type CRT display 9 based on this data, the data is converted to polar coordinate type data. It must be converted from model to Cartesian format. This conversion is executed by the coordinate conversion circuit 4 as control of the write address to the radar video frame memory 5.

That is, the coordinate conversion circuit 4 receives an angle signal from the angle signal control circuit 7 operating under the control of the CPU circuit 11, and executes a coordinate conversion operation based on the angle signal.
The angle signal control circuit 7 receives a pulse-shaped antenna rotation signal generated by the antenna rotation signal generation circuit 6 according to the rotation of the antenna 1 and outputs an angle signal indicating the azimuth of the antenna 1. Since the distance R between the targets is indicated by the bit position of the data on the sweep memory 3 and the relative azimuth θ of the target is indicated by the angle signal, the coordinate conversion circuit 4 uses the data video frame memory 5 based on the following equation. Then, a write address (X, Y) is generated to execute coordinate conversion from the polar coordinate type to the rectangular coordinate type.

X = XS + R × sin θ Y = YS + R × cos θ where (XS, YS) is the ship's position and the center point of the radar image.

When the coordinate conversion is executed in this way and the data relating to the radar image is stored in the radar image frame memory 5, this data is converted into an analog signal by the D / A conversion circuit 8, and the CRT display 9 Supplied to On the other hand, the graphic control circuit 12 generates a graphic image related to a cursor or the like under the control of the CPU circuit 11,
The data relating to this video is stored in the graphic frame memory 1
3 is stored. On the screen of the CRT display 9, based on the data relating to the radar video stored in the radar video frame memory 5 and the data relating to the graphic video stored in the graphic frame memory 13, a video in which both are superimposed is displayed. Will be displayed.

[0007]

However, the conventional radar apparatus having such a configuration has a problem as shown in FIG. 4, for example. That is, when the same memory cell (hatched portion) on the radar video frame memory is accessed by three consecutive sweeps for each of the angles θ1 to θ3, the data of the sweep related to the last accessed angle θ3 Is written to the memory cell. Therefore, for example, θ1, θ
If the data related to θ3 is “0” even if the data related to 2 is “1”, the data written to the memory cell will be “0”. In such a case, it is naturally natural that the data to be written into the memory cell is set to “1”. However, this is not the case with the conventional configuration.

[0008] Such a problem becomes more prominent near the center point of a radar image in which multiple accesses frequently occur, that is, near the own ship position. Therefore, methods for solving such a problem have been conventionally studied. As one of the methods, data having the largest gradation value among a plurality of sweep-related data accessing the same memory cell is referred to as the memory cell. Has been developed. In this way, as described above, two of the three accesses are “1”, 1
If the number of times is "0", "1" will be written, and it will be closer to a more natural radar image.

However, when such an improvement is made, there is a possibility that the S / N ratio is further reduced. That is, when a noise having a high gradation value (level) is included even in one sweep among a plurality of sweeps accessing the same memory cell, this noise is written on the memory cell, and S / S N is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and can provide a radar image that is more natural and close to the actual one.
The object of the present invention is to provide a radar apparatus having a good / N ratio.

[0011]

In order to achieve such an object, a radar apparatus according to the present invention has a configuration as shown in FIG. That is, a plurality of radar video frame memories A (A-1,... An) are provided, and data relating to different sweeps that are successively successive to each other are written in the respective radar video frame memories A-1 to An. The write control circuit B averages data between corresponding memory cells on the plurality of radar video frame memories A-1 to An and averages data obtained as a result of D / A conversion.
And an averaging circuit C for displaying a radar image on a display based on an image signal obtained by supplying the road to the road .

[0012]

In the present invention, data relating to successive different sweeps are written into different radar video frame memories A-1 to An. For example, the first sweep is written to the radar video frame memory A-1,..., The nth sweep is written to the radar video frame memory An, and so on. The write control circuit B realizes such writing. The averaging circuit C averages the data in each of the radar video frame memories A-1 to An,
Generate radar images. At this time, even if noise data having a high gradation value is written in any of the radar video frame memories A-1 to An, the influence of the noise data on the radar video is reduced by 1 / A by the averaging circuit C. Since it is reduced by n times, S / N is improved.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. The same components as those in the conventional example shown in FIG.

FIG. 2 shows the configuration of a radar apparatus according to one embodiment of the present invention. The device shown in this figure
A total of two radar video frame memories 5-1 and 5-2 are provided, and a write control circuit 22 that controls which of the two frame memories 5-1 and 5-2 writes sweep data is provided. Have. Further, at the subsequent stage of the radar video frame memories 5-1 and 5-2, the data on both the frame memories 5-1 and 5-2 are averaged and D
An averaging circuit 21 for supplying to the / A conversion circuit 8 is provided.

The write control circuit 22 writes data into, for example, a radar video frame memory 5-1 when performing coordinate conversion on data relating to a certain sweep, and performs radar conversion when performing coordinate conversion on data relating to the next sweep. This is a circuit for controlling which of the two frame memories 5-1 and 5-2 is to be written, such as writing to the video frame memory 5-2. The writing control circuit 22 performs this switching under the control of the CPU circuit 11, for example, or by monitoring the angle signal output from the angle signal control circuit 7. Radar video frame memories 5-1 and 5-2
Is averaged by the averaging circuit 21 as described earlier with reference to FIG.
Is converted into an analog signal.

Therefore, according to this embodiment, when multiple accesses are made to the same memory cell, data relating to the last two times of the multiple access is averaged, and a radar image is generated. As a result, it is possible to obtain a radar image in which noise is reduced to half that of the related art.
The number of radar video frame memories 5 is not limited to two.

[0017]

As described above, according to the present invention,
The data obtained by the coordinate transformation is stored in a different radar video frame memory A for each sweep, and these are averaged by the averaging circuit C, so that the contribution of noise to the radar video is reduced to 1 / n. In addition, S / N is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of the present invention.

FIG. 2 is a block diagram showing a configuration of a radar device according to one embodiment of the present invention.

FIG. 3 is a block diagram illustrating a configuration of a radar device according to a conventional example.

FIG. 4 is a diagram showing a problem of a conventional example.

[Explanation of symbols]

A-1,... An, 5-1 and 5-2 radar video frame memory B, 22 write control circuit C, 21 averaging circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-103784 (JP, A) JP-A-62-113078 (JP, A) JP-A-2-218352 (JP, A) JP-A-3-103 183981 (JP, A) JP-A-62-147379 (JP, A) JP 2-11877 (JP, B2) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01S 7/04-7 / 24 G01S 7/285-7/34

Claims (1)

(57) [Claims] 1. A radar image frame memory for storing data relating to a radar image in a rectangular coordinate system, and a write address for converting data relating to the radar image obtained by one sweep from a polar coordinate system to a rectangular coordinate system. a coordinate transformation circuit for writing in the radar image frame memory while controlling the, et provided downstream than the radar image frame memory
D / A conversion circuit that generates a video signal by D / A conversion
Road and a lath displaying a radar image based on this image signal.
And Tasukyan type display, in the radar device and a write control circuit with including a plurality of radar video frame memory, thereby written respectively Statement data relating to each other successive different sweep sequentially to each radar image frame memory, the The data of the corresponding memory cells on a plurality of radar video frame memories are averaged, and the resulting data is supplied to a D / A conversion circuit to display a radar video on a display based on a video signal obtained . A radar device comprising: an averaging circuit.