JPH05288830A - Radar apparatus - Google Patents

Abstract

PURPOSE:To enhance the S/N ratio of a radar image. CONSTITUTION:A radar-image frame memory 5 is installed as a plurality of radar-image farme memories 5-1, 5-2. Data which have been obtained by means of a coordinate conversion are written into the memories 5-1, 5-2 under the control of a write control circuit 22; they are averaged by means of an averaging circuit 21; averaged data are output to a D/A conversion circuit 8. Even when a noise having a high gradation value is contained in the data written into either the frame memory 5-1 or 5-2, the contribution portion of the noise to a radar image displayed on the screen of a CRT display device 9 is reduced to 1/n (where (n) represents the number of radar image frame memories).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radar device mounted on a ship or the like, and more particularly to improving the S / N ratio thereof.

[0002]

2. Description of the Related Art A radar device mounted on a ship or the like has an antenna that can rotate in a horizontal plane. This antenna is installed in a place with a good view on the ship and transmits radio waves to the surroundings at a predetermined timing. When this radio wave is reflected by a target (another ship, etc.) existing around, the reflected wave is received by the antenna. The distance to the target can be known from the time from transmission to reception, and the bearing of the target can be known from the bearing of the antenna during transmission and reception. You can say that.

FIG. 3 shows the configuration of a radar device according to a conventional example. The device shown in this figure comprises an antenna 1 rotatable in a horizontal plane. When a signal is given to the transceiver control circuit 10 by the CPU circuit 11,
In response to this signal, the transceiver control circuit 10 causes the antenna 1 to transmit radio waves. When the reflected wave is received by the antenna 1, an analog signal is output from the antenna 1 in response to this, and the analog signal is converted into digital data by the A / D conversion circuit 2, and every sweep (one transmission / reception) Are stored in the sweep memory 3. Since the data obtained in this way is of the polar coordinate type as described above, when the radar image is to be displayed on the screen of the raster scan type CRT display 9 based on this data, the data is polar coordinate type. The type must be converted to Cartesian type. This conversion is executed by the coordinate conversion circuit 4 as control of the write address to the radar image frame memory 5.

That is, the coordinate conversion circuit 4 receives the angle signal from the angle signal control circuit 7 which operates under the control of the CPU circuit 11, and executes the coordinate conversion operation based on this.
The angle signal control circuit 7 inputs the pulsed antenna rotation signal generated by the antenna rotation signal generation circuit 6 in response to the rotation of the antenna 1, and outputs the angle signal indicating the azimuth of the antenna 1. Since the distance R between the targets is indicated by the bit position of the data on the sweep memory 3 and the relative azimuth θ of the target is indicated by the angle signal, the coordinate conversion circuit 4 uses the data image frame memory 5 based on the following equation. A write address (X, Y) is generated and the coordinate conversion from the polar coordinate type to the rectangular coordinate type is executed.

X = XS + R × sin θ Y = YS + R × cos θ where (XS, YS) is the ship's position, which is the center point of the radar image.

When the coordinate conversion is executed in this way and the data relating to the radar image is stored in the radar image frame memory 5, this data is converted into an analog signal by the D / A conversion circuit 8, and the CRT display 9 Is supplied to. On the other hand, the graphic control circuit 12 generates a graphic image related to a cursor under the control of the CPU circuit 11,
The data related to this video is stored in the graphic frame memory 1
Store in 3. On the screen of the CRT display device 9, an image obtained by superimposing both the radar image data stored in the radar image frame memory 5 and the graphic image data stored in the graphic frame memory 13 is displayed. Will be displayed.

[0007]

However, in the conventional data device having such a structure, there arises a problem as shown in FIG. 4, for example. That is, when the same memory cell (hatched portion) in the radar image frame memory is accessed by three consecutive sweeps for each of the angles θ1 to θ3, the data of the sweep related to the angle θ3 that was last accessed. Is written in the memory cell. Therefore, for example, θ1, θ
If the data related to 2 is “1” but the data related to θ3 is “0”, the data written in the memory cell will be “0”. In such a case, it is naturally more natural to set the data written in the memory cell to "1". However, this is not the case with the conventional configuration.

Such a problem becomes more prominent in the vicinity of the center point of the radar image where multiple access frequently occurs, that is, in the vicinity of the position of the ship. Therefore, a method for solving such a problem has been conventionally studied, and as one of them, the one having the largest grayscale value among the data related to a plurality of sweeps accessing the same memory cell is selected as the memory cell. The method of writing in has been developed. By doing this, as described above, 2 out of 3 accesses are "1", 1
If the number of times is "0", "1" is written, and the image becomes closer to a natural radar image.

However, when such an improvement is made, there is a possibility that the S / N will be further reduced. That is, if noise having a high gradation value (level) is included in even one sweep among a plurality of sweeps that access the same memory cell, this noise is written in the memory cell, and S / This leads to a decrease in N.

The present invention has been made to solve the above problems, and it is possible to obtain a more natural and realistic radar image, and to obtain the S of the radar image.
An object of the present invention is to provide a radar device having a good / N.

[0011]

In order to achieve such an object, the radar apparatus of the present invention has a structure as shown in FIG. That is, a book that includes a plurality of radar image frame memories A (A-1, ... A-n) and writes data relating to different continuous sweeps in order to the radar image frame memories A-1 to A-n, respectively. Embedded control circuit B and each radar image frame memory A-1
~ A-n, and an averaging circuit C for averaging the data on A-n to generate a radar image.

[0012]

In the present invention, data relating to different continuous sweeps are written in different radar image frame memories A-1 to A-n. For example, the first sweep is written in the radar image frame memory A-1, the nth sweep is written in the radar image frame memory A-n, and so on. The write control circuit B realizes such writing. Then, the averaging circuit C averages the data on the radar image frame memories A-1 to A-n,
Generate radar images. At this time, even if noise data having a high gradation value is written in any of the radar image frame memories A-1 to A-n, the effect of this noise data on the radar image is 1 / Since it is reduced to n times, the S / N is improved.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. It should be noted that the same components as those of the conventional example shown in FIG.

FIG. 2 shows the structure of a radar device according to an embodiment of the present invention. The device shown in this figure
The radar image frame memory 5 includes a total of two 5-1 and 5-2, and a write control circuit 22 for controlling which of the frame memories 5-1 and 5-2 the sweep data is written to. I have it. Further, in the subsequent stage of the radar image frame memories 5-1 and 5-2, the data on both frame memories 5-1 and 5-2 are averaged to obtain D
An averaging circuit 21 for supplying to the / A conversion circuit 8 is provided.

The write control circuit 22 writes data in a radar image frame memory 5-1 in the case of coordinate conversion of data relating to a certain sweep, and the radar in the case of coordinate conversion of data relating to the next sweep. This circuit controls which of the two frame memories 5-1 and 5-2 is to be written, such as writing to the video frame memory 5-2. The writing control circuit 22 performs this switching, for example, under the control of the CPU circuit 11 or by monitoring the angle signal output from the angle signal control circuit 7. Radar image frame memory 5-1 and 5-2
The data written into the D / A conversion circuit 8 is averaged by the averaging circuit 21 as described above with reference to FIG.
Is converted into an analog signal.

Therefore, according to this embodiment, when multiple accesses are made to the same memory cell, the data for the last two times of the multiple accesses are averaged to generate a radar image. As a result, it becomes possible to obtain a radar image in which noise is reduced to half that in the conventional case.
The number of radar image frame memories 5 is not limited to two.

[0017]

As described above, according to the present invention,
The data obtained by coordinate conversion is stored in different radar image frame memories A for each sweep, and these are averaged by the averaging circuit C. Therefore, the contribution of noise to radar images is reduced to 1 / n. However, the S / N is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of the present invention.

FIG. 2 is a block diagram showing a configuration of a radar device according to an embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a radar device according to a conventional example.

FIG. 4 is a diagram showing a problem of a conventional example.

[Explanation of symbols]

A-1, ... An, 5-1 and 5-2 Radar image frame memory B, 22 Write control circuit C, 21 Averaging circuit

Claims (1)

[Claims] 1. A radar image frame memory for storing data relating to a radar image in a rectangular coordinate system, and a write address for converting data relating to a radar image obtained by one sweep from a polar coordinate system to a rectangular coordinate system. A radar device for generating a radar image based on the data in the radar image frame memory, which comprises a coordinate conversion circuit for writing in the radar image frame memory while controlling the A write control circuit for writing data relating to different continuous sweeps in order to the memory, and an averaging circuit for averaging the data on each radar image frame memory to generate a radar image. Radar device.