JP3126057B2 - High frequency inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency inverter, and more particularly to a high-frequency inverter which uses high-frequency switching characteristics and reduces spike voltage while avoiding conduction of a body diode of a field-effect transistor.

2. Description of the Related Art A field effect transistor is suitable as a switching means for a high-frequency inverter because there is essentially no stored charge. Conventionally, as a high-frequency inverter using a field effect transistor, as shown in FIG. 6, a diode is connected to each of the field effect transistors Q1, Q2, Q3, and Q4.
D1, D2, D3, and D4 are connected in series, and diodes D5, D6, D7, and D8 connected in parallel to these arms are bridge-connected. (The gate circuit of each field effect transistor is omitted.) In this circuit,
The field-effect transistors Q1 and Q4 are repeatedly turned on and off at the same time, and at that time, the other field-effect transistors Q2 and Q3 are repeatedly turned off and on, and high-frequency power is generated in the load RL. The field effect transistor Q1 is equivalently equivalently connected in parallel with a body diode D0 as shown by a broken line in FIG. 1, and the reverse recovery characteristic of the body diode D0 has a characteristic corresponding to high-speed switching. However, it is an obstacle for switching at several megahertz. Therefore, conduction of the body diode D0 is prevented by the series diode D1, and the diode D5 is connected in parallel as a freewheeling diode in the reverse direction. The other arms are similarly configured. However, when the switching frequency is so high, as shown in the equivalent circuit of FIG. 7, the stray inductances L1, L2 of the lead wire of the series diode D1 are obtained.
Is not negligible, and a considerable value spike voltage is generated when the field effect transistor Q1 is turned off. It is necessary to increase the breakdown voltage of the field effect transistor so as to withstand this spike voltage. The spike voltage also causes noise radio interference and lowers efficiency.

SUMMARY OF THE INVENTION The present invention relates to a high-frequency inverter constituted by a field-effect transistor, which suppresses a spike voltage at the time of off-state while maintaining a switching characteristic by blocking a current to a body diode of the field-effect transistor. It is an object to obtain a circuit that performs

According to the present invention, in order to solve such a problem, at least one side of the arm of the high-frequency bridge inverter is constituted as follows. That is, one end of the first diode is connected to one end of the main current terminal of the first field-effect transistor to form a first arm, and one end of the second diode is connected to one end of the main current terminal of the second field-effect transistor. To a second arm, the first arm and the second arm are sequentially connected in series, a positive terminal of a DC power supply is connected to an end of the first arm, and an end of the second arm. Is connected to a negative terminal of the DC power supply, and one end of a load is connected to an interconnection point between the first arm and the second arm to constitute one arm of the main circuit. A third diode is connected between a connection point between the first field-effect transistor and the first diode and a negative terminal of the DC power supply, and a connection point between the second field-effect transistor and the second diode. A fourth diode is connected between the power supply and the positive terminal of the DC power supply.

The spike voltage which is to be generated when the first field effect transistor is turned off is fed back to the DC power supply by the conduction of the third diode, and the voltage between the main terminals of the first field effect transistor is substantially reduced by the DC power supply. Keep the upper limit on the voltage value.
The same applies when the second field effect transistor is turned off.

FIG. 1 shows an embodiment of a high frequency inverter using a field effect transistor according to the present invention. In the figure, four field-effect transistors Q1, Q2, Q3, and Q4 constitute a bridge inverter circuit, which receives a DC power supply E1, converts it to a high frequency of 2 MHz, and supplies it to a load RL. First, the configuration will be described. A diode D1 is connected in series to the source of the field effect transistor Q1,
A diode D2 is connected to the drain of the field-effect transistor Q2 to form a second arm. A first arm and a second arm are connected in series, and a DC power supply is provided at both ends.
Supply E1 and connect one end of load RL to the interconnection point of the arms. A diode D6 is connected between the connection point between the field effect transistor Q1 and the diode D1 and the negative terminal of the DC power supply E1, and between the connection point between the field effect transistor Q2 and the diode D2 and the positive terminal of the DC power supply E1. Connect diode D5. The other one-row arm group is also configured symmetrically. That is, the diode D3 is connected in series with the source of the field-effect transistor Q3.
Are connected to form a third arm, and a diode D4 is connected to the drain of the field effect transistor Q4 to form a fourth arm. A third arm and a fourth arm are connected in series, a DC power supply E1 is supplied to both ends, and a load RL is connected to an interconnection point of the arms.
To the other end. A diode D8 is connected between the connection point between the field effect transistor Q3 and the diode D3 and the negative terminal of the DC power supply E1, and between the connection point between the field effect transistor Q4 and the diode D4 and the positive terminal of the DC power supply E1. Connect diode D7. In the circuit configured as above,
The field effect transistors Q1 and Q4 are turned on at the same time, and at this time, the field effect transistors Q2 and Q3 are turned off at the same time, and the high frequency power is generated in the load RL by repeating on and off alternately. Each field effect transistor Q1, Q2, Q3, Q4
An ON / OFF drive signal is sent to the gates of FIG. Now, when the field effect transistor Q1 is turned off, a spike voltage of a value of a product of a current change caused by a stray inductance (not shown) included in a lead wire on both sides of the diode D1 tends to be generated. At this time, the diode D6 conducts and returns to the DC power supply E1, and the spike voltage is substantially suppressed to the voltage value of the DC power supply E1. FIG. 3 shows the waveform of the voltage between the drain and the source of the field-effect transistor, showing how the spike voltage is suppressed. The conventional spike voltage is indicated by a broken line in FIG. 3, and the spike voltage according to the present invention is indicated by a solid line. For the other field effect transistors Q2, Q3, Q4, diodes D5, D8, D7 respectively play this role.
FIG. 2 shows an example in which the present invention is applied to a half-bridge inverter circuit. The difference from the circuit of FIG. 1 is that the capacitors C11 and C12 are connected in series and the load RL is connected between the interconnection points C and A for the arms in the second row. . The rest is the same as a general half-bridge circuit and will not be described. FIG. 4 shows an embodiment of the high-frequency inverter according to the present invention, which is a circuit provided with clamping capacitors C1, C2, C3 and C4 in addition to the circuit shown in FIG. The arrangement of the circuit diagram of FIG. 4 is different from that of FIG. 1, but has exactly the same configuration except that capacitors C1, C2, C3, and C4 are additionally connected. To explain the function of the clamping capacitor C1, the spike voltage that is generated when the field effect transistor Q1 is turned off flows through the diode D6 to the DC power supply E1, and the voltage between the drain and source of the field effect transistor Q1 is the DC power supply. Clamp to the voltage value of E1.
At this time, there is a certain amount of impedance due to the length of the wiring from the DC power supply E1.
A capacitor C1 directly connected between the drain of the diode D6 and the anode of the diode D6 absorbs the spike voltage to be clamped almost ideally with zero impedance. Capacitors
This energy once absorbed by C1 charges the DC power supply E1 in parallel and maintains a constant value. The same applies to the other capacitors C2, C3, C4 for clamping. These capacitors C1, C2, C3, and C4 are suitably small ceramic capacitors, and the wiring between the field effect transistor (Q1) to be protected, the series diode (D6), and the capacitor (C1) is as short as possible. Need to be distance. By adding a clamp capacitor in this way,
Spike voltage suppression becomes more effective. FIG. 5 is a circuit diagram of a high-frequency inverter according to the present invention, showing a row on one side of a bridge inverter of an embodiment in which a plurality of field effect transistors are arranged in parallel. In the figure, two elements of the upper arm are field effect transistors Q111 and Q112.
Are connected in parallel, the field-effect transistors Q121 and Q122 are connected in parallel, the field-effect transistors Q131 and Q132 are connected in parallel, and each set of field-effect transistors is connected via a diode D61, D62, D63 for clamping. Connected to capacitors C111, C112, C121, C122, C131, C132. These capacitors C111, C112, C121, C122, C131, and C132 are simultaneously connected in parallel to the DC power supply E1. The lower arm is similarly configured. And intersection A of each upper and lower arm
Although not shown, 1, A2 and A3 are connected in parallel via a small mutual inductance for current balance. In this way, a row of high-frequency inverter arms can be formed by further paralleling the two parallel sets in three. The number of parallels can be arbitrarily increased and selected. In all of the embodiments described above, the N-type field effect transistor is used for the switching element.
Alternatively, a circuit using N-type and P-type field effect transistors can be similarly configured. Alternatively, the present invention can be applied to a switching element other than a field effect transistor, which includes a diode inside the element.

Since the present invention has the above-described features, in a high-frequency inverter constituted by a field-effect transistor, current is prevented from flowing to the body diode of the field-effect transistor while maintaining switching characteristics. , Suppresses the spike voltage at the time of off. Therefore,
The withstand voltage of the field effect transistor can be reduced to a necessary limit, which is safe and economical. In addition, noise and radio interference can be reduced, and efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a bridge-type high-frequency inverter using a field-effect transistor according to the present invention.

FIG. 2 is a circuit diagram of a half-bridge type high-frequency inverter using a field-effect transistor according to the present invention.

FIG. 3 is a waveform diagram of a drain-source voltage of the field-effect transistor in the high-frequency inverter using the field-effect transistor according to the present invention.

FIG. 4 is a circuit diagram of a high-frequency inverter using a field-effect transistor according to the present invention, showing a circuit including a clamp capacitor.

FIG. 5 is a circuit diagram of a high-frequency inverter using a field-effect transistor according to the present invention, showing an embodiment in which a plurality of field-effect transistors are arranged in parallel.

FIG. 6 shows an example of a high-frequency inverter using a conventional field-effect transistor.

FIG. 7 shows an equivalent circuit of the circuit shown in FIG.

[Explanation of symbols]

E1: DC power supply RL: Load D0: Body diode Q1, Q2, Q3, Q4: Field effect transistor C1, C2, C3, C4, C11, C12: Capacitors D1, D2, D3, D4, D5, D6, D7, D8 … Diode L1, L2… Stray inductance Q111, Q112, Q121, Q122, Q131, Q132, Q211, Q212, Q221, Q222,
Q231, Q232… Field-effect transistors C111, C112, C121, C122, C131, C132, C211, C212, C221, C222,
C231, C232… Capacitor D11, D12, D13, D21, D22, D23, D51, D52, D53, D61, D62, D63…
diode

Claims (3)

(57) [Claims] An end of a first diode is connected in series to one end of a main current terminal of a first field effect transistor to form a first arm, and one end of a second diode is connected to a main end of a second field effect transistor. A second arm is connected in series to one end of a current terminal, and the other end of the first diode is connected to the second diode.
By interconnecting the other end of the
The second arm is connected in series with the second arm, the positive terminal of the DC power supply is connected to the end of the first arm, and the negative terminal of the DC power supply is connected to the end of the second arm . The other end of the first diode and the second diode
One end of a load is connected to an interconnection point with the other end of the diode, and a third diode is provided between a connection point between the first field-effect transistor and the first diode and a negative terminal of the DC power supply. And a fourth diode connected between a connection point between the second field-effect transistor and the second diode and a positive terminal of the DC power supply. . 2. An end of a first diode is connected in series to one end of a main current terminal of a first field effect transistor to form a first arm, and one end of a second diode is connected to a main current terminal of the second field effect transistor. A second arm is connected in series to one end of a current terminal, and the other end of the first diode is connected to the second diode.
By interconnecting the other end of the
The second arm is connected in series with the second arm, the positive terminal of the DC power supply is connected to the end of the first arm, and the negative terminal of the DC power supply is connected to the end of the second arm . The other end of the first diode and the second diode
One end of a load is connected to an interconnection point with the other end of the diode, and a third diode is provided between a connection point between the first field-effect transistor and the first diode and a negative terminal of the DC power supply. A capacitor is connected between one end of a third diode connected to the negative terminal of the DC power supply and the other end of the first field effect transistor; A fourth diode is connected between a connection point with a second diode and a positive terminal of the DC power supply, and one end of a fourth diode connected to the positive terminal of the DC power supply and the second field effect. A high-frequency inverter comprising a capacitor connected to the other end of the transistor. 3. The high-frequency inverter according to claim 1, wherein the first field-effect transistor and the second field-effect transistor are replaced by switching elements having a body diode. .