JP3116432B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device. Specifically, a method of manufacturing a semiconductor device using a W (tungsten) film utilizing a multilayer wiring forming method.

[0002]

2. Description of the Related Art In semiconductor devices such as LSIs, the width of internal wirings has been reduced as the degree of integration and the number of layers of elements have increased, and the aspect ratio of contact holes (contact through holes), that is, the depth and diameter of holes, have been reduced. As the ratio, for example, a large value of 1 or more is being adopted. And in the conventional Al sputtered film, 0.5
Excellent coverage cannot be expected for contact holes of μm or less and insulating film shapes with a lot of undulations.

[0003] For this reason, as a technique for embedding a fine and large aspect ratio contact hole in the next-generation ULSI and later, it has good coverage and furthermore, as compared with a conventional polysilicon connection portion (referred to as Poly Plug) or the like. Blanket W- with low contact resistance
CVD has drawn attention to the formation of such fine wiring layers. The blanket W is a technique of forming a W layer on the entire surface of a required portion and then performing patterning as necessary.

[0004]

SUMMARY OF THE INVENTION However, CVD
Since the -W film has poor adhesion to a base insulating film such as a silicon oxide film, a titanium-based film, for example, an adhesion layer such as TiN is generally formed at the interface between the W film and the insulating film by sputtering. There is a need.

However, when the W is etched back to form a plug and the TiN or the like of the adhesion layer is further etched, the upper part of the adhesion layer c is also etched for over-etching as shown in FIG. As a result, when forming the upper layer wiring, there is a risk that a reliable wiring cannot be formed. In FIG. 3 (and FIG. 4), a is a lower layer wiring, b
Is an interlayer insulating film, c is a TiN adhesion layer, and d is a W layer (only the buried portion remains in the figure).

As a method of solving this problem, there is a method of burying W without providing an adhesion layer on the side wall of the opening. However, this causes an overhang as shown in FIG. It was difficult to embed without e (hollow).

Accordingly, it is an object of the present invention to provide excellent coverage of a connection hole formed on a semiconductor substrate, to improve the adhesion between a W film and a base insulating film, and to form a W film when forming a W film.
A semiconductor device in which a highly reliable multilayer wiring is formed can be obtained by a wiring forming technology for preventing overhang of the semiconductor device.
An object of the present invention is to provide a method for manufacturing a conductor device .

[0008]

SUMMARY OF THE INVENTION The present inventor has set forth the above object to prevent the adhesion layer sputter W formed in advance on the semiconductor substrate from being present in the connection hole and to prevent the sputter W from being formed on the side of the upper portion of the connection hole. The structure is such that the sputter W does not exist on the interlayer insulating film. For this purpose, the sputter W is deposited after forming the connection hole,
After the resist patterning, the inventors have found that this can be achieved by isotropically etching the sputter W by wet etching with hydrogen peroxide or the like, and arrived at the present invention.

Hereinafter, the present invention will be described.

[0010] The invention according to claim 1 of the present application is directed to a semiconductor substrate
Forming a metal silicide layer on the substrate and forming an insulating film
Forming an opening on the metal silicide layer by
After that, a step of forming a sputtered W thin film on the entire surface and a resist
And only the portion corresponding to the opening is opened to remove the resist.
By isotropically etching the W thin film as a mask,
The opening diameter of the W thin film is made larger than the opening diameter of the opening.
Forming a W film by removing the resist.
And making the W film larger than the opening diameter of the opening,
Manufacturing a semiconductor device, comprising:
Manufacturing method.

According to a second aspect of the present invention, a step of forming a metal silicide layer on a semiconductor substrate and a step of forming an insulating film are provided.
Forming a sputtered W thin film on the entire surface and opening the resist
And the above W thin film isotropically etched using the resist as a mask.
And the insulating film using the resist as a mask.
To form an opening by anisotropically etching
Thus, the opening diameter of the W thin film by the isotropic etching
Is made larger than the opening diameter of the opening.
And removing the resist to form a W film by CVD.
Patterning the W film to a size larger than the opening diameter of the opening.
Semiconductor device, comprising:
It is a manufacturing method of the device.

[0012]

According to the inventions of the present application, a sputtered W film is formed as an adhesion layer on an interlayer insulating film, and is formed by isotropic wet etching using hydrogen peroxide or the like.
90 IEDM pages 928-930. K. Youn
g, etc. "Low. Resistance CVD W P
lug on Ti Silicide for Adv
As described in “Canced CMOS Applications”, the sputter W on the interlayer insulating film on the side of the opening (contact hole) is removed with good controllability. Thereby, a W film, for example, a blanket CVD-W
Does not cause a problem such as generation of voids due to overhang, and has a problem that the adhesion of blanket CVD-W is inferior since the sputtered W film is formed as an adhesion layer on the interlayer insulating film. Points are also eliminated. Therefore, a semiconductor device in which a highly reliable multilayer wiring is formed can be obtained.

[0013]

Embodiments of the present invention will be described below. However, needless to say, the present invention is not limited to the embodiments described below.

Embodiment 1 In this embodiment, the invention of claim 1 of the present application is applied to the manufacture of a miniaturized and integrated semiconductor device .
In particular, this is embodied when forming the multilayer wiring.

The outline of the structure of the semiconductor device obtained in this embodiment is as follows. FIG. 1 (e)
As shown, this semiconductor device, on a silicon substrate 1, oxide film 5 and SiO, silicon such as SiO _2, SiON
A TEOS-SiO ₂ layer 6 and a BPS are formed on a silicide film 3 such as TiSi ₂ formed by silicidation of the metal.
Via an interlayer insulating film such as a G layer 7, having the structure forming the sputtered W thin film 10 and the CVD-W layer 11 as an adhesion layer.

Next, the manufacturing process will be described. First, as shown in FIG. 1A, a LOCOS comprising an oxide film 5 such as SiO _{2 is} formed on a semiconductor substrate 1 such as a silicon substrate, and then a gate region 4 and a diffusion layer 2 are formed to form a MOS transistor. Forming a silicon <br/> emissions compound film and the metal film such as SiON on the diffusion layer 2, to form a metal silicide film 3 by performing the silicidation of the metal (TiSi _2).

The interlayer insulating film is made of, for example, C
A flattening insulating film is obtained by forming a VD oxide film 6 and a BPSG 7 or the like. Thereafter, a photoresist 8 for forming a contact hole is formed, and the structure shown in FIG. 1B is obtained.

Subsequently, after resist patterning, CHF
With a gas ₃ such as to form a contact hole 9 subjected to anisotropic etching of the underlying oxide film is deposited on the entire surface so as to further indicate the sputtered W thin film 10 of about 100nm Figure 1 (c).

Next, the contact holes and the photoresist 8a 'for etching (FIG. 9C) are patterned again. As a result, a resist pattern 8a (FIG. 4D) is obtained. Subsequently, isotropic etching as shown sputtered W thin film 10 by immersion in dilute hydrogen peroxide solution in Figure 1 (d). Thereby, the opening (contact hole)
The structure obtained by removing the sputtered W film 10 on the interlayer insulating film (BPSG film 7) on the side of the upper part of FIG. 9 is obtained (FIG. 1).
(D)). Note that the etching of W in a microscopic region with hydrogen peroxide is performed in accordance with the method described in 1990. As shown in IEDM, it can be performed with good controllability.

Next, the photoresist pattern 8a is removed with nitric acid or the like. Subsequently, when blanket CVD-W11 is deposited, W with good coverage can be deposited. Further W
Is performed to form a wiring layer as shown in FIG. Alternatively, a blanket CVD-W layer 11
Is performed to form a W plug. Furthermore,
A metal such as W is deposited by CVD or sputtering to form a wiring, thereby forming a semiconductor device with high wiring reliability.

Embodiment 2 This embodiment describes a method for manufacturing a semiconductor device according to the second aspect of the present invention. The method of manufacturing a semiconductor device according to the present embodiment conforms to the first embodiment, only in that forming the opening (contact hole) after the formation of the sputtered W thin film is different from the first embodiment.

This embodiment will be described below with reference to FIGS. 2 (a) to 2 (f). LOCO is performed by the same procedure as in the first embodiment.
After the formation of S, a gate region and a diffusion layer are formed, and FIG.
A MOS transistor having the same structure as that shown in FIG.

Subsequently, in the same manner as in Example 1, TEOS-SiO
_{The two} films 6 and the BPSG film 7 are formed in this order to obtain an interlayer insulating film. Then 100n a sputtering W thin film 10 on the entire surface
By depositing about m, the structure shown in FIG. 2B is obtained.

Next, a photoresist is patterned for forming a contact hole, and a resist pattern 81 is formed.
The resulting, then isotropically etched as shown sputtered W thin film 10 by immersion in dilute hydrogen peroxide solution in Figure 2 (c). Further, a contact hole 9 is formed by anisotropically etching the underlying oxide film with a gas such as CHF ₃ .
Thereafter removing the photoresist pattern 81 with nitric acid or the like shown in FIG. 2 (d), to obtain a sputtered W thin film 10 is removed structure on the periphery of the interlayer insulating film (BPSG film 7) of the upper portion of the opening 9.

Next, a blanket CVD-W11 is deposited. As a result, W11 having good coverage is formed (FIG. 2E). Further, patterning of W is performed, and FIG.
By forming the wiring layer 11 as shown in (f), a semiconductor device having a highly reliable wiring layer is obtained.

[0026]

As described above, according to the present invention, the adhesion is improved, and the overhang shape of the wiring film is prevented.
Excellent effect of embedding in connection holes, no voids, and prevention of disconnection of wiring, etc.
A semiconductor device with high wiring reliability can be provided.

[Brief description of the drawings]

FIG. 1 is a view sequentially showing steps of a first embodiment of the present invention in a sectional view of a material to be deposited.

FIG. 2 is an explanatory view sequentially showing steps of a second embodiment of the present invention in a sectional view.

FIG. 3 is an explanatory diagram of a problem due to conventional over-etching of CVD-W.

FIG. 4 is an explanatory diagram of an overhang shape when a sputtered W film is formed.

[Explanation of symbols]

1 semiconductor body (silicon substrate) 2 diffusion region 3 metal silicide film 4 gate 5 oxide film _{(SiO 2) 6 TEOS-SiO} 2 7 BPSG 9 opening (contact hole) 10 sputtering W thin film 11 CVD-W film

Continuation of the front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H01L 21/28-21/288 H01L 21/3205-21/3213 H01L 21/768

Claims (2)

(57) [Claims] A step of forming a metal silicide layer on a semiconductor substrate; a step of forming an insulating film to form an opening on the metal silicide layer; and a step of subsequently forming a sputtered W thin film on the entire surface. Open the resist only at the portion corresponding to the opening, and open the resist.
Be isotropic etch the W film a resist as a mask
To make the opening diameter of the W thin film larger than the opening diameter of the opening.
A step of increasing comprises the steps of forming a W film by removing the resist, the W film
Patterning the opening larger than the opening diameter of the opening . 2. A step of forming a metal silicide layer on a semiconductor substrate, and a step of forming an insulating film and forming a sputtered W thin film on the entire surface.
Opening the resist and using the resist as a mask
Anisotropically a step of isotropically etching the film, the insulating film using the resist as a mask etching
To form an opening and
The opening diameter of the W thin film by the above isotropic etching is
A step to be larger than the diameter, engineering of forming a W film by CVD and removing the resist
And a step of patterning the W film larger than the opening diameter of the opening .