JP3115706B2 - Mejiro placement wiring board manufacturing method - Google Patents
Mejiro placement wiring board manufacturing methodInfo
- Publication number
- JP3115706B2 JP3115706B2 JP04232998A JP23299892A JP3115706B2 JP 3115706 B2 JP3115706 B2 JP 3115706B2 JP 04232998 A JP04232998 A JP 04232998A JP 23299892 A JP23299892 A JP 23299892A JP 3115706 B2 JP3115706 B2 JP 3115706B2
- Authority
- JP
- Japan
- Prior art keywords
- groove
- unit
- wiring board
- ceramic green
- unit wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims description 30
- 238000005520 cutting process Methods 0.000 claims description 29
- 239000000919 ceramic Substances 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 11
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 description 10
- 235000019219 chocolate Nutrition 0.000 description 8
- 239000013078 crystal Substances 0.000 description 6
- 210000005069 ears Anatomy 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 238000010304 firing Methods 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 2
- 229910001361 White metal Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010969 white metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Structure Of Printed Boards (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、単位配線基板が一つの
大型基板から多数個取りされる目白配置配線基板の製造
方法に関し、特に水晶振動子の容器、ＳＡＷフィルター
用ＳＭＤタイプチップキャリヤなどに好適に利用され得
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a wiring board in which a large number of unit wiring boards are taken from a single large-sized board. It can be suitably used.
【０００２】[0002]
【従来の技術】従来、水晶振動子用パッケージのよう
に、厚さ１ミリ主面５〜１０ミリ四方程度の小さい配線
基板を一度に数百個多数個取りする場合、このような単
位配線基板上の配線パターンすなわち単位配線パターン
をセラミックグリーンシートの大型基板に多数個メタラ
イズ印刷し、各単位配線パターン間にＮＣ切断機で溝入
れ加工をした後、焼成し、必要に応じて鍍金をしたり、
シールリング等の金属部品を接合したりした後に、溝の
ところで各単位配線基板ごとにチョコレートブレイクさ
れていた。2. Description of the Related Art Conventionally, when a large number of hundreds of small wiring boards having a main surface of 1 mm and a size of about 5 to 10 mm square are taken at once, such as a package for a crystal unit, such a unit wiring board is required. A large number of the above wiring patterns, i.e., unit wiring patterns, are metallized and printed on a large substrate of ceramic green sheets. After grooving between the unit wiring patterns with an NC cutting machine, firing, and plating as necessary. ,
After joining metal parts such as a seal ring or the like, chocolate break has been performed for each unit wiring board at the groove.
【０００３】ところで、セラミックグリーンシートの場
合、メタライズインクに含まれる溶剤の揮発などに起因
して、シート反りやシート縮みが生じる。そして、この
ような反りや縮みは、グリーンシートの中央部では比較
的少なく、他方、周辺部では大きいのが通常である。従
って、各配線パターンの寸法はもとより、隣あう単位配
線パターン同士の間隔もグリーンシートの中央部で狭
く、周辺に向かうほど広くなってしまうものである。In the case of ceramic green sheets, sheet warpage and sheet shrinkage occur due to volatilization of a solvent contained in the metallized ink. Such a warp or shrinkage is relatively small in the central portion of the green sheet, and is generally large in the peripheral portion. Therefore, not only the size of each wiring pattern, but also the interval between adjacent unit wiring patterns is narrow at the center of the green sheet and becomes wider toward the periphery.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記の
ように溝入れ加工にＮＣ切断機を用いる以上、ＮＣ切断
機の性能からして溝ピッチにさほどの自由度をもたせる
ことができないから、隣あう単位配線パターン同士の間
隔とＮＣ切断機に記憶されている溝ピッチとが一致しな
い。従って、溝入れ加工にＮＣ切断機を用いる場合、図
２に示すように、耳部と称して少なくとも表面にメタラ
イズ印刷のされていない部分Ｅが、隣あう単位配線パタ
ーンＭの間に設けられており、各部の反りや縮みに対応
して耳部の寸法を定めておくことにより、反りや縮みに
起因する寸法ズレを補正していた。そして、この耳部は
チョコレートブレイク後に廃棄されるものである。然る
にこの耳部の寸法は、通常５ｍｍ程度必要であるから、
前記のように５〜１０ｍｍ四方程度の製品を一つの大型
基板に配置できる数が面積にして大型基板の二分の一強
となってしまい、生産効率が低い。However, since the NC cutting machine is used for grooving as described above, the groove pitch cannot be given a great degree of freedom in view of the performance of the NC cutting machine. The interval between the unit wiring patterns does not match the groove pitch stored in the NC cutting machine. Therefore, when an NC cutting machine is used for grooving, as shown in FIG. 2, at least a portion E, which is called a lug and is not metallized on the surface, is provided between adjacent unit wiring patterns M. In addition, the size of the ear portion is determined in accordance with the warpage or shrinkage of each part, thereby correcting the dimensional deviation caused by the warp or shrinkage. The ears are discarded after the chocolate break. However, the dimensions of these ears are usually about 5 mm,
As described above, the number of products that can be arranged on a single large substrate in a size of about 5 to 10 mm square is only half the area of the large substrate, and the production efficiency is low.
【０００５】また、溝入れ加工にＮＣ切断機を用いてセ
ラミックグリーンシートの表裏両面にＶ溝を形成する場
合、まず表面側に溝入れをし、次にグリーンシートを裏
返して裏面側に溝入れをする関係上、Ｖ溝の鉛直方向中
心線の位置が表面側と裏面側とで一致しにくく、後工程
でチョコレートブレイクした際、単位配線基板の外周端
面にバリが生じてしまう。このように単位配線基板の外
周端面にバリが生じると、単位配線基板の外周端面をも
って位置決めをしつつその主面上に水晶振動子やＩＣを
搭載する最終工程において、位置決めを個別に調整しな
ければならないから工程の自動化が困難となる。When V-grooves are formed on both the front and back surfaces of a ceramic green sheet using an NC cutting machine for grooving, first, grooving is performed on the front side, then the green sheet is turned over and grooving is performed on the back side. Therefore, the position of the vertical center line of the V-shaped groove is hardly coincident between the front side and the back side, and when a chocolate break occurs in a later step, burrs are generated on the outer peripheral end surface of the unit wiring substrate. When burrs are formed on the outer peripheral end surface of the unit wiring board in this way, the positioning must be individually adjusted in the final step of mounting a crystal unit or an IC on the main surface while positioning the outer peripheral end surface of the unit wiring board. Therefore, automation of the process becomes difficult.
【０００６】更にまた、複数枚積層されたセラミックグ
リーンシートの表裏面にＮＣ切断機を用いてＶ溝を形成
する場合、ＮＣ切断機の切れ刃の切れ込みが深くなり過
ぎて内部配線を切断するのを防止する必要上、切れ込み
深さが浅めになりがちであり、これによっても後工程で
チョコレートブレイクした際、単位配線基板の外周端面
にバリが生じてしまう。Further, when V-grooves are formed on the front and back surfaces of a plurality of laminated ceramic green sheets by using an NC cutting machine, the cutting edge of the NC cutting machine becomes too deep to cut the internal wiring. In order to prevent this, the cut depth tends to be shallow, which also causes burrs on the outer peripheral end surface of the unit wiring board when a chocolate break occurs in a later step.
【０００７】本発明の目的は、上記のような従来技術の
問題点を解決し、一つの大型基板からの取り数を従来の
二倍以上とし、かつチップ搭載工程の自動化を可能とし
た目白配置配線基板の製造方法を提供することにある。
本発明の他の目的は、配線基板が多層配線構造であって
も溝入れ加工時に内部配線の断線を生じない目白配置配
線基板の製造方法を提供することにある。SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems of the prior art, to increase the number of pieces to be taken from one large substrate to twice or more of the conventional one, and to make it possible to automate the chip mounting process. An object of the present invention is to provide a method for manufacturing a wiring board.
Another object of the present invention is to provide a method of manufacturing a white-layout wiring board which does not cause disconnection of internal wiring during grooving even if the wiring board has a multilayer wiring structure.
【０００８】[0008]
【０００９】第一の手段は、多数の単位配線パターンが
印刷され、焼成後に絶縁基板となるセラミックグリーン
シートの各単位配線パターン間に、Ｖ溝を形成する溝入
れ加工を施した後、焼成する目白配置配線基板の製造方
法において、前記溝入れ加工が、各単位配線パターン間
のＶ溝形成位置に対応する切れ刃を有する上側金型と下
側金型とによって、セラミックグリーンシートの表裏両
面に同時に行われることを特徴とする製造方法にある。 The first means is that a large number of unit wiring patterns are
Ceramic green that is printed and becomes an insulating substrate after firing
Grooves to form V-grooves between each unit wiring pattern on the sheet
Manufacturing method of Mejiro layout circuit board
In the method, the grooving is performed between each unit wiring pattern.
And the upper and lower dies having cutting edges corresponding to the V-groove forming position are simultaneously performed on both the front and back surfaces of the ceramic green sheet.
【００１０】第二の手段は、多数の単位配線パターンが
印刷され、焼成後に絶縁基板となるセラミックグリーン
シートの各単位配線パターン間に、Ｖ溝を形成する溝入
れ加工を施した後、焼成する目白配置配線基板の製造方
法において、前記溝入れ加工が、各単位配線パターン間
のＶ溝形成位置に対応する切れ刃を有する金型によって
行われ、セラミックグリーンシートの厚さをＡ、セラミ
ックグリーンシートの表側Ｖ溝の深さをＢ、同じく裏側
Ｖ溝の深さをＣとするとき、Ｖ溝が、 ０．５≦（Ｂ＋Ｃ）／Ａ≦０．７ を充足するように加工されることを特徴とする製造方法
にある。 The second means is that a large number of unit wiring patterns are
Ceramic green that is printed and becomes an insulating substrate after firing
Grooves to form V-grooves between each unit wiring pattern on the sheet
Manufacturing method of Mejiro layout circuit board
In the method, the grooving is performed between each unit wiring pattern.
With a cutting edge corresponding to the V-groove forming position
When the thickness of the ceramic green sheet is A, the depth of the front V-groove of the ceramic green sheet is B, and the depth of the back V-groove is C, the V-groove is 0.5 ≦ (B + C) / A manufacturing method characterized by being processed so as to satisfy A ≦ 0.7.
【００１１】第三の手段は、切れ刃の角度が、２５°〜
４５°であることを特徴とする上記第二の手段の目白配
置配線基板の製造方法。にある。 The third means is that the angle of the cutting edge is 25 ° or more.
45. The method of manufacturing a Mejiro-arranged wiring board according to the second means, wherein the angle is 45 °. It is in.
【００１２】ここで、目白配置配線基板は、単板でも良
いし、内部配線が形成された多層基板でも良い。単位配
線パターンは、例えば、ＷペーストやＭｏペースト等を
用いた厚膜印刷法あるいは物理蒸着、化学蒸着等を用い
た薄膜法によって形成される。セラミックグリーンシー
トの主成分としては、アルミナ、ムライト、結晶化ガラ
ス、窒化アルミニウム、等があげられる。Here, the whiteboard wiring board may be a single board or a multi-layer board on which internal wiring is formed. The unit wiring pattern is formed by, for example, a thick film printing method using W paste or Mo paste or a thin film method using physical vapor deposition, chemical vapor deposition, or the like. The main components of the ceramic green sheet include alumina, mullite, crystallized glass, aluminum nitride, and the like.
【００１３】[0013]
【作用】上記手段において、溝入れ加工が、各単位配線
パターン間のＶ溝形成位置に対応する切れ刃を有する金
型によって行われることから、切れ刃のピッチと単位配
線パターン同士の間隔との不一致を生ずることがない。
すなわち、例えばセラミックグリーンシートの各部の反
りや縮みの量を予め測定しておき、実際のセラミックグ
リーンシート上のＶ溝形成位置の各々に対応する複数の
切れ刃を金型に設けておくことにより、Ｖ溝形成位置の
各々と切れ刃の各々の位置とは一致する。従って、反り
や縮みに起因する寸法ズレ補正のための耳部を設ける必
要がない。In the above means, since the grooving is performed by the die having the cutting edge corresponding to the V groove forming position between the unit wiring patterns, the pitch of the cutting edge and the interval between the unit wiring patterns are determined. No discrepancies occur.
That is, for example, the amount of warpage or shrinkage of each part of the ceramic green sheet is measured in advance, and a plurality of cutting edges corresponding to each V groove forming position on the actual ceramic green sheet are provided in the mold. , V-groove forming positions coincide with the respective positions of the cutting edges. Therefore, there is no need to provide ears for correcting dimensional deviations caused by warpage or shrinkage.
【００１４】また、Ｖ溝形成位置が多数存在しても、そ
れに対応して切れ刃も複数存在するから、多数のＶ溝を
一挙に同時に形成することができる。上記第一の手段に
おいて、溝入れ加工が、上側金型と下側金型とによっ
て、セラミックグリーンシートの表裏両面に同時に行わ
れることから、セラミックグリーンシートを裏返す必要
がなく、Ｖ溝の鉛直方向中心線の位置が表面側と裏面側
とで一致し、後工程でチョコレートブレイクした際、単
位配線基板の外周端面にバリが生じることがない。Further, even if there are many V-groove formation positions, a plurality of cutting edges also exist correspondingly, so that a large number of V-grooves can be simultaneously formed. In the first means, since the grooving is performed simultaneously on the front and back surfaces of the ceramic green sheet by the upper mold and the lower mold, there is no need to turn the ceramic green sheet upside down, and the vertical direction of the V-groove is eliminated. The position of the center line coincides with the front side and the back side, and when a chocolate break occurs in a later step, burrs do not occur on the outer peripheral end surface of the unit wiring substrate.
【００１５】次にＶ溝の深さは、金型の切れ刃の大きさ
によって定まるところ、上記第二の手段において、セラ
ミックグリーンシートの厚さをＡ、セラミックグリーン
シートの表側Ｖ溝の深さをＢ、同じく裏側Ｖ溝の深さを
Ｃとするとき、Ｖ溝が、 ０．５≦（Ｂ＋Ｃ）／Ａ≦０．７ を充足するように加工されることにより、後工程でチョ
コレートブレイクした際、単位配線基板の外周端面にバ
リが生じることがなく、しかも内部配線を切断すること
がない。尚、０．５＞（Ｂ＋Ｃ）／Ａの場合は、Ｖ溝の
深さ不十分でバリが生じるし、他方、通常Ａ＝０．７〜
２ｍｍ程度で、１シートの厚さが０．２〜０．４ｍｍ程
度であるから、（Ｂ＋Ｃ）／Ａ＞０．７の場合は、Ｖ溝
が深くなり過ぎて、内部配線を切断してしまう。Next, the depth of the V-groove is determined by the size of the cutting edge of the mold . In the second means, the thickness of the ceramic green sheet is A, and the depth of the V-groove on the front side of the ceramic green sheet is as follows. When B is the depth of the back-side V groove and C is the same, the V groove is processed so as to satisfy 0.5 ≦ (B + C) /A≦0.7. In this case, no burrs are formed on the outer peripheral end surface of the unit wiring board, and the internal wiring is not cut. In the case of 0.5> (B + C) / A, burrs are generated due to insufficient depth of the V-groove, while A = 0.7 to
Since about 2 mm and the thickness of one sheet is about 0.2 to 0.4 mm, when (B + C) / A> 0.7, the V-groove becomes too deep and cuts the internal wiring. .
【００１６】最後に第三の手段において、切れ刃の角度
を、２５°〜４５°としたことから、Ｖ溝の幅が０．０
５〜０．１５ｍｍの範囲となる。Finally, in the third means, since the angle of the cutting edge is 25 ° to 45 °, the width of the V-groove is 0.0
The range is 5 to 0.15 mm.
【００１７】[0017]
【実施例】−実施例− 「目白配置配線基板の構造」本発明の一実施例に係わる
目白配置配線基板を図面とともに説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS-Example-"Structure of Mejiro Wiring Board" A Mejiro layout board according to an embodiment of the present invention will be described with reference to the drawings.
【００１８】図１において、目白配置配線基板１は、絶
縁基板２上に縦横に連続して多数配列して形成された単
位配線パターン３・・・３、各単位配線パターンのほぼ
中央の凹部に形成されて水晶振動子（図示省略）を搭載
するキャビティ４、及び単位配線パターン３・・・３の
各々の周縁上に接合されている金属製枠体５で構成され
ている。金属製枠体５は、水晶振動子搭載後に、図示し
ない絶縁蓋体と相まって水晶振動子を気密封止するもの
である。目白配置配線基板１の上方及び下方には、上金
型７及び下金型８がそれぞれ装備されている。In FIG. 1, a white wiring board 1 has a plurality of unit wiring patterns 3... 3 continuously and vertically arranged on an insulating substrate 2, and a substantially central recess of each unit wiring pattern. It is composed of a cavity 4 which is formed and mounts a quartz oscillator (not shown), and a metal frame 5 which is joined to the periphery of each of the unit wiring patterns 3. The metal frame 5 hermetically seals the crystal unit after mounting the crystal unit, in combination with an insulating lid (not shown). An upper mold 7 and a lower mold 8 are respectively provided above and below the eye-placed wiring board 1.
【００１９】隣接する単位配線パターン間には、溝２ａ
・・・２ａが加工されており、絶縁基板２の裏面側に
は、溝２ａ・・・２ａの各々に対応して溝２ｂ・・・２
ｂが加工されており、これらの溝のところでチョコレー
トブレイクすることにより、各単位配線パターンとそれ
に対応する絶縁基板２の一単位とが分離独立し、個々の
単位配線基板６・・・６となる。単位配線基板は、例え
ば水晶振動子用パッケージの一部品として用いられる。A groove 2a is provided between adjacent unit wiring patterns.
2a are processed, and grooves 2b... 2 corresponding to each of the grooves 2a.
b is processed, and by performing the chocolate break at these grooves, each unit wiring pattern and one unit of the insulating substrate 2 corresponding thereto are separated and independent, and become individual unit wiring substrates 6. . The unit wiring board is used, for example, as one component of a package for a crystal unit.
【００２０】尚、図示しないが、絶縁基板２の内部にも
多層配線が形成されており、表面の段差部分には、水晶
振動子とワイヤーボンディングするためのパッドが形成
されている。Although not shown, a multilayer wiring is also formed inside the insulating substrate 2, and a pad for wire bonding with the crystal oscillator is formed in a step portion on the surface.
【００２１】「目白配置配線基板の製造法」このような
目白配置配線基板の製造方法の例を以下に説明する。 （工程１）大きさ０．２×１３０×１５０［ｍｍ］程度
のセラミックグリーンシートの大型基板を３枚準備し、
これらの各々を打ち抜き加工し、それぞれに所定の内部
配線形状の単位配線パターンをＷペーストで５列×８行
＝４０個メタライズ印刷する。"Method of Manufacturing Mejiro Wiring Board" An example of a method of manufacturing such a Mejiro wiring board will be described below. (Step 1) Three large substrates of ceramic green sheets having a size of about 0.2 × 130 × 150 [mm] are prepared,
Each of these is punched out, and a unit wiring pattern having a predetermined internal wiring shape is metallized and printed with W paste in 5 columns × 8 rows = 40.
【００２２】（工程２）工程１で用いた大型基板と同大
で５列×８行＝４０個の孔が打ち抜かれたセラミックグ
リーンシートの大型基板を別途準備し、その一主面に内
寸５×３［ｍｍ］、外寸７×５［ｍｍ］の枠状の単位配
線パターン３・・・３を同じくＷペーストで図３に示す
ように連続して５列×８行＝４０個メタライズ印刷す
る。(Step 2) A large-sized ceramic green sheet substrate having the same size as the large-sized substrate used in Step 1 and having 5 columns × 8 rows = 40 holes is separately prepared. As shown in FIG. 3, 40 × 5 × 3 [mm] frame-shaped unit wiring patterns 3... 3 having an outer dimension of 7 × 5 [mm] are continuously metallized as shown in FIG. Print.
【００２３】（工程３）工程１及び工程２でメタライズ
印刷された３枚の大型基板を積層し、熱圧着し、多層基
板とする。この場合、工程２の大型基板を最上層とす
る。 （工程４）多層基板の最上層表面の各単位配線パターン
間のピッチを測定し、これに対応するピッチで多数の切
れ刃７ａ・・・７ａが設けられた上側金型７と同じく切
れ刃８ａ・・・８ａが設けられた下側金型８とを、それ
ぞれ多層基板の上方及び下方に装備する。尚、各切れ刃
の刃角は、３０°とする。(Step 3) Three large-sized substrates metalized and printed in the steps 1 and 2 are laminated and thermocompressed to form a multilayer substrate. In this case, the large substrate in step 2 is the uppermost layer. (Step 4) The pitch between each unit wiring pattern on the uppermost layer surface of the multilayer substrate is measured, and the cutting edge 8a is the same as the upper die 7 provided with a large number of cutting edges 7a... 7a at the corresponding pitch. .. Are provided above and below the multilayer substrate, respectively. The angle of each cutting edge is 30 °.
【００２４】（工程５）多層基板の最上層表面の各単位
配線パターン間及びこれに対応する最下層裏面の位置に
上側金型７の切れ刃７ａ・・・７ａ及び下側金型８の切
れ刃８ａ・・・８ａをそれぞれ同時に押圧し、溝入れを
する。(Step 5) The cutting edges 7a... 7a of the upper mold 7 and the cutting of the lower mold 8 are located between the unit wiring patterns on the uppermost surface of the multilayer substrate and the corresponding positions on the lower surface of the lowermost surface. The blades 8a... 8a are simultaneously pressed to form grooves.
【００２５】（工程６）多層基板を１５００度前後の高
温で焼成し、最上層表面のメタライズ印刷部の１点を鍍
金接点とし、電解Ｎｉ鍍金し、内寸５×３［ｍｍ］、外
寸７×５［ｍｍ］のコバール製枠体５・・・５を、最上
層の単位配線パターン３・・・３にＡｇ鑞付けし、Ａｕ
等を電解鍍金する。以上の工程を経て、多層基板が絶縁
基板２となり、工程２の孔がキャビティ４・・・４とな
って、目白配置配線基板１が製造される。(Step 6) The multilayer substrate is fired at a high temperature of about 1500 ° C., one point of the metallized printed portion on the uppermost layer surface is used as a plating contact, electrolytic Ni plating is applied, and the inner dimensions are 5 × 3 [mm] and the outer dimensions are A 5 × 5 [mm] Kovar frame 5... 5 is Ag-brazed to the uppermost unit wiring pattern 3.
Etc. are electroplated. Through the above steps, the multilayer substrate becomes the insulating substrate 2, and the holes in the step 2 become the cavities 4...
【００２６】「評価」目白配置配線基板１を、Ｖ溝に沿
ってチョコレートブレイクしたところ、４０個の単位配
線基板を製造することができた。そして、すべての単位
配線基板につき、Ｎｉ及びＡｕのいずれも良好に鍍金さ
れており、目白配置配線基板１の内部で断線が生じてい
ないことが確認された。また、単位配線基板の外周端面
を観察したところ、バリが発生しているものは存在しな
かった。尚、前記工程において、溝入れ加工に要した時
間は、わずか１５秒であった。[Evaluation] Chocolate breaking was performed on the Mejiro wiring board 1 along the V-groove, and 40 unit wiring boards could be manufactured. Then, it was confirmed that both Ni and Au were satisfactorily plated with respect to all the unit wiring boards, and that no disconnection occurred inside the white wiring board 1. Further, when the outer peripheral end face of the unit wiring board was observed, there was no burr generated. In the above process, the time required for the grooving was only 15 seconds.
【００２７】−比較例− 「比較品の構造及び製造方法」最上層表面の単位配線パ
ターン間に幅５ｍｍと幅２ｍｍの耳部Ｅを設けたこと
と、工程４及び工程５の溝入れ加工手段を金型に代えて
ＮＣ切断機によることとした以外は、上記実施例と同一
構造同一製造方法にて比較用目白配置配線基板Ｓを製造
した。-Comparative Example- "Structure and manufacturing method of comparative product" A lug E having a width of 5 mm and a width of 2 mm was provided between unit wiring patterns on the uppermost layer surface, and grooving means in Steps 4 and 5 Was used in the same structure and the same manufacturing method as in the above embodiment, except that an NC cutting machine was used instead of the mold.
【００２８】「評価」目白配置配線基板Ｓを、Ｖ溝に沿
ってチョコレートブレイクしたところ、１６個の単位配
線基板を製造することができた。但し、単位配線基板１
６個のうち１個は、最上層表面に鍍金がされておらず、
これら各単位配線基板と隣あう単位配線基板との間で内
部配線の断線が生じていることが確認された。また、単
位配線基板の外周端面を観察したところ、バリが発生し
ているものが１６個存在した。尚、前記工程において、
溝入れ加工に要した時間は、１２０秒であった。[Evaluation] A chocolate break was performed on the mezzanine-arranged wiring board S along the V-groove, and 16 unit wiring boards could be manufactured. However, the unit wiring board 1
One of the six has no plating on the top layer surface,
It was confirmed that disconnection of the internal wiring occurred between each of these unit wiring boards and the adjacent unit wiring board. Further, when the outer peripheral end face of the unit wiring board was observed, there were 16 burrs generated. In addition, in the said process,
The time required for grooving was 120 seconds.
【００２９】[0029]
【発明の効果】請求項１〜３の構成によって、耳部を設
ける必要がないから、一つの大型基板からの単位配線基
板の取り数が２倍以上に増大する。多数のＶ溝を金型に
よって一挙に同時に形成することができるから、溝入れ
加工の工数が１／１００以下に向上する。単位配線基板
の外周端面にバリが生じることがないから、チップ搭載
工程における自動化が容易となる。これらの効果は、請
求項２及び請求項３の発明の場合に顕著である。請求項
４の構成によって、Ｖ溝の幅が０．０５〜０．１５ｍｍ
の範囲となるから、例えば、最上層の表面に金属製枠体
を鑞付けするときも隣あう枠体間で鑞がブリッジするこ
とがない。According to the first to third aspects of the present invention, since there is no need to provide ears, the number of unit wiring boards to be formed from one large-sized board is increased by more than twice. Since a large number of V-grooves can be simultaneously formed by a mold at once, the number of man-hours for grooving is reduced to 1/100 or less. Since burrs do not occur on the outer peripheral end surface of the unit wiring board, automation in the chip mounting process is facilitated. These effects are remarkable in the case of the second and third aspects of the invention. According to the configuration of claim 4, the width of the V groove is 0.05 to 0.15 mm.
Therefore, for example, even when a metal frame is brazed to the surface of the uppermost layer, there is no bridging between the adjacent frames.
【図１】本発明の一実施例に係わる目白配置配線基板と
その上方及び下方に装備した金型とを示す断面図であ
る。FIG. 1 is a cross-sectional view showing a white-metal wiring board according to an embodiment of the present invention and dies provided above and below it.
【図２】従来の大型基板とその上方に装備したＮＣ切断
機とを示す断面図である。FIG. 2 is a cross-sectional view showing a conventional large substrate and an NC cutting machine mounted above the substrate.
【図３】本発明の一実施例に係わる目白配置配線基板の
平面図である。FIG. 3 is a plan view of a white light wiring board according to one embodiment of the present invention.
【図４】従来の大型基板の平面図である。FIG. 4 is a plan view of a conventional large substrate.
１ 目白配置配線基板 ２ 絶縁基板 ３，Ｍ 単位配線パターン ４ キャビティ ５，Ｒ 枠体 ６ 単位配線基板 ７ 上側金型 ８ 下側金型 Ｓ 従来の大型基板 Ｅ 耳部 1 Mesh white wiring board 2 Insulating board 3, M unit wiring pattern 4 Cavity 5, R frame 6 Unit wiring board 7 Upper die 8 Lower die S Conventional large substrate E Ear
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 実開 平５−66999（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/12 H03H 3/02 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-U 5-66999 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/12 H03H 3/02
Claims (3)
後に絶縁基板となるセラミックグリーンシートの各単位
配線パターン間に、Ｖ溝を形成する溝入れ加工を施した
後、焼成する目白配置配線基板の製造方法において、前
記溝入れ加工が、各単位配線パターン間のＶ溝形成位置
に対応する切れ刃を有する上側金型と下側金型とによっ
て、セラミックグリーンシートの表裏両面に同時に行わ
れることを特徴とする製造方法。1. A large number of unit wiring patterns are printed and fired.
Each unit of the ceramic green sheet that will later become the insulating substrate
Groove processing for forming a V groove was performed between the wiring patterns.
After, in the manufacturing method of the Mejiro layout wiring board to be fired,
The grooving is performed at the V-groove formation position between each unit wiring pattern.
The manufacturing method is performed simultaneously on both front and back surfaces of the ceramic green sheet by using an upper mold and a lower mold having cutting edges corresponding to the above .
後に絶縁基板となるセラミックグリーンシートの各単位
配線パターン間に、Ｖ溝を形成する溝入れ加工を施した
後、焼成する目白配置配線基板の製造方法において、前
記溝入れ加工が、各単位配線パターン間のＶ溝形成位置
に対応する切れ刃を有する金型によって行われ、セラミ
ックグリーンシートの厚さをＡ、セラミックグリーンシ
ートの表側Ｖ溝の深さをＢ、同じく裏側Ｖ溝の深さをＣ
とするとき、Ｖ溝が、 ０．５≦（Ｂ＋Ｃ）／Ａ≦０．７ を充足するように加工されることを特徴とする製造方
法。2. A large number of unit wiring patterns are printed and fired.
Each unit of the ceramic green sheet that will later become the insulating substrate
Groove processing for forming a V groove was performed between the wiring patterns.
After, in the manufacturing method of the Mejiro layout wiring board to be fired,
The grooving is performed at the V-groove formation position between each unit wiring pattern.
Made by a mold having a cutting edge corresponding to the thickness of the ceramic green sheets A, B and the depth of the front side V grooves of the ceramic green sheets, also the depth of the back side V groove C
Wherein the V-groove is processed so as to satisfy 0.5 ≦ (B + C) /A≦0.7.
とを特徴とする請求項２に記載の目白配置配線基板の製
造方法。3. The method according to claim 2 , wherein the angle of the cutting edge is 25 ° to 45 °.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04232998A JP3115706B2 (en) | 1992-08-06 | 1992-08-06 | Mejiro placement wiring board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP04232998A JP3115706B2 (en) | 1992-08-06 | 1992-08-06 | Mejiro placement wiring board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0661367A JPH0661367A (en) | 1994-03-04 |
| JP3115706B2 true JP3115706B2 (en) | 2000-12-11 |
Family
ID=16948207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP04232998A Expired - Lifetime JP3115706B2 (en) | 1992-08-06 | 1992-08-06 | Mejiro placement wiring board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3115706B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5632631A (en) * | 1994-06-07 | 1997-05-27 | Tessera, Inc. | Microelectronic contacts with asperities and methods of making same |
| KR100933414B1 (en) * | 2009-04-28 | 2009-12-22 | 진영범 | Apparatus for bonding conducting wire using cutter |
-
1992
- 1992-08-06 JP JP04232998A patent/JP3115706B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0661367A (en) | 1994-03-04 |
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