JP4280394B2 - Wiring board manufacturing method - Google Patents

Wiring board manufacturing method Download PDF

Info

Publication number
JP4280394B2
JP4280394B2 JP2000172460A JP2000172460A JP4280394B2 JP 4280394 B2 JP4280394 B2 JP 4280394B2 JP 2000172460 A JP2000172460 A JP 2000172460A JP 2000172460 A JP2000172460 A JP 2000172460A JP 4280394 B2 JP4280394 B2 JP 4280394B2
Authority
JP
Japan
Prior art keywords
sealing
wiring board
positioning block
size
metallization layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000172460A
Other languages
Japanese (ja)
Other versions
JP2001352003A (en
Inventor
智晴 石塚
義則 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Spark Plug Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2000172460A priority Critical patent/JP4280394B2/en
Publication of JP2001352003A publication Critical patent/JP2001352003A/en
Application granted granted Critical
Publication of JP4280394B2 publication Critical patent/JP4280394B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Description

【0001】
【発明の属する技術分野】
配線基板の製造方法に関し、より詳細には、分割後に配線基板となる多数の製品部を備えた多数個取り用大判に位置決め用ブロックを用いて封止リングを接合する配線基板の製造方法に関する。
【0002】
【従来の技術】
従来、配線基板の封止用メタライズ層へシールリングをろう付けする方法として、各配線基板に分割する前の多数個取り用大判の状態でシールリングをろう付けする方法が知られている。すなわち、分割後に配線基板となる製品部ごとに電子部品を搭載する凹部(キャビティ)内に位置決めブロックを配置したうえで、封止用メタライズ層とシールリングとの間に介在させたロウ材を溶融させ、封止用メタライズ層とシールリングを固着する。この方法によれば一度に多数の製品部でのロウ付けができるので、作業効率がよいというメリットがあった。
【0003】
【発明が解決しようとする課題】
しかし、各多数個取り用大判の製品部に位置決め用ブロックを配置する工程は煩雑であり、製造コストアップの一因となっていた。特に、製品の小型化に伴い、位置決めブロックも小型化し、配置したり、除去したりするのが、熟練を要する作業となっていた。
【0004】
【課題を解決するための手段】
しかして、上記課題を解決するための請求項1に記載の配線基板の製造方法は、第1主面と第2主面とを有し、分割後に配線基板となる多数の製品部を備えた多数個取り用大判のうち、上記各製品部の第1主面側に形成された電子部品搭載用凹部に位置決め用ブロックを配置する工程と、上記電子部品搭載用凹部の周囲に設けられた封止用メタライズ層上に封止リングを載置する工程と、上記封止用メタライズ層と上記封止リングとを接合する工程と、上記位置決め用ブロックを上記配置を維持したまま、上記多数個取り用大判から取り外し、他の多数個取り用大判の各製品部の電子部品搭載用凹部に移送する工程と、上記封止リングを接合した多数個取り用大判を製品部ごとに分割し、各配線基板とする工程と、を含むことを特徴とする。
【0005】
本発明によれば、最初の多数個取り用大判については、位置決めブロックを配置することを要するが、その後、ろう付けされる多数個取り用大判については、その前のろう付け工程に用いられた位置決めブロックをその配置のまま次の多数個取り用大判に一括して移動すれば足りるので、作業効率が飛躍的に向上する。
【0006】
なお、位置決めブロックの材質としては、焼成済みのセラミック等、ロウ付け温度に耐えれる材質のものであれば、特に限定されない。また、シールリングの材質は特に限定されないが、コバールや42アロイ等公知の材料が好適に用いられる。
【0007】
移動方法としては、多数の吸引孔を有する吸着板により、各位置決めブロックを吸着し、ろう付けが済んだ多数個取り用大判から位置決めブロックを取り除き、そのままろう付け前の他の多数個取り用大判に移動して各製品部の凹部にセットするとよい。
【0008】
さらに、請求項2に記載の発明は、前記封止用メタライズ層には、予めロウ材が固着されていることを特徴とする。
各製品部へのシールリングの配置方法しては、それぞれ手作業で配置する方法も考えられるが、より効率的な方法としては、多数のシールリングを振動させつつ各製品部上に流し、位置決めマスクを介して、各封止用メタライズ層上にシールリングを配置する方法が好ましい。この方法を用いる場合、多数個取り大判も傾けたり、振動させたりするので、ロウ材のプリフォーム等を用いた場合には、予め載置したプリフォームが外れるおそれがある。これに対して、ロウ材は予め封止用メタライズ層にろう付けしておくと、ロウ材が外れるおそれがなく、シールリングと封止用メタライズ層のろう付けを効率的かつ確実に行うことができる。
【0009】
【発明の実施の形態】
以下、本発明にかかる配線基板の製造方法について、図1乃至図8を参照しつつ、詳細に説明する。まず、図中10は、第1主面および第2主面を有し、分割後に各配線基板1となる製品部11を有する多数個取り用大判(以下、単に大判ともいう)である。なお、図1は大判10の平面図、図2はその部分拡大断面図を示す。各製品部11の中央部には平面視方形で下方に向かって階段状で幅狭となるキャビティ(凹部)2を備えている。また、大判10の第1主面(上面4)には、各キャビティ2の周囲に封止用メタライズ層5が平面視四角枠状に形成されている。このメタライズ層5には、図示しないがニッケルメッキ層が形成されている。さらに、各製品部11の境界線上には、分割のためのブレーク溝12、13が形成されている。
【0010】
このような大判10は、まず、各層15、16、17をなし所定数の基板部分がとれるように形成されたアルミナを主成分とするセラミックグリーンシート(厚さ0.25mm〜0.3mm)をそれぞれ製造する。そして、各層に対応する形状に切断、打ち抜きし、封止用メタライズ層や配線層さらにはメッキ用の共通導体層などのW、Mo等のメタライズペーストを印刷する。
こうして製造されたセラミックグリーンシートを積層、圧着して未焼成セラミック大判とした後、焼成して図1に示す大判10が得られる(図1、図2参照)。
【0011】
次に、各製品部11の封止用メタライズ層5に対応した平面視四角枠状のロウ材(銀ろう)のプリフォームを各封止用メタライズ層5上に載置し、加熱・溶融させて、ロウ材6を封止用メタライズ層上に形成する(図3参照)。
次に、図4に示すように、各キャビティ2内に位置決めブロック7を配置する。最初の大判10に対しては手作業により位置決めブロック7を並べる必要がある。
【0012】
次に、各位置決めブロック7の周囲、すなわち、予めロウ材を被着させた封止用メタライズ層5の上に平面視四角枠状のコバールからなるシールリング8を載置する(図5参照)。このような状態で、再度、ロウ材6を加熱溶融させ、シールリング8のろう付けを完了する(図7)。
【0013】
ろう付け工程が終了した大判10からは、図7に示すように多数の吸引孔14を備えた吸着板9を用い、位置決めブロック7を吸着して取り除く。取り除かれた位置決めブロック7はその配置のまま、再び図3に示すようにろう付け前の他の大判のキャビティに移し替えられる。このような方法によれば、ろう付け作業が終了した大判10から一度に使用済みの位置決めブロック7を取り除くことができ、さらに、2回目以降のろう付け作業については、位置決めブロック7を手作業にて並べる必要がない。したがって、多数の大判へのシールリング8のろう付けを効率よく行うことができ、延いては、製造コストを低減できる。
【0014】
なお、シールリング8のロウ付けを終えた大判10は、シールリング8の表面および各配線層の表面にNiメッキやAuメッキ等のメッキを施した後、各ブレーク溝12、13に沿って分割され、多数の配線基板1となる(図8参照)。配線基板1は、キャビティ2にSAWフィルタ等の電子部品が搭載された後、シールリング8に蓋を接合する等して用いられる。
【0015】
本発明の配線基板の製造方法によれば、一旦、配置された位置決め用ブロックをその配置のまま、他の大判に移送することにより、各大判ごとに別途配置し直す必要がなくなる。すなわち、最初の一つの大判については、各電子部品搭載用凹部にブロックを配置する必要があるが、それらを使用後(ロウ付け後)にそのままの配置で他の大判上に移送することにより、並べ直す手間が省け、生産効率が飛躍的に向上する。
【図面の簡単な説明】
【図1】本発明にかかる多数個取り大判の平面図。
【図2】図1の多数個取り大判の部分拡大断面図。
【図3】図2の多数個取り大判の封止用メタライズ層上にロウ材を被着させた状態を示す部分拡大断面図。
【図4】位置決めブロックを各キャビティに配置した状態を示す部分拡大断面図。
【図5】シールリングを載置した状態を示す部分拡大断面図。
【図6】シールリングをロウ付けした状態を示す部分拡大断面図。
【図7】吸着板に位置決めブロックを吸着させて、大判から位置決めブロックを取り除く工程を示す説明図。
【図8】大判を分割した後の配線基板の断面図。
【符号の説明】
1 配線基板
2 キャビティ(凹部)
4 上面
5 封止用メタライズ層
6 ロウ材
7 位置決めブロック
8 シールリング
9 吸着板
10 多数個取り大判
11 製品部
12、13 ブレーク溝
14 吸引孔
[0001]
BACKGROUND OF THE INVENTION
More particularly, the present invention relates to a method for manufacturing a wiring board in which a sealing ring is joined to a large-sized large-sized plate having a large number of product portions that become wiring boards after division using a positioning block.
[0002]
[Prior art]
Conventionally, as a method of brazing a seal ring to a metallization layer for sealing a wiring board, a method of brazing the seal ring in a large-sized state for taking multiple pieces before dividing into each wiring board is known. In other words, after placing the positioning block in the recess (cavity) for mounting the electronic components for each product part that becomes the wiring board after the division, the brazing material interposed between the sealing metallization layer and the seal ring is melted The sealing metallization layer and the seal ring are fixed. According to this method, a large number of product parts can be brazed at a time, so that there is a merit that work efficiency is good.
[0003]
[Problems to be solved by the invention]
However, the process of arranging the positioning block on each large-sized product portion for taking a large number of parts is cumbersome and contributes to an increase in manufacturing cost. In particular, with the miniaturization of the product, the positioning block is also miniaturized, and placing and removing has become a work requiring skill.
[0004]
[Means for Solving the Problems]
Accordingly, the method of manufacturing a wiring board according to claim 1 for solving the above-described problem includes a first main surface and a second main surface, and includes a large number of product portions that become the wiring substrate after division. Among the large-sized multi-use sizes, a step of placing a positioning block in the electronic component mounting recess formed on the first main surface side of each product portion, and a seal provided around the electronic component mounting recess The step of placing a sealing ring on the metallization layer for fastening, the step of joining the metallization layer for sealing and the sealing ring, and the multiple blocks of the positioning block are maintained while maintaining the arrangement. Remove from the large size, transfer to the recessed parts for mounting the electronic parts of each other large-sized product part, and divide the large-sized large size with the sealing ring into each product part And a step of forming a substrate.
[0005]
According to the present invention, it is necessary to place a positioning block for the first large-sized large format, but the multiple-sized large size to be brazed after that was used in the previous brazing process. Since it is only necessary to move the positioning block to the next large-sized large block as it is, it is possible to dramatically improve the work efficiency.
[0006]
The material of the positioning block is not particularly limited as long as it is a material that can withstand the brazing temperature, such as a fired ceramic. The material of the seal ring is not particularly limited, but a known material such as Kovar or 42 alloy is preferably used.
[0007]
As a moving method, each positioning block is sucked by a suction plate having a large number of suction holes, the positioning block is removed from the brazed large-sized large plate, and the other large-sized large-sized plate before brazing is left as it is. It is good to move to and to set in the recessed part of each product part.
[0008]
Furthermore, the invention described in claim 2 is characterized in that a brazing material is fixed in advance to the sealing metallized layer.
As a method of placing the seal ring on each product part, a method of manually placing the seal ring is also conceivable. However, as a more efficient method, a large number of seal rings are oscillated on each product part and positioned. A method of disposing a seal ring on each metallization layer for sealing through a mask is preferable. When this method is used, a large number of large-sized sheets are also tilted or vibrated, so that when a preform made of brazing material or the like is used, the preform placed in advance may be detached. In contrast, if the brazing material is brazed to the sealing metallization layer in advance, the brazing material is not likely to come off, and the sealing ring and the sealing metallization layer can be brazed efficiently and reliably. it can.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a method for manufacturing a wiring board according to the present invention will be described in detail with reference to FIGS. First, a reference numeral 10 in the figure denotes a large-sized large size (hereinafter, also simply referred to as a large size) having a first main surface and a second main surface and having a product portion 11 that becomes each wiring board 1 after division. 1 is a plan view of the large format 10, and FIG. 2 is a partially enlarged sectional view thereof. A central portion of each product portion 11 is provided with a cavity (concave portion) 2 that is rectangular in plan view and has a stepped shape and a narrow width downward. On the first main surface (upper surface 4) of the large format 10, a sealing metallization layer 5 is formed around each cavity 2 in a square frame shape in plan view. The metallized layer 5 is formed with a nickel plating layer (not shown). Furthermore, break grooves 12 and 13 for division are formed on the boundary line of each product part 11.
[0010]
The large format 10 first includes a ceramic green sheet (thickness of 0.25 mm to 0.3 mm) mainly composed of alumina formed so that each layer 15, 16, 17 is formed and a predetermined number of substrate portions can be taken. Manufacture each. Then, it is cut and punched into a shape corresponding to each layer, and a metallized paste such as W or Mo such as a sealing metallized layer, a wiring layer, or a common conductor layer for plating is printed.
The ceramic green sheets thus manufactured are laminated and pressed to form an unfired ceramic large size, and then fired to obtain the large size 10 shown in FIG. 1 (see FIGS. 1 and 2).
[0011]
Next, a square frame-shaped brazing material (silver brazing) preform corresponding to the metallization layer 5 for sealing of each product part 11 is placed on each metallization layer 5 for sealing, and heated and melted. Then, the brazing material 6 is formed on the metallizing layer for sealing (see FIG. 3).
Next, as shown in FIG. 4, the positioning block 7 is disposed in each cavity 2. For the first large format 10, it is necessary to arrange the positioning blocks 7 manually.
[0012]
Next, a seal ring 8 made of Kovar having a rectangular frame shape in plan view is placed around each positioning block 7, that is, on the sealing metallization layer 5 on which a brazing material has been previously applied (see FIG. 5). . In this state, the brazing material 6 is heated and melted again, and the brazing of the seal ring 8 is completed (FIG. 7).
[0013]
From the large format 10 after the brazing process is completed, the positioning block 7 is sucked and removed by using a suction plate 9 having a large number of suction holes 14 as shown in FIG. The removed positioning block 7 is transferred to another large-sized cavity before brazing as shown in FIG. According to such a method, the used positioning block 7 can be removed at once from the large format 10 after the brazing operation is completed, and the positioning block 7 is manually operated for the second and subsequent brazing operations. There is no need to line up. Therefore, it is possible to efficiently braze the seal ring 8 to a large number of large formats, thereby reducing the manufacturing cost.
[0014]
The large format 10 that has finished brazing the seal ring 8 is divided along the break grooves 12 and 13 after plating the surface of the seal ring 8 and the surface of each wiring layer with Ni plating or Au plating. As a result, a large number of wiring boards 1 are formed (see FIG. 8). The wiring board 1 is used by attaching a lid to the seal ring 8 after electronic parts such as a SAW filter are mounted in the cavity 2.
[0015]
According to the method for manufacturing a wiring board of the present invention, it is not necessary to separately arrange each large size by transferring the positioning block once arranged to another large size. In other words, for the first large format, it is necessary to arrange blocks in each of the electronic component mounting recesses, but after using them (after brazing), they are transferred as they are to other large formats, This saves you the trouble of rearranging and dramatically improves production efficiency.
[Brief description of the drawings]
FIG. 1 is a plan view of a large-sized large format according to the present invention.
FIG. 2 is a partially enlarged cross-sectional view of the large-size large format shown in FIG. 1;
3 is a partial enlarged cross-sectional view showing a state in which a brazing material is applied on the large-sized large-sized sealing metallization layer of FIG. 2;
FIG. 4 is a partially enlarged cross-sectional view showing a state in which a positioning block is disposed in each cavity.
FIG. 5 is a partially enlarged sectional view showing a state where a seal ring is placed.
FIG. 6 is a partially enlarged cross-sectional view showing a state in which a seal ring is brazed.
FIG. 7 is an explanatory diagram showing a process of removing a positioning block from a large format by sucking the positioning block on the suction plate.
FIG. 8 is a cross-sectional view of the wiring board after dividing the large format.
[Explanation of symbols]
1 Wiring board 2 Cavity (recess)
4 Upper surface 5 Sealing metallized layer 6 Brazing material 7 Positioning block 8 Seal ring 9 Suction plate 10 Large size 11 Product part 12, 13 Break groove 14 Suction hole

Claims (2)

第1主面と第2主面とを有し、分割後に配線基板となる多数の製品部を備えた多数個取り用大判のうち、上記各製品部の第1主面側に形成された電子部品搭載用凹部に位置決め用ブロックを配置する工程と、
上記電子部品搭載用凹部の周囲に設けられた封止用メタライズ層上に封止リングを載置する工程と、
上記封止用メタライズ層と上記封止リングとを接合する工程と、
上記位置決め用ブロックを上記配置を維持したまま、上記多数個取り用大判から取り外し、他の多数個取り用大判の各製品部の電子部品搭載用凹部に移送する工程と、
上記封止リングを接合した多数個取り用大判を製品部ごとに分割し、各配線基板とする工程と、
を含むことを特徴とする配線基板の製造方法。
Electrons formed on the first main surface side of each of the product parts of the large-sized multi-size large-size unit having a first main surface and a second main surface and having a large number of product parts to be wiring boards after division. Placing the positioning block in the component mounting recess;
Placing a sealing ring on the sealing metallization layer provided around the recess for mounting the electronic component;
Bonding the metallization layer for sealing and the sealing ring;
The step of removing the positioning block from the large-size multi-use large format while maintaining the arrangement, and transferring the block to the electronic component mounting recess of each other multi-size large product portion;
A process of dividing the large size for taking a large number of pieces to which the sealing ring is joined into each product part and making each wiring board;
A method for manufacturing a wiring board, comprising:
前記封止用メタライズ層には、予めロウ材が固着されていることを特徴とする請求項1に記載の配線基板の製造方法。The method for manufacturing a wiring board according to claim 1, wherein a brazing material is fixed to the sealing metallization layer in advance.
JP2000172460A 2000-06-08 2000-06-08 Wiring board manufacturing method Expired - Fee Related JP4280394B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000172460A JP4280394B2 (en) 2000-06-08 2000-06-08 Wiring board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000172460A JP4280394B2 (en) 2000-06-08 2000-06-08 Wiring board manufacturing method

Publications (2)

Publication Number Publication Date
JP2001352003A JP2001352003A (en) 2001-12-21
JP4280394B2 true JP4280394B2 (en) 2009-06-17

Family

ID=18674859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000172460A Expired - Fee Related JP4280394B2 (en) 2000-06-08 2000-06-08 Wiring board manufacturing method

Country Status (1)

Country Link
JP (1) JP4280394B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4704819B2 (en) * 2005-06-30 2011-06-22 京セラキンセキ株式会社 Method for manufacturing piezoelectric device
JP4723540B2 (en) * 2007-07-04 2011-07-13 アキム株式会社 Electronic component package manufacturing method

Also Published As

Publication number Publication date
JP2001352003A (en) 2001-12-21

Similar Documents

Publication Publication Date Title
JPWO2003017364A1 (en) Electronic device and method of manufacturing the same
JP2000068414A (en) Manufacture of lead-less package
JP5448400B2 (en) Manufacturing method of ceramic parts
JP4280394B2 (en) Wiring board manufacturing method
JP4144265B2 (en) Electronic component manufacturing method, mother board for electronic component manufacturing, intermediate molded product of electronic component, and electronic component
JP4511311B2 (en) Multi-circuit board and electronic device
JP4049073B2 (en) Chuck plate for screen printing
JP2000263533A (en) Ceramic base and its manufacture
JP2007243088A (en) Multilayer ceramic substrate and its manufacturing method
JP2001044599A (en) Manufacture of multi-board ceramic wiring board
JP2004221520A (en) Package for storing light-emitting element and light-emitting device
JP2001179731A (en) Wiring board made of ceramic and method of manufacturing the same
JP3916136B2 (en) Ceramic substrate
JP3115706B2 (en) Mejiro placement wiring board manufacturing method
JP2005175280A (en) Method for manufacturing package for electronic component
JP3058999B2 (en) Mejiro wiring board
JP2001217334A (en) Method of manufacturing multi arrangement substrate for wiring boards
JP2004023051A (en) Multi-wiring board
JP3878842B2 (en) Multiple wiring board
JP2011114031A (en) Ceramic package for storing electronic component
JP2002373955A (en) Power module substrate
JP6783726B2 (en) Manufacturing method of wiring board and wiring board and manufacturing method of multiple wiring board
JP2002076532A (en) Ceramic circuit board
JP2005229027A (en) Ceramic package and method of manufacturing the same
JP2005229135A (en) Ceramic wiring board made, and method of manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070321

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090209

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090217

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090316

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120319

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120319

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120319

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130319

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130319

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140319

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees