JP3102162B2 - Printed wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board having a high-density wiring pattern, in particular, a so-called solder resist layer is formed between terminal portions (pads) to prevent the adhesion of solder. To printed wiring boards.

[0002]

2. Description of the Related Art Electronic equipment is becoming smaller, lighter, and more sophisticated.
The mounting density of electronic components on printed wiring boards has been increasing along with multifunctionalization, and so-called surface mounting (S
MT (Surface Mount Technology) method is introduced. Since the SMT method does not use through holes as in conventional printed wiring boards, it has the advantage of enabling not only high-density mounting but also self-correction of component positions by soldering. Correspondingly, for integrated circuit packages, DIP (Dual-inline Package) to SOP (Small-inline
outline package) and further to QFP (Quad Flat Package), and the lead pitch has been reduced to less than 0.5mm. Recently, a mounting example of a QFP with a pitch of 0.4 mm has been reported.

[0003]

As described above, when the wiring patterns have a high density, when soldering for connecting electronic components such as integrated circuits to pads on a substrate, the solder bridges between adjacent pads. There is a problem that it is easily formed. Such cross-linking of the solder is caused by misalignment when applying the solder paste to the pad surface, bleeding of the applied solder paste, and shape loss. Therefore,
A method has been adopted in which a layer (solder resist layer) that inhibits solder wetting is formed on the substrate surface between the pads, thereby avoiding the formation of crosslinks. FIG. 2 is a schematic sectional view showing a pad 3 made of a copper layer formed on one surface of the insulating substrate 1 and a solder resist layer 2 formed between the pads 3. If the solder resist layer 2 can be used to actively prevent solder wetting, the solder paste can be applied to the entire surface of the board, instead of being selectively applied only to the pads. This simplifies the process. it can.

However, in practice, when the pitch is reduced to about 0.4 mm, the occurrence of solder bridging between pads cannot be completely prevented, and short-circuit failure cannot be avoided. On the other hand, attempts have been made to improve the solder paste, but no satisfactory results have been obtained.

An object of the present invention is to enable formation of a partition layer (solder resist layer) for preventing bridging of solder between closely arranged pads.

[0006]

SUMMARY OF THE INVENTION An object of the present invention is to provide a substrate having an insulating surface, a wiring pattern comprising a conductive layer formed on the insulating surface and having a plurality of pads arranged close to each other; A solder resist layer formed of a photoresist having heat resistance to soldering for connecting an electronic component to the pad and exhibiting no wettability to molten solder, and formed on the insulating surface between the pads; in the printed wiring board having bets, the solder resist, of the conductive layer in the vicinity of the central portion of the between said pad
Form at least three times the projecting than the thickness, and has a shape reaching to the pad gradually reduced thickness in the projecting shape of each side, and a thickness approximately equal with the pad at the boundary between the pad A printed wiring board according to the present invention, or a wiring pattern having a plurality of pads arranged close to each other and comprising a conductive layer is formed on an insulating surface of the substrate, and an electronic component is formed on the pad. Forming a photoresist layer by applying a photoresist having heat resistance to soldering for connection and not showing wettability to molten solder on the insulating surface on which the wiring pattern is formed; With respect to the photoresist layer applied to the insulating surface, the intensity of exposure is gradually increased from a central portion between the pads toward the pad at least in a region between the pads.
Irradiating light using a changing exposure mask and developing the photoresist layer to form a solder resist layer having a thickness larger than the conductive layer near the center between the pads and decreasing as approaching the pads; Is formed at least on the insulating surface between the pads by the method for manufacturing a printed wiring board according to the present invention.

[0007]

FIG. 1 is a schematic sectional view for explaining the principle of the present invention, in which a solder resist layer 20 provided between pads 3 of a wiring pattern provided on an insulating substrate 1 is removed.
The cross-sectional shape is such that it is thickest at the center between the pads 3 and becomes thinner as it approaches the pads 3. In particular, by setting the above-mentioned maximum thickness to be three times or more the thickness of the conductive layer constituting the pad 3, specifically, 100 μm or more, the occurrence of solder bridging between the pads 3 is almost complete. Is blocked.

In order to form the solder resist layer 20 having the above-described thickness distribution, the exposure amount for the photoresist is changed from the saturation exposure amount to a value less than the saturation exposure amount in accordance with the thickness distribution. In order to provide such a change in exposure, a linear or dot-shaped light-shielding pattern having a dimension equal to or smaller than the resolution of the photoresist is passed through a mask which is distributed at a density corresponding to the exposure.

[0009]

FIG. 3 shows the solder resist layer according to the present invention.
FIG. 9 is a schematic cross-sectional view for explaining a step in an example for forming 20. As shown in FIG. 3A, a copper foil having a thickness of about 25 μm attached to one surface of an insulating substrate 4 made of, for example, an epoxy resin plate reinforced with a glass cloth is etched.
A large number of pads 5 arranged at three types of pitches of 0.4 mm, 0.5 mm, and 0.85 mm are formed.

Next, as shown in FIG. 3B, a photoresist layer 10 such as model number PSR4000 (manufactured by Taiyo Ink Co., Ltd.) is applied to the entire surface of the insulating substrate 4 and dried. Perform semi-cure at ℃ for 15 minutes and cool to room temperature. The thickness of the photoresist layer 10 is about 100 μm.
The photoresist layer 10 has heat resistance that does not cause deformation or deterioration even when heated to a reflow temperature of 250 ° C. in normal automatic soldering.

Next, as shown in FIG. 3C, a photoresist layer 10 is irradiated with ultraviolet rays 7 using a mask 6 having a transmittance distribution described later. At this time, the integrated exposure amount was 800 mJ / cm ² . On the mask 6, a fine light-shielding pattern 8 having a distribution as shown in FIG. FIG. 4A shows an example of the mask 6 used for exposing the negative photoresist layer 10, and FIG. 4B shows an example of the mask 6 used for exposing the positive photoresist layer 10.

In the case of the negative type mask shown in FIG.
A portion corresponding to the pad 5 is completely shielded from light, and a fine light-shielding pattern 8 is formed with a distribution such that the central portion between the pads 5 has a maximum transmittance. That is, in a portion corresponding to the solder resist layer 20 between the pads 5, the light shielding pattern 8 has such a distribution that the transmittance gradually decreases from the center to both sides thereof. On the other hand, in the case of the mask for the positive type shown in FIG. 4B, the portion corresponding to the pad 5 has the maximum transmittance, and the central portion between the pads 5 has a fine distribution with almost complete light shielding. A light-shielding pattern 8 is formed. That is, the distribution corresponding to the solder resist layer 20 between the pads 5 is a distribution of the light shielding patterns 8 such that the transmittance gradually increases from the center to both sides thereof.

The above integrated exposure amount of 800 mJ / cm ² corresponds to a thickness of 100 μJ.
m is the minimum exposure amount (saturation exposure amount) necessary to expose the photoresist layer 10 of m. Therefore, for example, FIG.
In the case of the mask of (a), the central portion in the region between the pads 5 is irradiated with ultraviolet light of a saturated exposure amount, and the entire coated photoresist layer 10 remains after development. On the other hand, the exposure amount decreases as approaching the pad 5 and becomes less than the saturated exposure amount, so that the photoresist layer 10 remaining after development decreases. Thus, a solder resist 20 having a thickness distribution as shown in FIG. 1 is produced.

It is sufficient that the light-shielding pattern 8 has a simple shape such as a dot shape or a line shape. However, it is sufficient that the light-shielding pattern 8 does not form its own pattern on the photoresist layer 10 constituting the solder resist layer 20. The photoresist layer 10 on the projection surface, i.e., on the photoresist layer 10.
Has a dimension on the mask 6 which is smaller than the resolution of. As a specific example, assuming that the projection magnification of the mask 6 is the same, the size of the light shielding pattern 8 on the mask 6 is 10 μm or less.

Referring again to FIG. 3, after exposure using the mask 6, the substrate is kept in a dark room for about 20 minutes to cause a dark reaction. After that, the photoresist layer 10 was developed using modified trichloroethane. Development conditions are spray pressure
2.5 kg / cm ² , liquid temperature 20 ° C., time 90 seconds. After development,
Post curing was performed in a hot air circulating furnace at 150 ° C. for 50 minutes.
In this way, a solder resist layer 20 having the maximum thickness at the center between the pads 5 is formed on the surface of the insulating substrate 4 between the pads 5 as shown in FIG. A solder resist layer 20 may be formed around the insulating substrate 4 where no wiring pattern is formed.

A solder paste was applied to the insulating substrate 4 and the solder was melted using a hot-air circulating far-infrared reflow furnace, and the occurrence of solder bridging between the pads 5 was examined. The results are shown in Tables 1 and 2. Table 1 shows the case where the solder paste was printed only on the pad 5, and Table 2 shows the case where the solder paste was applied on the entire surface of the insulating substrate 4, that is, both on the pad 5 and on the solder resist layer 20.
The measurement points for both Tables 1 and 2 are 965. For comparison, a measurement result in the case where the solder resist layer 2 having the same shape as the conventional one shown in FIG. 2 is provided is also shown.

[0017]

[Table 1] Pitch (mm) Number of cross-links (present invention) Number of cross-links (conventional example) 0.85 0 20 0.5 0 140 0.4 0 200

[Table 2] Pitch (mm) Number of cross-links generated (this invention) Number of cross-links generated (conventional example) 0.85 0 40 0.5 2 200 0.4 3 400 As can be seen from Tables 1 and 2, the occurrence of cross-linking of the solder is remarkable by the present invention. Reduced. Of particular note, as shown in Table 2, even when the solder paste is applied to the entire surface of the insulating substrate, the occurrence of cross-linking is about 0.3% of the total number of pads even when the pitch is 0.4 mm. It has been reduced to 1/100 or less.

Japanese Patent Application Laid-Open No. Sho 62-67547 and Japanese Patent Application Laid-Open No. HEI 1-1985-1 disclose a method of controlling the light transmittance of an opening of a mask by using a set of light-shielding patterns having dimensions smaller than the resolution described above.
Although it is disclosed in 169451 or the like, there is no example of changing the distribution density of such a fine light-shielding pattern in order to continuously change the transmittance in the opening of one mask as in the present invention.

In the above description, the thickness of the solder resist layer 20 at the boundary with the pad 5 has not been particularly mentioned. It is desirable that the upper surface of the solder resist layer 20 at this boundary is equal to or higher than that of the pad 5. However, if the center of the pad 5 has a sufficient height, the object of the present invention can be achieved even if the thickness of the solder resist layer 20 is thinner than the pad 5 near this boundary.

[0020]

According to the present invention, it is possible to reduce the occurrence of bridging of solder between pads when mounting electronic components on a printed wiring board having a high-density wiring pattern, and to reduce the size and weight of electronic devices. It has the effect of contributing to the promotion of high performance and multi-function.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is an explanatory diagram of a conventional problem.

FIG. 3 is an explanatory diagram of a process according to an embodiment of the present invention.

FIG. 4 is an explanatory view of an exposure mask used for carrying out the present invention.

[Explanation of symbols]

1, 4 Insulating substrate 7 Ultraviolet light 2, 20 Solder resist layer 8 Light-shielding pattern 3, 5 Pad 10 Photoresist layer 6 Mask

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-256789 (JP, A) JP-A-3-278592 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 3/28 H05K 3/34

Claims (4)

(57) [Claims] 1. A substrate having an insulating surface, a wiring pattern comprising a conductive layer formed on the insulating surface and having a plurality of terminals arranged close to each other, and connecting an electronic component to the terminals. A printed wiring board comprising a photosensitive material having heat resistance to soldering and not showing wettability to molten solder, and having at least a partition layer formed on the insulating surface between the terminals. partition wall layer, the conductive layer in the vicinity of the central portion of the inter-said terminal
Form at least three times the projecting than the thickness, and has a shape to reach the terminal decreases gradually in thickness in the projecting shape of each side, and a thickness approximately equal to the said terminal at the boundary between the terminal A printed wiring board, comprising: And a plurality of terminals arranged close to each other.
Wiring pattern consisting of two conductive layers on the insulating surface of the substrate
And soldering for connecting electronic components to the terminals.
Shows heat and wets molten solder
No insulating material on which the wiring pattern is formed
Forming a photosensitive material layer by coating the photosensitive material layer on the insulating surface;
And in the region between the terminals from the center between the terminals to the end
Exposure masks whose exposure intensity gradually changes toward
After irradiating light, the photosensitive material layer is developed to
Near the center between the conductive layer and the end
The barrier layer, which has a thickness that decreases as it approaches
And forming the insulating surface between Kutomo the terminals
A method for manufacturing a printed wiring board, comprising: 3. The method according to claim 1, wherein the photosensitive material is a negative type or a positive type.
The method according to claim 2, wherein the method is a photoresist . 4. The method according to claim 1, wherein the exposure mask is provided on the photosensitive material layer.
Projection dimensions do not exceed the resolution of the photoresist
A light-shielding pattern having dimensions.
The method for producing a printed wiring board according to claim 2 .