JP3090120B2 - Terminal arrangement device for integrated circuits - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for arranging terminals of an integrated circuit, and more particularly to a PGA (pin grid array) and a BGA in a layout design of a semiconductor integrated circuit package.
The present invention relates to an integrated circuit terminal arrangement device suitable for a GA (ball grid array).

[0002]

2. Description of the Related Art In an integrated circuit, an LSI chip is covered with a package to form a semiconductor integrated circuit package. In this case, pads inside the package are connected to terminals on the outer shape of the package. In an LSI, when a plurality of output terminals operate simultaneously from low level to high level or from high level to low level at the same timing,
The charge / discharge current of the output load capacitance flows instantaneously to the power supply and the ground, and noise is generated in the power supply / ground line depending on the magnitude of the current. For this reason, it is necessary to limit the number of output terminals that can be operated at the same time and to consider the arrangement position of the terminals so that noise does not occur.

When considering the positions of the terminals, the positions of the operating voltage application terminal and the ground terminal are fixed. Except for the operation voltage application terminal and the ground terminal, input terminals, output terminals, and the like of logic circuits and the like in an LSI chip are provided. Assign the terminals on the package outline to the input / output terminals.

[0004] An example of a conventional terminal position determining device is disclosed in Japanese Patent Application Laid-Open No. 9-97273. This system uses the terminal location information, netlist, and package library to perform terminal placement and creates terminal placement information, and uses this terminal placement information, terminal information, limit value library, and buffer drive capability library to operate simultaneously. A check was made and the terminals were arranged.

[0005]

However, in recent years,
PGAs and BGAs, in which terminals on the outer shape of the package are arranged in a grid and are easy to mount, are attracting attention.
In the GA package, it is necessary to determine the terminal position in consideration of the operating condition of the integrated circuit and the mounting condition on the printed board. However, in the terminal position determining device disclosed in Japanese Patent Application Laid-Open No. 9-97273, the terminal position of the LSI is determined. About the decision, PG
No consideration is given to A or BGA packages. Therefore, there is a demand for a terminal arrangement device that is compatible with PGA and BGA.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and when designing a PGA or BGA package of an LSI, an integrated circuit capable of easily and quickly determining an optimum terminal position in consideration of the operation and mounting of the LSI. An object of the present invention is to provide a terminal arrangement device for a circuit.

[0007]

According to a first aspect of the present invention, there is provided an integrated circuit terminal arrangement apparatus, comprising: a terminal arrangement in a layout design of a semiconductor integrated circuit package; And a package information for extracting correspondence information between a terminal number on an outer shape of the integrated circuit package and a pad number inside the integrated circuit package and fixed position information of a power supply / GND. An extraction unit, a terminal information extraction unit for extracting terminal information such as terminal names, a simultaneous operation terminal extraction unit for extracting simultaneous operation terminals, and a data storage unit storing the fixed position information, the terminal information and the simultaneous operation terminals And an arrangement of the terminal names corresponding to the pad numbers in the integrated circuit package and a first editable arrangement of these arrangements. And the child information editing unit, the integrated circuit and the terminal number on the package outline and displays the arrangement of the corresponding one of the terminal name, the editable these arrangements 2
A terminal information editing unit, the first terminal information editing unit, and the second
In conjunction with a terminal information editing unit, information is read from the data storage unit, the arrangement information is output to the first terminal information editing unit, and the arrangement information is output to the second terminal information editing unit. The number of simultaneously operating terminals is determined from a control unit that outputs the same, the simultaneous operation terminals, the arrangement edited by the first terminal information editing unit, and the arrangement edited by the second terminal information editing unit. It has a simultaneous operation check unit for checking whether it is within the limit.

In the PGA and BGA packages, it is necessary to determine the terminal positions in consideration of the operating conditions of the integrated circuit and the conditions for mounting on a printed circuit board. A first terminal information editing unit as an editable editor displaying a number;
By visually performing the terminal arrangement with the second terminal information editing unit as an editable editor displaying the terminal numbers on the integrated circuit package outer shape, the operation verification of the integrated circuit and the terminal arrangement are visually performed, Since the terminal arrangement at the time of mounting the integrated circuit can be confirmed on the screen, the examination of the terminal arrangement of the PGA and BGA packages can be completed in a short time.

According to a second aspect of the present invention, there is provided an integrated circuit terminal arrangement apparatus according to the first aspect.
The semiconductor integrated circuit package is configured such that the semiconductor integrated circuit is mounted on a pin grid array type or ball grid array type substrate.

According to the invention having such a configuration, in particular, the PG
A, suitable for BGA package terminal arrangement,
The study of the terminal arrangement of the GA and BGA packages can be completed in a short time.

According to a third aspect of the present invention, in the terminal arrangement apparatus for an integrated circuit according to the first or second aspect, the arrangement displayed by the first terminal information editing unit is the integrated circuit package. FIG. 4 is a layout diagram showing the layout of internal pads, wherein the layout displayed by the second terminal information editing unit is a layout diagram of a pin grid array or a ball clip array of the outer shape of the integrated circuit package.

According to the invention having such a configuration, PGA,
The terminal arrangement in the BGA can be visually performed in a short time.

According to a fourth aspect of the present invention, there is provided the terminal arrangement apparatus for an integrated circuit according to any one of the first to third aspects, wherein the first terminal information editing unit or the second terminal information editing unit is provided. The simultaneous operation check unit can be activated from the arrangement display screen.

According to the invention having such a configuration, the operation check can be performed on the screen, so that the terminal arrangement can be visually edited, and the terminal arrangement in the PGA and the BGA can be performed in a short time. be able to.

According to a fifth aspect of the present invention, there is provided an integrated circuit terminal placement apparatus according to any one of the first to fourth aspects, wherein the simultaneously operating terminals are divided into groups that change at the same timing and displayed. The configuration includes a simultaneous operation display unit.

According to the invention having such a configuration, the names of simultaneously operating terminals can be confirmed on the screen, so that PGA,
Terminal arrangement in the BGA can be performed in a short time.

According to a sixth aspect of the present invention, there is provided the terminal arrangement apparatus for an integrated circuit according to any one of the first to fifth aspects, wherein the terminal name stored in the data storage unit is set on a package outer shape. The configuration corresponds to the terminal arrangement position.

According to the invention having such a configuration, PGA,
The terminal name arrangement position in the BGA can be preferentially indicated.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. The terminal arrangement device for an integrated circuit according to the present invention is suitable for PGA and BGA. PG
A and BGA are circuit patterns in which a semiconductor chip is mounted on a substrate having external terminals arranged in a lattice and connected to pads arranged around the semiconductor chip and external terminals (terminals on the package outer shape) of the substrate. Are connected by a wire.

FIG. 1 is a block diagram showing a configuration of a terminal arrangement device for an integrated circuit according to the present invention. This terminal arrangement device 1
A package file extracting unit 3 for extracting library file 2, information on correspondence between terminal numbers on the package outer shape of the LSI and pad numbers inside the package, and fixed position information on power supply / GND from the library file 2;
SI circuit diagram file 4 and this LSI circuit diagram file 4
A terminal information extraction unit 5 for extracting terminal information of all terminal names, IO (input / output) attributes, and function names from a terminal, a data processing unit 6 for editing the arrangement position of terminals, a simulation result file 7 of an LSI circuit, A simultaneous operation terminal extraction unit 8 for extracting simultaneous operation terminals from the simulation result file of the LSI circuit, an output simultaneous operation check unit 9 for checking whether the number of simultaneous operation terminals is within a limit, and a terminal arrangement for outputting terminal arrangement information And an information output unit 10.

The data processing unit 6 includes a data storage unit 61 for storing the data extracted by the package information extraction unit 3, the data extracted by the terminal information extraction unit 5, and the data extracted by the simultaneous operation terminal extraction unit 8, The first terminal information editing unit 62 as an editor that displays the pad numbers and terminal names inside the package on a display screen as an actual arrangement diagram, and allows the terminal arrangement to be changed on the screen.
And a terminal number and a terminal name when the LSI is mounted are displayed on a display screen as an actual layout diagram, and a second layout as an editor capable of changing the layout of the terminal positions on the screen.
A terminal information editing unit 63, these terminal information editing units 62,
The control unit 64 performs various controls such as transferring data to and from the data storage unit 61 in conjunction with the data storage unit 61, and the names of simultaneously operating terminals extracted by the simultaneous operation terminal extracting unit 8 are changed at the same time for each group. Simultaneous operation display section 65 that displays the terminal names divided and divided into groups on the display screen.
And

The output simultaneous operation checking unit 9 is an output terminal that changes the value at the same timing when the LSI at the terminal position edited by the first terminal information editing unit 62 and the second terminal information editing unit 63 operates. Whether or not the number of lines is suppressed within the limit, and the noise generated at that time is GN
It is checked whether or not the terminal arrangement is such that the D line can be held down, and the determination result is output to the simultaneous operation display section 65. The simultaneous operation display section 65 displays the result of the simultaneous operation check for each group for each group.

The control section 64 immediately stores the information whose terminal position has been changed by the first terminal information editing section 62 in the data storage section 61.
Is reflected in the second terminal information editing unit 63. Similarly, the second
The information whose terminal position has been changed by the terminal information editing unit 63 is controlled so as to be immediately reflected in the data storage unit 61 and the first terminal information editing unit 62.

The operation of the terminal arrangement device 1 will be described with reference to the flowchart of FIG. First, in step 1, the package information extraction unit 3 extracts the correspondence information between the terminal numbers on the outer shape of the integrated circuit package and the pad numbers inside the integrated circuit package, and the fixed position information of the power supply / GND from the library file 2, The data is stored in the data storage unit 61.

Next, in step 2, the terminal information extraction unit 5 extracts the terminal name, IO attribute, and function name from the LSI circuit diagram file 4, arbitrarily associates the terminal number with the terminal name, and stores the data in the data storage unit 61. To be stored.

Next, in step 3, the control section 64 reads the terminal information of the data storage section 61, and outputs to the first terminal information editing section 62 an arrangement indicating the terminal names corresponding to the LSI pad numbers in order. The first terminal information editing unit 62, for example,
As shown in FIG. 3, a layout diagram in which terminal names are arranged in the order of pad numbers is displayed on the screen. In the layout diagram shown in FIG. 3, pad numbers and terminal names are shown correspondingly around a central rectangular LSI chip. Further, the control unit 64 reads the terminal information of the data storage unit 61 and outputs the arrangement of the terminal numbers and terminal names of the pin grid array or the ball grid array on the package outer shape to the second terminal information editing unit. Second
For example, as shown in FIG. 4, the terminal information editing unit 63 displays an arrangement diagram of terminal numbers and terminal names of the pin grid array or the ball grid array on the package outer shape on the screen.

Next, in step 4, a simulation of the LSI circuit is executed, and the simultaneous operation terminal extracting unit 8 extracts the simultaneous operation terminal from the simulation result file 7 of the LSI circuit in which the result is stored, and stores the data as data. While being stored in the unit 61, the simultaneous operation display unit 65 divides the names of terminals that are read and simultaneously operated from the data storage unit 61 into groups that change at the same time, and the grouped terminal names are, for example, as shown in FIG. To be displayed.

Next, in step 5, the LSI operation and the LSI
Edit the terminal layout while considering the implementation. Specifically, the terminal name arranged at an arbitrary position on the screen of the first terminal information editing unit 62 in which the pad number of the package is associated with the terminal name is arranged at an appropriate position by, for example, operating a mouse. . The control unit 64 immediately reflects this change in the data storage unit 61 and the second terminal information editing unit 63. Therefore, the screen of the second terminal information editing unit 63 is also changed.

Similarly, on the screen of the second terminal information editing unit 63 displaying the terminal number when the LSI is mounted, the terminal name arranged at an arbitrary position is edited so as to be arranged at an appropriate position. The control unit 64 immediately reflects the change in the data storage unit 61 and the first terminal information editing unit 62. As described above, the first terminal information editing unit 62 and the second terminal information editing unit 63
Are operated in conjunction with each other via the control unit 64. Note that the power supply / GND position extracted by the package information extraction unit 3 cannot be changed, and no signal terminal can be arranged at this position.

Next, in step 6, the output simultaneous operation check section 9 is activated on the screen of the first terminal information editing section 62 or on the screen of the second terminal information editing section 63 to check the output operation. The output simultaneous operation check unit 9 limits the number of output terminals whose values change at the same timing when the LSI at the terminal position edited by the first terminal information editing unit 62 and the second terminal information editing unit 63 operates. It is checked whether or not the terminal arrangement is such that the GND line can suppress the noise generated at that time, and the result of the determination is displayed on the simultaneous operation display section 65.
Output to

Next, at step 7, the simultaneous operation display section 65
NG even in one of all groups displayed in
If there is, the process returns to step 5, and the terminal arrangement is re-edited on the first terminal information editing unit 62 and the second terminal information editing unit 63. Steps 5 and 6 are repeated until the output simultaneous operation check of all groups is OK. When the output simultaneous operation check of all the groups is OK, in step 8, the control unit 64 outputs the final terminal arrangement information to the data storage unit 61, and the terminal arrangement information output unit 10 outputs the terminal arrangement information. I do.

According to such a terminal arrangement device for an integrated circuit, in a PGA or BGA package, it is necessary to determine a terminal position in consideration of an operating condition of an LSI and a mounting condition on a printed circuit board. The operation of the LSI is verified and the terminal arrangement is performed by visually performing the terminal arrangement on the editable editor displaying the pad number of the LSI and the editable editor displaying the terminal number on the LSI outline. Since the terminal arrangement at the time can be confirmed on the screen, the examination of the terminal arrangement can be completed in a short time.

Next, a second embodiment of the integrated circuit terminal arrangement device of the present invention will be described with reference to the block diagram of FIG. In the terminal arrangement device 1a, in the first embodiment, the data storage unit 61 stores the terminal numbers at which the signal terminals can be arranged and the terminal information extraction unit 5 extracted by the package information extraction unit 3.
While the extracted terminal names are arbitrarily associated with each other and stored, the correspondence between the terminal numbers and the terminal names is stored with reference to the constraint file 11 which specifies the terminal arrangement conditions, and is stored at a specific position. The difference is that the terminal name is preferentially arranged for the terminal number.

The terminal arrangement device 1a includes a data processing unit 6
a, the package information extraction unit 3 and the data storage unit 6
1, and a reading means 66 is interposed between the terminal information extracting section 5 and the data storing section 61. Also, if the terminal name is L
A constraint file 11 is provided which stores a file for designating a terminal arrangement condition (for example, upper right, lower right, lower left, lower left, upper left) in which area of the SI outer shape. The data can be read by the reading means 66. The other configuration is the same as that of the first embodiment, and therefore, the same components are denoted by the same reference numerals and description thereof will be omitted.

The reading means 66 stores the correspondence information between the terminal numbers on the package outer shape of the LSI to be designed extracted by the package information extracting section 3 and the pad numbers inside the package, and the power supply / GND position information to the data storage section 66. Store. At this time, the terminal numbers on the package outer shape are divided for each constraint condition area. Then, the reading means 66 reads the terminal name extracted by the terminal information
If an arrangement position is indicated in the data storage unit 6, it is associated with an arbitrary terminal number belonging to the constraint condition position.
1 is preferentially stored.

When all of the terminal names whose arrangement positions have been instructed are stored in the data storage unit 61, the reading unit 66 associates the remaining terminal names with arbitrary terminal numbers,
To store.

According to the integrated circuit terminal arrangement device of the second embodiment, in addition to the effects of the first embodiment, the PG
In the arrangement of the terminal positions in A and BGA, the terminal name arrangement position can be preferentially indicated.

[0038]

According to the terminal arrangement apparatus for an integrated circuit of the present invention, when designing a PGA or BGA package of an LSI, the optimum terminal position can be easily and quickly determined in consideration of the operation and mounting of the LSI. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an integrated circuit terminal arrangement device according to the present invention.

FIG. 2 is a flowchart showing an operation of the integrated circuit terminal arrangement device shown in FIG. 1;

FIG. 3 shows an example of a screen displaying a layout of pad numbers inside an integrated circuit package.

FIG. 4 shows an example of a screen displaying terminal numbers on the outer shape of the integrated circuit package.

FIG. 5 illustrates an example of a state in which terminal names classified into simultaneous operation groups are displayed on a screen on a simultaneous operation display unit.

FIG. 6 is a block diagram showing a second embodiment of a terminal arrangement device for an integrated circuit according to the present invention.

[Explanation of symbols]

 1 integrated circuit terminal arrangement device, 2 library file, 3 package information extraction unit, 4 LSI circuit diagram file, 5 terminal information extraction unit, 6 data processing unit, 61 data storage unit, 62 first terminal information editing unit, 63 2 terminal information editing unit, 64 control unit, 65 simultaneous operation display unit, 7 LSI simulation result file, 8 simultaneous operation terminal extraction unit, 9 simultaneous operation check unit, 10 terminal arrangement information output unit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 17/50 H01L 23/12

Claims (6)

(57) [Claims] 1. An integrated circuit terminal arrangement apparatus for deciding a terminal arrangement in a layout design of a semiconductor integrated circuit package so as to suppress noise by limiting the number of simultaneously operating terminals. And the power supply /
A package information extraction unit for extracting fixed position information of GND; a terminal information extraction unit for extracting terminal information such as terminal names; a simultaneous operation terminal extraction unit for extracting simultaneous operation terminals; the fixed position information and the terminal information And a data storage unit storing the simultaneous operation terminals, a first terminal information editing unit which displays an arrangement of the terminal names corresponding to the pad numbers inside the integrated circuit package and edits these arrangements, A second terminal information editing unit capable of displaying the arrangement of the terminal names corresponding to the terminal numbers on the outer shape of the integrated circuit package and editing these arrangements; the first terminal information editing unit and the second terminal information In conjunction with an editing unit, the information is read from the data storage unit, the arrangement information is output to the first terminal information editing unit, and the information is output to the second terminal information editing unit. A control unit for outputting arrangement information; the number of simultaneously operating terminals based on the simultaneous operation terminals; the arrangement edited by the first terminal information editing unit; and the arrangement edited by the second terminal information editing unit. And a simultaneous operation check unit for checking whether or not is within a predetermined limit. 2. An integrated circuit terminal arrangement device according to claim 1, wherein said semiconductor integrated circuit package is one in which a semiconductor integrated circuit is mounted on a pin grid array type or ball grid array type substrate. Placement device. 3. The integrated circuit terminal arrangement device according to claim 1, wherein said arrangement displayed by said first terminal information editing unit is an arrangement diagram showing an arrangement of pads inside said integrated circuit package. Wherein the arrangement displayed by the second terminal information editing unit is an arrangement diagram of a pin grid array or a ball clip array of the outer shape of the integrated circuit package. 4. The device for arranging terminals of an integrated circuit according to claim 1, wherein the simultaneous operation check unit is arranged on the arrangement display screen of the first terminal information editing unit or the second terminal information editing unit. Characterized in that the device can be activated. 5. The terminal arrangement device for an integrated circuit according to claim 1, further comprising a simultaneous operation display section for dividing and displaying the simultaneously operated terminals into groups that change at the same timing. Terminal arrangement device for integrated circuits. 6. The terminal arrangement device for an integrated circuit according to claim 1, wherein a terminal name stored in said data storage unit is associated with a terminal arrangement position on a package outer shape. A terminal arrangement device for an integrated circuit, comprising: