JP3068876B2 - Frequency adjustment circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[Object of the Invention]

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency adjustment circuit having improved frequency characteristics in a video signal processing circuit of a liquid crystal TV, for example.

[0003]

2. Description of the Related Art In recent years, for example, in a signal processing circuit for driving a liquid crystal display, improvement in frequency characteristics has been demanded from the viewpoint of high image quality. But this kind of circuit
Due to variations in the transmittance characteristics of liquid crystal panels, there is a demand for widening the output dynamic range. Therefore, the signal processing circuit generally includes a PNP having poor frequency characteristics.
It is necessary to use a transistor.

FIG. 4 shows a drive signal processing circuit using a conventional PNP transistor. In this circuit, the emitters of the transistors Q11 and Q12 are connected to a resistor R11,
They are interconnected via R12 and connected to a reference power supply Vcc1 via a current source I11. The base of the transistor Q11 is connected to the reference power supply Vref, the base of the transistor Q12 is connected to the input IN, and the collector is connected to the collector of the transistor Q13, the base of the transistor Q14 and one end of the resistor R15. The emitters of the transistors Q13 and Q14 are grounded via resistors R13 and R14, respectively.
The base of 13 is connected to the other end of the resistor R15. The collector of the transistor Q14 is connected to the reference power supply Vcc2 via the resistor R16 and to the output OUT.

In this circuit, the output of a Gm amplifier composed of transistors Q11 and Q12 is turned back by a current mirror composed of transistors Q13 and Q14, converted into a voltage by a resistor R16, and output. The output DC level can be freely set by setting the power supply Vcc2. Where R
Reference numeral 15 denotes a resistor for β compensation of the current mirror.

[0006]

As described above, PNP
Transistors generally have poor frequency characteristics, which limits the frequency characteristics of the circuit.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a circuit capable of selectively compensating a characteristic near a cutoff frequency even in a circuit whose frequency characteristic is deteriorated by a PNP transistor or the like.

[Structure of the Invention]

[0009]

SUMMARY OF THE INVENTION The present invention is characterized in that the amount of peaking can be adjusted by applying peaking in the signal path and adjusting the frequency of the peaking.

[0010]

According to such a configuration, the frequency characteristics near the peaking frequency can be improved, and the adjustment can prevent the adverse effects such as oscillation due to excessive peaking.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. FIG.
The emitters of the transistors Q1 and Q2 are interconnected via resistors R1 and R2, respectively, and connected to a reference power supply Vcc1 via a current source I1. The base of the transistor Q1 is connected to the reference power supply Vref, the base of the transistor Q2 is connected to the input IN, the collector is connected to the collector of the transistor Q3, the base of the transistor Q4 and one end of the resistor R5. The emitters of the transistors Q3 and Q4 are grounded via resistors R3 and R4, respectively.
The base 3 is connected to the other end of the resistor R5 and one end of the capacitor C. The collector of the transistor Q4 is connected to the reference power supply Vcc2 via the resistor R6 and to the output OUT. The other end of the capacitor C is connected to the collector of the switching transistor Q5, the base of the transistor Q5 is connected to the control terminal CT, and the emitter is grounded. When the control terminal CT is set to the H level, the transistor Q5 saturates, and the capacitor C becomes the capacitance to the ground. At the L level, the transistor Q5 is cut off and the effect of the capacitor C is lost.

In this circuit, if the time constants of the capacitor C and the resistor R5 are set near the cutoff frequency of the circuit, a peaking effect as shown by a broken line in FIG. 2 can be obtained at the output OUT.

In FIG. 1, a plurality of combinations of a capacitor C, a transistor Q5 and a control terminal CT are connected in parallel, and the transistor Q5 is turned on / off.
By performing the F control, if the capacitance value with respect to the ground is selected, the peaking frequency changes, and as a result, the peaking amount can be adjusted. That is, the frequency characteristics near the cutoff frequency can be improved.

FIG. 3 shows another embodiment of the present invention. In this circuit, the resistor R5 for β compensation of FIG.
R5b, and a capacitor C is connected to the division point. Other connections are omitted because they are the same as those in FIG.

In this embodiment, the amount of peaking is determined by the capacitor C
1, determined by the resistor R5b. Generally, if the current gain of the current mirror is 1, the resistances R5a and R5b for β compensation are R3 = R
5 = · R5 = 0.5 · (R5a + R5b) Since it is sufficient that the degree of freedom of the value of the resistor R5b to be set can be increased, the degree of freedom of selection can be obtained, and the peaking amount of the frequency characteristic can be changed. it can.

[0017]

As explained above, according to the present invention,
The frequency characteristics near the cutoff frequency can be improved with a very simple configuration, and the characteristics can be selectively switched, so that there is an advantage that the characteristics can be easily improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a frequency characteristic diagram of FIG. 1;

FIG. 3 is a circuit diagram showing another embodiment of the present invention.

FIG. 4 is a conventional circuit diagram.

[Explanation of symbols]

 Q3 to Q5: Transistors R3 to R5: Resistors C: Capacitors

Claims (3)

(57) [Claims] 1. A collector of a first transistor, which is connected to a base of a second transistor having one end of a first resistor and a collector as an output, and one end of a capacitor and one end of a capacitor connected to the base of the first transistor. The other end of the first resistor is connected, the emitters of the first and second transistors are grounded via second and third resistors, respectively, and the other end of the capacitor is opened. Alternatively, a frequency adjustment circuit comprising switch means for grounding. 2. The frequency adjustment circuit according to claim 1, wherein a plurality of capacitors and switch means are provided in parallel, and the value of the capacitance to ground is equivalently adjusted by switching the switch means. 3. The frequency adjustment circuit according to claim 1, wherein the first resistor is divided, and a capacitor is connected to the division point.