JP3063416B2 - Thin film transistor matrix and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (TFT) matrix and a method of manufacturing the same.

In recent years, a liquid crystal display or an electroluminescence display panel of an active matrix drive system has been used. A thin film transistor matrix is used as an active matrix.

[0003] There is a demand for a liquid crystal display having a large screen, and development of a manufacturing technique suitable for it is urgent.

[0004]

2. Description of the Related Art FIGS. 5A to 5C are a plan view and a cross-sectional view showing a conventional TFT matrix, and FIG.
(b) is a sectional view taken along line AA, and (c) is a sectional view taken along line BB.

The outline of the manufacturing process is as follows. For example, a Ti film is formed on the glass substrate 1 and is etched using a mask to form a gate electrode 2a and a gate bus line 2b. Next, as the gate insulating film 3, for example, S
An iN film, an a-Si film, for example, as the operating semiconductor film 4, and an SiN film, for example, as the channel protection film 5, are continuously formed by, for example, a plasma CVD method.

The channel protective film 5 is etched using a mask, and the channel protective film 5 is left on the gate electrode 2a. For example, an n ⁺ -type a-Si film and a Ti film serving as source / drain electrodes are sequentially formed as a contact layer 7 on the entire surface, and then the Ti film, the contact layer 7 and the operating semiconductor film 4 are formed using a mask.
Is etched to perform element isolation to form a source electrode 8 and a drain electrode 9.

[0007] For example, a Mo film is formed on the entire surface and is patterned to form a drain bus line 10 connected to the drain electrode 9. Next, an ITO film serving as a pixel electrode material is formed, and is patterned to form a pixel electrode 11 connected to the source electrode 8. The pixel electrode 11 extends on the adjacent gate bus line 2b.

[0008] Thus, a TFT matrix is completed. At this time, a capacitance is formed between the pixel electrode 11 of the TFT matrix and the adjacent gate bus line 2b. In the case of a liquid crystal display, this capacitor is provided as an auxiliary capacitor for preventing luminance unevenness due to variations in liquid crystal resistance. In order to form this auxiliary capacitance, there is a method of providing a conductive film below the pixel electrode via an insulating film separately from the gate bus line. However, since this lowers the aperture ratio, a high-definition and low power consumption type is provided. Not suitable for liquid crystal displays.

The method of using the gate bus line 2b as shown in FIG. 5 as an auxiliary capacitance electrode has a wide gate bus line in order to increase the auxiliary capacitance and reduce the resistance of the gate bus line. It has become.

[0010]

By the way, if the width of the gate bus line is further increased to obtain a larger auxiliary capacitance in order to improve the image quality, there arises a problem that the aperture ratio decreases.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and has as its object to provide a structure of a TFT matrix and a method of forming the same, which can increase the auxiliary capacitance without lowering the aperture ratio.

[0012]

FIG. 1 is a plan view and a sectional view showing a TFT matrix according to the present invention, and FIGS. 2 to 4 are step-by-step plan views and sectional views (part 1) to () showing an embodiment. That is 3).

The above object is to provide a thin film transistor formed on a transparent insulating substrate 1 and arranged in a matrix.
The thin film transistor has a gate bus line 22b connected to the gate electrode 22a of the thin film transistor, a drain bus line 10 connected to the drain electrode 9, and a pixel electrode 11 connected to the source electrode 8. A gate electrode 22a, a gate insulating film 3, an operating semiconductor film 4, and source / drain electrodes 8, 9 are sequentially stacked. The gate bus line 22b and the drain bus line 10 are a thin film transistor matrix intersecting via the insulating film 3. Thus, the gate bus line 22b is solved by a thin film transistor matrix having a transparent conductive film addition portion 21 facing the pixel electrode 11 with the insulating film 3 interposed therebetween.

In manufacturing the thin film transistor matrix, a step of forming partitions 21 of a transparent conductive film arranged in a matrix on the transparent insulating substrate 1 is performed, and a first metal film 22 and a second metal film 22 are formed on the entire surface. A step of sequentially forming a metal film 23, a step of selectively etching the second metal film 23 using a mask to form a metal mask 23a for forming a gate bus line, and a step of using the metal mask 23a as a mask. The first
The gate bus line 22b connected to the section 21 of the transparent conductive film is formed by selectively oxidizing the metal film 22 to form a transparent insulating film and leaving the first metal film 22 under the metal mask 23a. And a method of manufacturing a thin film transistor matrix having the above steps.

The first metal film 22 is formed of a metal which is easily anodic oxidized, and the second metal film 23 is formed of a metal which is difficult to be anodic oxidized. Can be solved by the above-described method for producing a thin film transistor matrix by anodic oxidation.

[0016]

According to the present invention, the transparent conductive film addition portion 21 connected to the gate bus line 22b is provided, and this portion is opposed to the pixel electrode 11, so that the auxiliary capacitance can be increased without lowering the aperture ratio. it can.

Further, the first metal film 22 is selectively oxidized into a transparent insulating film by using the metal mask 23a formed by processing the second metal film 23 as a mask, and the first metal film 22 under the metal mask 23a is selectively oxidized. Since the gate bus line 22b is formed while leaving the metal film 22 of the above, the gate bus line 22b is at the same height as the surrounding transparent insulating film, so that there is no step. Therefore, there is no fear that the step coverage is deteriorated when a gate insulating film is deposited thereon.

The first metal film 22 is formed of a metal which is easily anodized, the second metal film 23 is formed of a metal which is difficult to be anodized, and the oxidation of the first metal film 22 is performed by the anode. The gate bus line 22b can be formed by oxidation.

[0019]

1 (a) to 1 (c) are a plan view and a sectional view showing a TFT matrix according to the present invention, wherein FIG. 1 (a) is a plan view, FIG. 1 (b) is an AA sectional view, and FIG. The BB sectional drawing is shown.

In the figure, 1 is a glass substrate, 21 is a transparent conductive film added portion, 22a is a gate electrode, 22b is a gate bus line, 22
c is a transparent insulating film, 3 is a gate insulating film, 4 is an operating semiconductor film, 5 is a channel protective film, 7 is a contact layer, 8 is a source electrode, 9 is a drain electrode, 10 is a drain bus line,
11 represents a pixel electrode.

A transparent conductive film adding portion 21 is connected to the gate bus line 22b. The transparent conductive film adding portion 21 serves as an auxiliary capacitance electrode, and faces the pixel electrode 11 with the transparent insulating film 22c and the gate insulating film 3 interposed therebetween. To form an auxiliary capacitance.

Next, steps for realizing such a structure will be described. FIG. 2 is a plan view and a cross-sectional view (part 1) showing the embodiment in the order of steps, FIG. 3 is a plan view and a cross-sectional view (part 2) showing the embodiment, and FIG. (A), (c), (e), (g), (i), (k), (m),
(o) is a plan view, (b), (d), (f), (h), and (q) are BB cross-sectional views, and (j), (l), (n), and (p) are A FIG.

The process of the embodiment will be described below with reference to these figures. Referring to FIGS. 2A and 2B, a section of an ITO film (transparent conductive film) 21 having a thickness of, for example, 80 nm is formed on the glass substrate 1 in an island shape. The sections of the ITO film are arranged in a matrix corresponding to the TFT matrix to be formed, and serve as electrodes of the auxiliary capacitance.

An Al film 22 having a thickness of, for example, 130 nm and a Cr film 23 having a thickness of, for example, 10 nm are continuously formed on the entire surface by sputtering. See FIGS. 2 (c) and 2 (d). A resist is applied to the entire surface, and a resist mask (not shown) corresponding to the pattern of the gate electrode and the gate bus line is formed by exposure and development, and the resist mask is used as a mask. Cr mask corresponding to the pattern of the gate electrode and the gate bus line by wet etching the Cr film 23
Form 23a. At this time, the gate bus line portion of the Cr mask 23a is formed so as to overlap the ITO film (transparent conductive film) 21. After that, the resist mask is removed.

Referring to FIGS. 2E and 2F, using the Cr mask 23a as a mask, the Al film 22 is selectively oxidized by anodic oxidation, and the Al film 22 is converted to an Al ₂ O ₃ film 22c.
And make it transparent. Next, thermal oxidation is performed in an oxygen atmosphere to complete the oxidation. Plasma oxidation may be performed instead of thermal oxidation.

The Cr mask 23a is not anodized, the underlying Al film 22 remains, and a gate electrode 22a and a gate bus line 22b are formed. 2 (g) and 2 (h) The Cr mask 23a is removed by wet etching to flatten the surface.

3 (i) and 3 (j) By a plasma CVD method, an SiN film having a thickness of, for example, 300 nm as the gate insulating film 3, an a-Si film having a thickness of, for example, 15 nm as the operating semiconductor film, and a channel are formed. A SiN film having a thickness of, for example, 120 nm is continuously formed as the protective film 5.

After a resist is applied to the entire surface, ultraviolet rays are irradiated from the back surface of the glass substrate 1 to form a resist mask 6 while leaving the resist only on the gate electrode 22a. Referring to FIGS. 3 (k) and 3 (l), the channel protective film 5 is etched using the resist mask 6 as a mask, and then the resist mask 6 is removed. Next, an n ⁺ -type a-Si film having a thickness of, for example, 50 nm and a Ti film having a thickness of, for example, 100 nm serving as source / drain electrodes are formed as the contact layer 7 on the entire surface.

3 (m), 3 (n) A resist mask (not shown) for forming a source / drain
Is formed, and the resist mask is used as a mask to form Ti
The film, the n ⁺ type a-Si film 7 and the a-Si film 4 are dry-etched to perform element isolation, thereby forming a source electrode 8 and a drain electrode 9.

4 (o), (p), and (q). A Mo film for forming a drain bus line is formed on the entire surface by sputtering, and is etched using a resist mask to form a drain bus connected to the drain electrode 9. Form line 10. Subsequently, an ITO film as a pixel electrode material is formed, and is etched using a resist mask to form a pixel electrode 11 connected to the source electrode 8.

The pixel electrode 11 is connected to the adjacent gate bus line 22b.
The transparent conductive film adding portion 21 is connected to the transparent conductive film adding portion 21 and faces the transparent conductive film adding portion 21 with the Al ₂ O ₃ film 22c and the gate insulating film 3 interposed therebetween to form an auxiliary capacitor. The pixel electrode 11 may extend over the adjacent gate bus line 22b.

Thus, the TFT matrix is completed.
In anodic oxidation, the glass substrate 1
The upper Al film may not be sufficiently oxidized. In such a case, after anodic oxidation, thermal oxidation is performed in an oxygen atmosphere.
Oxidation can penetrate into the Al film to increase the transparency. Also, plasma oxidation can be used instead of thermal oxidation.

When the gate insulating film 3 is formed, since the surface is flat, no coverage failure occurs.

[0034]

As described above, according to the present invention,
Since the transparent conductive film 21 connected to the gate bus line 22b serves as an auxiliary capacitance electrode, the aperture ratio does not decrease even when the area of the section of the transparent conductive film 21 is increased to increase the auxiliary capacitance.

Further, since the gate electrode 22a and the gate bus line 22b are formed by using the anodic oxidation method,
22a and the gate bus line 22b have a buried structure,
The surface becomes flat. Therefore, the gate insulating film 3
When forming a pattern, no coverage failure occurs.

Further, by performing thermal oxidation or plasma oxidation in addition to anodic oxidation, the transparency of the transparent insulating film can be increased, and the dielectric strength can be increased. Since the Al ₂ O ₃ film 22 of the anodic oxide film has a dielectric constant higher than that of SiN, there is an advantage that the auxiliary capacitance can be increased.

[Brief description of the drawings]

FIGS. 1A to 1C are a plan view and a sectional view showing a TFT matrix of the present invention.

2 (a) to 2 (h) are a plan view and a sectional view (part 1) showing a working example in the order of steps.

FIGS. 3 (i) to 3 (n) are a plan view and a cross-sectional view (part 2) showing an embodiment in the order of steps.

FIGS. 4 (o) to (q) are a plan view and a sectional view (part 3) showing a working example in the order of steps.

FIGS. 5A to 5C are a plan view and a sectional view showing a conventional TFT matrix.

[Explanation of symbols]

1 is a transparent insulating substrate, 2a is a gate electrode, 2b is a gate bus line, 3 is a gate insulating film, 3 is an SiN film, 4 is an operating semiconductor film, and a-Si film is 5 a channel protective film. The SiN film 6 is a resist mask 7 is a contact layer and the n ⁺ -type a-Si layer 8 is a source electrode 9 is a drain electrode 10 is a drain bus line 11 is a pixel electrode 21 is a transparent conductive film added portion and a transparent conductive film is formed. The storage capacitor electrode 22 is an Al film 22a, a gate electrode 22b, a gate bus line 22c is a transparent insulating film, an Al ₂ O ₃ film 23 is a Cr film 23a is a metal mask, and a Cr mask is a partition.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/1368 G02F 1/1343

Claims (2)

(57) [Claims] A thin film transistor arranged in a matrix and a gate electrode of the thin film transistor
, A drain bus line (10) connected to the drain electrode (9), a pixel electrode (11) connected to the source electrode (8), and a gate bus line (22b). Connected to the transparent conductive film addition portion (2) facing the pixel electrode (11) via the insulating film (3).
1) the method of manufacturing a thin film transistor matrix comprising:
Forming a first metal film (22) over the entire surface; forming a gate bus line forming metal mask (23a) on the first metal film (22); A gate bus line for selectively oxidizing the first metal film (22) using the metal mask (23a) as a mask and connecting to the section (21) of the transparent conductive film under the metal mask (23a). Forming a (22b). 2. The method according to claim 1, wherein the oxidation of the first metal film is performed by anodic oxidation.