JP3057134B2 - Display panel inspection method and inspection apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection apparatus for a flat display panel (hereinafter, referred to as a display panel) provided with a flat display panel of liquid crystal, EL, plasma or the like and a driving circuit for the flat display panel.

[0002]

2. Description of the Related Art As shown in FIG.
One circuit board unit 51a, 51b, one drive signal group for each type of production, and also for one type of model, in accordance with each test condition, drive signal having different type, phase, etc. for each standard TV signal. 51c, 51d, and 51e are prepared, a large number of board units are prepared and stored, and are exchanged manually by an operator at appropriate times. Inspection equipment supports production of many models.

[0003]

The conventional inspection apparatus has the following problems. 1. Since a certain amount of time is required for the work of switching the inspection device according to each model of the display panel to be inspected, this results in a work loss time, and the labor cost increases the cost.

[0004] 2. At the time of the above-mentioned inspection device switching work, the operator must select one suitable for the model to be produced from a large number of circuit board units, and must surely replace it. The possibility of work mistakes increases.

[0005] 3. Each model, each inspection condition or each standard TV
Since one circuit board unit must be prepared for each signal, the number of circuit board units to be prepared increases as the number of models, the number of conditions, or the number of inspection devices that work in parallel increases. Work load such as manufacturing and maintenance management becomes large.

[0006] 4. When responding to new models or new conditions,
Each time, a new circuit board must be designed, studied, and manufactured. In order to cope with differences in inspection items for each model and addition or deletion of new inspection items (inspection conditions), all applicable circuit board units must be modified.

[0007] 6. Since there is basically one type of drive signal generated from the circuit board unit, various conditions, such as when a standard condition drive signal is input, when a worst condition drive signal is input, and when an NTSC standard TV signal is input, when testing the same display panel to be inspected. Comparison test cannot be performed when a PAL standard TV signal is input.

[0008] 7. Since it takes a certain amount of time to replace the circuit board unit, it is not possible to continuously inspect many models on the same production line.

The above problem becomes more serious as the number of production models increases. An object of the present invention is to solve these problems.

[0010]

In order to achieve the above object, in the inspection apparatus of the present invention, various inspection signals of a display panel are stored and prepared in a memory element, and a memory element corresponding to the display panel to be inspected is prepared. Are read out in a predetermined order, rewritten into a programmable gate array, and an inspection is performed by the output of the programmable gate array. As will be described in more detail below, in order to generate a drive signal corresponding to each type of display panel or for each inspection condition and each standard TV signal in which the display panel will be used even for the same type of display panel, Electronic circuits having different circuit configurations, connections, members, etc., are respectively created as programming data, and are created, for example, in an EP.
-Record and save in each memory IC such as ROM. Then, these pieces of programming data are mounted in parallel inside the inspection apparatus. One of the above-mentioned programming data is electrically selected based on the following (1) to (3), and the programming data is reset together with a reset (reprogramming command) signal by a programmable gate array (hereinafter referred to as P).
GA). The PGA instantly rewrites the PGA internal structure to contents based on the programming data by using the programming data read from each memory IC or the like.

(1) Operation for switching production models performed by an operator (2) Command data output by an imaging / image determination device for determining the model from the outer shape of the display panel to be inspected (3) Inspection for each model There is inspection sequence data that records the number of items, the order of items, inspection conditions, and the like.
It is called every time the inspection of the display panel to be inspected is performed. The inspection data included in the inspection panel and the command data for timely selection of the standard TV signal to be used are rewritten in a very short time. It can be done again and again in succession. As a result, when the inspection apparatus is viewed from the outside, the same effect can be obtained as if another inspection apparatus (circuit board unit) was instantaneously reconnected based on the above commands.

[0012]

[Operation] For each display panel model, each inspection condition such as a best driving condition, a standard driving condition, and a worst driving condition, each inspection item,
Most of the drive signals of each standard TV signal (NTSC, PAL, SECAM, etc.) are digital signals related to the synchronization of display images, and the total number and systematic types such as horizontal and vertical directions are different from those in actual use. It can be limited to some extent by common sense. The digital signal which occupies most of the drive signal is generated by a general logic gate (NAND, O
R etc.) and can be actually manufactured and operated using only the logic gate IC. Therefore, based on the circuit diagram of each drive signal generation circuit configured using these basic logic gates, PG
A: Using commercially available computer software that converts information into programming data, each model, each inspection condition, each T
Create data compatible with the V method. Each completed programming data is written into a storage element such as a small EP-ROM, and all EP-ROMs / ICs are electrically connected in parallel to a common circuit board unit, and are mounted inside the inspection apparatus.

The common circuit board unit is provided with a PGA, and a common circuit board unit is designed and manufactured so as to have maximum flexibility so that it can be commonly used in all models and under all conditions. The EP-ROM / IC recording each programming data electrically selects one data (IC) according to command data generated inside the apparatus during operation or inspection work by an operator from outside the apparatus. The data transfer lines are connected. Then, P
A reset signal for giving an instruction to discard the programming data currently incorporated in the GA and to read data for reprogramming from the selected data IC is generated. After the command is determined, a reprogramming operation is performed. These series of operations are completed instantly.

The image pickup / image determination device may be a general device used in a production process or the like. The device stores characteristics due to differences in external shape of each model, and compares the stored data with actual images. The apparatus determines the model of the display panel to be inspected and switches the model on behalf of the operator. The inspection sequence data is data that records the inspection items to be executed for each model and the order of the inspection items. The inspection sequence data is mounted inside the inspection apparatus as a set together with the programming data for each model, and is sequentially called and used during the inspection work. Therefore, if the inspection items of the display panel to be inspected include items such as driving signal condition switching or driving standard TV signal switching, inspection sequence data that issues a command to perform programming data switching when those items are selected is created. . As a result, the apparatus performs a driving signal condition switching operation or a driving standard TV signal switching operation on behalf of the worker. By combining these actions and continuously working at the same time during the inspection work, the action as described in the preceding section occurs.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to a circuit diagram. FIG. 1 is a block diagram of a circuit portion of the present invention. An operator's operation, a signal from the imaging / image determination device is received at the input terminal 1, the input signal and a feedback signal from the sequence data 5 are determined by the command unit 3, and appropriate programming data 4 and sequence data 5 are selected. To generate a selection signal. The output of the programming data 4 and the sequence data 5 for each model selected by the command from the command circuit unit 3 is transferred to the PGA 6. PGA 6 is the selected programming data 4
After the completion of the program by the sequence data 5, a test drive signal based on the programming data is sequentially generated and output. The inspection display panel is sequentially inspected based on the programming data. The inspection results are displayed on the display panel to be inspected, and the data is compiled in the central computer.

The above-mentioned programming data is displayed for each model of each display panel, each test condition such as a best drive condition, a standard drive condition, and a worst drive condition, each test item, and each standard TV signal (NTSC, PAL, SECAM, etc.). Most of the drive signals are digital signals related to the synchronization of display images, and the total number and systematic types such as horizontal and vertical directions can be limited to some extent within a common sense range in practical use. Most of digital signals can be generated by a general logic gate (NAND, OR, etc.) in a circuit diagram, and can be actually produced and operated using only a logic gate IC. Therefore, based on the circuit diagram of each drive signal generation circuit configured using these basic logic gates, commercially available computer software for converting information from circuit diagram data to PGA programming data is used, and each model and each test are used. A condition and data corresponding to each TV system are created. Similarly, each control signal generation circuit is configured using the basic logic gate for the sequence data,
Sequence data is created from this circuit diagram. The programming data and sequence data completed in this manner are written in a storage element such as a small EP-ROM, and all EP-ROMs / ICs are electrically connected in parallel to a common circuit board unit. Will be installed. The auxiliary circuit 7 generates and outputs a drive signal that cannot be covered by the output of the PGA 6 in place of the PGA 6 according to a command from the PGA 6. Since the auxiliary circuit 7 is a digital IC in which the power supply of the PGA 6 is a single power supply of +5 V, its output level is limited to the range of 0 to 5 V. However, there is a possibility that a signal having a voltage range other than this is included in the inspection drive signal. It has a function to supplement that part. Sequence control unit 8
Receives the data sequentially transferred according to the inspection procedure from the sequence data 5 during the inspection operation,
N / OFF is sequentially controlled.

FIGS. 2 and 3 show the command circuit 3, the programming data 4, and the PGA among the device circuit elements shown in FIG.
6 is a detailed circuit diagram of the auxiliary circuit unit 7, based on which the operation of each element and the like will be described in further detail. FIG. 2, FIG.
1 shows the configuration of one circuit in these two figures, and the two circuits are electrically connected by the connector 10. In FIG. 2, a memory 11a represented by ROM0 to ROM9
Reference numerals 11j to 11j denote memory ICs for storing programming data 4, and the other circuit elements correspond to the command circuit unit 3 in FIG. Although the sequence data 5 is not shown, a memory IC for storing the programming data 4 shown in FIG.
And a circuit substantially similar to the above.

The program command in this circuit is limited and simplified based on the setting by the dip switch 12 at the time of initial power-on and the sequential switching by the operation of the push switch 13 by the operator after the power is turned on. A command unit based on data output by the imaging / image determination device that determines the model based on the outer shape of the display panel is omitted.
Before turning on the initial power, the four DIP switches 12 are set in advance, and the ten ROM memories 11a to 1
1j. The four DIP switches 12 represent a 4-digit binary number according to the setting of each switch, with switch ON representing 0 and switch OFF representing 1. The binary values correspond to the specified ROM memories 11a to 11j as shown in Table 1.

[0019]

[Table 1]

After this setting, when the initial power is turned on, the setting data is taken into the counter IC (in this embodiment, a 74HC192 made by Toshiba) is used, and the output of the counter 14 is determined. Memory 11a-1 of ROM0-9 for storing 10 pieces of programming data
One memory 11 out of 1j enters an operation active state. The decoder IC (using "74HC42" in this embodiment) 15 has a function of converting a binary value, which is output data of the counter 14, into an operation for activating one of a number of output terminals. In the circuit according to the present invention, this action is used as a data selection signal.

The shift register IC (in this embodiment, "74
HC164) is used. The circuit near 16 is an oscillation circuit part 17 that generates a pulse of a fixed cycle at the same time as initial power-on.
And generates signals 18 and 19 having two different timings based on the pulse. These two signals 18 and 19 have timings as shown in FIG. Signal 18 instructs counter IC 14 to capture the setting of DIP switch 12. Signal 19 is for connector 10
Via the PGA (“XC3042PC8
4 ") is used as the reset signal for 6. That is,
After turning on the initial power, the programming data must be selected and confirmed first, and then the reset signal 19 is sent to the PGA 6.
To perform the programming operation. After the completion of the first programming, a signal is generated from the PGA 6 via the B12 terminal of the connector 10 to deactivate all ROM / ICs regardless of the output of the shift register 16. Thereafter, the circuit continues to operate based on the read programming data.

Next, the operation when the operator operates the push switch 13 from this state will be described. When the push switch 13 is pressed, the counter IC 1
4 is supplied with an up-count pulse. Counter IC
Numeral 14 adds 1 to the currently held data value and outputs it as new data. Here, if the held data is 10
01 (data ROM 9 is selected), the new data is 0000 because the counter IC 14 is a decimal counter.
Go back. If the dip switch 20 for setting the counter reset is set, the timing for resetting the counter IC 14, that is, setting the new data to 0000 is determined. The setting method is, for example, to return to data ROM0 after data ROM5, 0101 (data R
011 which is a value obtained by adding 1 to OM5)
Only the switch numbered 0, that is, the number "6" in decimal, needs to be turned on. When the push switch 13 is pressed for a certain period of time (however, a very short period of time from the human sense, for example, about 6 μsec), a voltage caused by the push switch 13 being continuously pressed via the A13 terminal of the connector 10 is generated. Is detected by the PGA 6, and the signal of the B12 terminal of the connector 10 is
M0-9 are changed to the active state, and the reprogramming operation is performed. That is, the new programming data is selected and confirmed at the same time as the operation of the push switch 13, and the PGA 6
Reprogramming operation starts. PGA
The re-programming command input terminal “D / P” 6 has an open drain structure, so that the PNP transistor 21 is required.

7-segment LED driver IC ("5022B" is used in this embodiment) 22 and 7-segment LE
D23 allows the number of the currently held data to be visually recognized.

The circuit shown above the PGA 6 in FIG.
This is an original clock oscillation circuit 25 that determines the operation timing of the entire circuit. The operation principle uses a phase-locked loop system, and in order to cope with various types and conditions, varicaps 35a to 35b and variable capacitance coils 36a to 36d are used. Four circuits 25a to 25d having the same structure and capable of changing only the oscillation frequency are mounted in parallel.
At the time of actual operation, one of the circuits is selected and used based on the programming data, and the input / output terminals of the other three circuits are pulled up inside the PGA 6 to stop the circuit.

The circuit shown below the PGA 6 is a portion that generates analog signal processing and a drive signal with a large voltage range (handles a negative power supply) that cannot be realized or output by the PGA 6 which is a digital IC. 1
Of the auxiliary circuit 7. The function will be described more specifically. The RC low-pass filter circuit 26 has an action of adjusting the internal signal phase of the PGA 6 by changing the resistance value of the variable resistor from outside. The circuit 27 composed of an RC low-pass filter and a transistor buffer has a 2
There is an operation of extracting only a low frequency signal from a composite signal in which signals of different types are synthesized. Circuit 2 above
Both 6 and 27 perform analog signal processing. The three analog switch ICs 28a to 28c generate a negative voltage bias signal for each model, and in this circuit, 0V, -5V,
It can take three values of -6V. The operational amplifier ICs ("4560" is used in this embodiment) 29, 30, and 31 are portions that generate a drive signal using a negative power supply. The operational amplifier IC 29 constitutes an inverting amplifier circuit that can switch the gain by switching (the resistance value of) a variable resistor connected between its input / output terminals. In this circuit, 4Vp-p, 5Vp-p, and 6Vp- There are three possible values of p. The operational amplifier ICs 30 and 31 are voltage follower buffers. Here, an output of only the amplitude from the operational amplifier IC 30, an output capable of changing the bias voltage from outside the circuit, and a bias voltage from the operational amplifier IC 31 −
An output signal fixed at 1.5 V is generated. The decoder IC ("74HC139" is used in this embodiment) 32 and its peripheral gate IC select the bias value of the negative voltage bias signal from the 2-bit model data output from the PGA 6 based on the programming data. Switch IC28 for switching by switching and analog switch I for selecting and switching the amplitude value of the negative power supply drive signal
It has the effect of controlling C33. The output signals of the PGA 6 and the auxiliary circuits are output from the connector 34.

The embodiment has been described above.
By increasing the number of data connections, providing external command inputs, and increasing the number of auxiliary circuits and output terminals based on the circuit shown in FIG. 3, it is possible to easily cope with more models than the current model.
The present invention is not limited to the above-described embodiment, and may be modified without departing from the scope of the invention.

[0027]

According to the present invention, the following effects can be expected.

1. Switching of inspection equipment according to each model of the display panel to be inspected can all be performed instantaneously electrically.
The working time will be zero.

2. Since the programming data of all the models of the display panel to be inspected can be all mounted on one device, the load of the switching operation according to each model is greatly reduced, and the possibility of an operation error is also reduced.

3. Programming data can be easily duplicated.

4. By providing the inspection apparatus with flexibility, it is only necessary to create and add data when a new model and new conditions are satisfied.

5. The addition / deletion of new inspection items and the change of inspection conditions need only be performed by changing data.

6. Since the programming data can be switched instantaneously during the same display panel inspection,
Comparison inspection can be performed under various drive signal conditions.

7. Similarly, multiple models can be inspected continuously on the same production line in combination with an imaging / image determination device that determines the model of the display panel to be inspected.

[Brief description of the drawings]

FIG. 1 is a block diagram of an inspection apparatus according to the present invention.

FIG. 2 is a circuit diagram illustrating an embodiment of the present invention.

FIG. 3 is a circuit diagram illustrating an embodiment of the present invention.

FIG. 4 is a waveform timing chart for explaining the operation of one embodiment of the present invention.

FIG. 5 is a block diagram of an inspection apparatus according to a conventional technique.

[Explanation of symbols]

3 Programming data switching command signal generation unit 4 Programming data (ROM) group 5 Sequence data (ROM) group 6 Programmable gate array IC 7 PGA auxiliary circuit unit 8 Inspection work sequence control unit 9 Display panel to be inspected 10 Jumper connector in circuit 11 ROM 12 Initial setting DIP switch 13 Reprogramming operation push switch 14 Counter IC 15 Decoder IC 16 Shift register IC 17 Oscillator circuit part 18 Shift register output signal waveform (counter reset) 19 Shift register output signal waveform (PGA reset) 20 Counter reset setting dip Switch 21 PNP transistor 22 7-segment LED driver IC 23 7-segment LED 25 Original clock oscillation circuit 26 RC low-pass fill 27 RC lowpass filter, a transistor buffer 28 the negative voltage bias signal switching analog switches I
C 29 Operational amplifier IC 30 Operational amplifier IC (voltage follower) 31 Operational amplifier IC (voltage follower) 32 Decoder IC 33 Negative power supply driving signal switching analog switch IC 34 Output connector 35 Varcap 36 Variable capacitance coil

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields investigated (Int. Cl. ⁷ , DB name) G01M 11/00-11/02 G09F 9/00 Practical file (PATOLIS) Patent file (PATOLIS)

Claims (5)

(57) [Claims] An inspection signal of a display panel is stored in each memory, the memory is read out in a predetermined order corresponding to a display panel to be inspected, rewritten to a programmable gate array, and inspected by an output of the programmable gate array. Inspection method for a display panel. 2. The method according to claim 1, wherein the rewriting of the programmable gate array is automatically performed based on a judgment result of an image pickup apparatus for judging a model from an outer shape of a display panel to be inspected, and a plurality of models are continuously inspected on the same production line. 2. The method for inspecting a display panel according to claim 1, wherein: 3. The various inspection signals include a plurality of condition data such as a standard condition driving signal data and a worst condition driving signal data. 2. The method for inspecting a display panel according to claim 1, wherein said inspection is enabled. 4. The various test signals include data for each standard TV signal (NTSC, PAL, SECAM, etc.), and the data can be sequentially switched at the time of one display panel test to enable testing with each standard TV signal. The method for inspecting a display panel according to claim 1, wherein: 5. A plurality of memories for respectively storing various inspection signals of a display panel, means for controlling reading of said memory corresponding to a display panel to be inspected and rewriting the output thereof to a programmable gate array, Means for supplying an output of the programmable gate array to the display panel to be inspected and performing an inspection.