JP3051746B2 - AC type plasma display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] An AC-type plasma display panel has the object of reducing the current flowing through the discharge cells of the plasma display panel and minimizing the reduction of the margin due to the current as described above. In a plasma display panel, an X electrode and a Y electrode covered with a body layer are arranged to face each other in a grid pattern, and each discharge cell defined at an intersection of the X electrode and the Y electrode is selectively discharged. , The X electrode and the Y electrode have different electrode widths, and are configured to apply a write pulse to the electrode having the wider electrode width.

[Industrial applications]

The present invention relates to an AC type plasma display panel.

2. Description of the Related Art Plasma display panels (PDPs) have attracted attention as display devices that can replace CRT displays because they can realize large display screens with a small depth. Therefore, while the display dot density is higher,
There is a demand for high reliability, long life and low cost.

In particular, lighten the burden on LSIs or ICs that drive PDPs,
In order to reduce the cost of the driving circuit and reduce the power consumption, it is desired to reduce the current flowing through the PDP.

[Conventional technology]

A general AC type PDP has a structure in which an X electrode and a Y electrode are formed in a predetermined pattern on each surface of a pair of transparent glass substrates, and a dielectric material is formed on the surface on which the X electrode and the Y electrode are formed. After the layers are applied, these glass substrates are arranged such that the X electrodes and the Y electrodes face each other in a grid pattern and have a slight gap, and the periphery thereof is sealed to form a rare gas such as neon inside. (For example, Japanese Patent Publication 58-
No. 11064).

As a driving method of a PDP having such a structure, it is usual to apply an AC sustaining voltage between both electrodes, and to apply a write pulse or a selection pulse to a discharge cell at an electrode intersection at which light emission is desired. . Once the discharge cell emits light,
Light is emitted periodically until the wall charge is extinguished by the erasing pulse, and a pulse-like current flows each time light is emitted.

By the way, the magnitude of the current flowing at the time of light emission of each discharge cell increases according to the facing area between the X electrode and the Y electrode in the discharge cell, that is, the value of the product of the line width of the X electrode and the line width of the Y electrode. It is known.

Conventionally, the X electrode and the Y electrode are constituted by electrodes having the same line width, and in order to reduce the current flowing through each discharge cell, the line width of both the X electrode and the Y electrode must be the same. It is conceivable that the line width is reduced by reducing the dimension by only the dimension of (1).

[Problems to be solved by the invention]

However, when the line widths of the X electrode and the Y electrode are both reduced, there is a problem that the margin of the sustain voltage is correspondingly reduced.

If the margin is small, the voltage accuracy and the like of the drive circuit need to be increased, so that the cost becomes high. In addition, discharge failure or abnormal discharge of the discharge cells is liable to occur, and the reliability decreases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to reduce a current flowing in a discharge cell of a plasma display panel and to suppress a reduction in a margin caused by the current as much as possible.

[Means for solving the problem]

In the plasma display panel according to the first aspect of the present invention, an X electrode and a Y electrode, each covered with a dielectric layer and for periodically generating a discharge by applying a sustaining voltage, are arranged in a grid-like manner, and the X electrode and the Y electrode are arranged. An AC plasma display panel configured to selectively discharge each discharge cell defined at an intersection with an electrode, wherein the X electrode and the Y electrode have different electrode widths and have a wide electrode width. An address pulse for forming a wall charge for discharging each discharge cell by applying a sustain voltage is applied to the electrode on the side.

In the present invention, the characters “X” or “Y” on the X electrode and the Y electrode are for convenience, and may be other characters.

(Operation)

When the write pulse PW is applied to the Y electrodes y1, y2,.
All the discharge cells C formed on the electrode emit light, and wall charges are formed on the dielectric layer on the electrode.

The wall charges formed in each discharge cell C are erased by the erase pulse PE continuously applied to the same Y electrode. However, for the discharge cell C to which the selection pulse PC is applied through the opposite X electrode, the wall charge is removed. The wall charge is not erased, and thus the discharge state is maintained by the subsequently applied sustain pulse.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

 FIG. 1 is a sectional view of an AC-type PDP 1 according to the present invention.

PDP1 has a glass substrate 11 on the display side and a glass substrate on the back side.
12, X electrode 13 and Y electrode 14 formed on the surface of each glass substrate 11, 12, dielectric layers 15 and 16, sealing glass 17 for sealing around, spacer 18 made of an insulator, and discharge space It is composed of gas 19 such as neon enclosed.

The X electrode 13 on the display side is a metal electrode composed of a three-layered thin film of Cr-Cu-Cr, and is formed by a vapor deposition method or sputtering. The X electrode 13 is made of a thin film because the line width is narrowed (100 μm or less) so that a sufficient amount of light can leak to the display side during discharge light emission. It can be used as a thick film electrode.

The Y electrode 14 on the back side is a silver electrode made of the same thin film or thick film as the X electrode. Since the Y electrode 14 does not need to leak discharge light to the outside as described above, a thick film is more advantageous in terms of manufacturing cost.

FIG. 2 is a diagram showing the arrangement of the X electrodes 13 and the Y electrodes 14.

The X electrode 13 includes electrodes x1, x2,... Arranged in the vertical direction and arranged in the horizontal direction (X direction).
Each of the electrodes 14 is composed of electrodes y1, y2,... Arranged in the horizontal direction and arranged in the vertical direction (Y direction). Discharge cells C are respectively defined at intersections of these electrodes.

The line width Bx of each of the electrodes x1, x2... Is about 50 μm, and the line width By of each of the electrodes y1, y2. That is, the electrodes y1 and y of the Y electrode 14
2 are larger than the line width Bx of the electrodes x1, x2,.

A scan signal SS for sequentially selecting the electrodes y1, y2,... Is connected to the Y electrode 14, and the electrodes x1, x2,.
Is connected to a data signal SD for selecting a discharge cell C to emit light, thereby driving the PDP1.

FIG. 3 is a timing chart showing an example of the scan signal SS and the data signal SD.

The scan signal SS is a voltage of about 90 volts (sustain voltage)
Sustain pulse that has Vs and appears with a period of about 35 to 40 μs
PS has a voltage (write voltage) Vw of about 160 volts,
Every one scan (Every time all Y electrodes 14 are scanned once)
, And an erase pulse PE having the same voltage as the sustain voltage Vs and appearing immediately after the write pulse PW.

The data signal SD has the same timing as the above-described sustain pulse PS appearing during the sustain pulse PS of the scan signal SS and the same timing as the above-described erase pulse PC for the discharge cells C to emit (write). Is composed of the erase cancel pulse PC appearing at

As is well known, the erase pulse PE has a pulse width of 0.7 to 1 μm.
s, and the pulse width and voltage value of the erase cancel pulse PC need to be set so as to cancel the erase pulse PE and maintain the write discharge by the sustain pulse PS. For example, as shown in FIG. 3, It is the same as the erase pulse PE. Also, the erase pulse PE and the erase cancel pulse
The PC appears at a timing that does not overlap with the sustain pulse PS and the write pulse PW.

.. Of the scan signal SS are applied to the respective electrodes y1, y2... Shown in FIG. 2, and the respective signals X1, X2... Of the data signal SD are applied to the respective electrodes x1, x2. , Respectively.

The above-described scan signal SS and data signal SD are signals for causing the discharge cell C1 defined by the intersection of the electrode x1 and the electrode y1 to emit light.

Next, the operation of the PDP 1 configured as described above will be described.

FIG. 4 shows a signal obtained by combining the signal Y1 and the signal X1 of FIG. 3, that is, the signal SC1 applied to the discharge cell C1 determined at the intersection of the electrode y1 and the electrode x1 to be displayed, and the signal SC1. FIG. 3 is a diagram illustrating a light emitting current CC1 flowing through a discharge cell C1.

In FIG. 4, the discharge cell C1 does not emit light only by the sustain pulse PS, but emits light at the rise thereof when the write pulse PW is applied, and a wall charge is formed on the surface of the dielectric layer on the electrode. .

Since the erase pulse PE of the scan signal SS is canceled by the erase cancel pulse PC of the data signal SD in the signal SC1, the erase pulse PE does not appear.

Therefore, after a positive wall charge is formed on the selected discharge cell by the write pulse PW, when the negative and positive sustain pulses PS are alternately applied, the discharge light for maintaining the write discharge at each rising edge is generated. Occurs, and the light emission current CC1 flows, and the light emission state (discharge state) is maintained.

This emission current CC1 is determined by the area AP facing the electrode x1 and the electrode y1.
It is almost proportional to The line width Bx, By of each electrode x1, y1 is 50μm or
Since it is 70 μm, the facing area AP is 50 μm × 70 μm = 3.5 × 10 ⁻³ mm ² .

FIG. 6 shows a panel in which the gas pressure and the discharge gap are constant, the arrangement pitch of both the X electrode 13 and the Y electrode 14 is 0.3 mm, the facing area AP is almost the same, and the line width B
FIG. 9 is a diagram showing a state of a change in a margin Ma in an experimental example using electrodes composed of several types of Cr—Cu—Cr films having different x and By. The abscissa in the figure is the pulse width of the erase pulse PE, and the ordinate is the margin Ma of the sustain voltage Vs.

According to FIG. 6, the margin characteristic is that the write pulse PW
It can be understood that it largely depends on the line width By of the Y electrode 14, which is the electrode to which the voltage is applied. The present invention has been made based on this finding.

That is, in the PDP 1 of the present embodiment, the pulse width of the erase pulse PE is 1 μs, so that the margin Ma1 at that time is about 6 μs.
Bolt (curve L1).

When the line width Bx, By of the X electrode 13 and the Y electrode 14 is exchanged,
That is, when the line width Bx is 70 μm and the line width By is 50 μm, the margin Ma2 is about 4 volts. (Curve L
2).

When the line width Bx and the line width By are the same, that is, when the line widths Bx and By are both 60 μm, the margin Ma3
Is about 5 volts (curve L3).

That is, as in the present embodiment, the line width By of the electrode y1 on the side to which the write pulse PW is applied is changed to the erase cancel pulse.
Since the line width Bx of the electrode x1 on the side to which PC is applied is larger than the line width Bx, By and the line width Bx, By are the same, the margin Ma is higher than that when the line width Bx, By is the same. .

Therefore, according to the present embodiment, the voltage accuracy of the drive circuit can be reduced, the cost required for the drive circuit can be reduced, and the occurrence of light emission failure and abnormal light emission is suppressed, thereby improving reliability.

Incidentally, when the line widths Bx and By are both 70 μm, the margin Ma4 is about 7 volts (curve L4), which is larger than any of the above-mentioned margins Ma. However, the line width Bx, B
The reduction rate of the margin Ma compared with the case where both y are 70 μm is the smallest in the case of the present embodiment.

Therefore, if the line width Bx and By were both 70 μm, the PDP
For this, only the line width Bx is reduced as in the present embodiment and 50
In the case of μm, the facing area AP is small, so that the current flowing through each discharge cell C can be reduced, and the overall power consumption of the PDP 1 can be reduced.

The load on the circuit elements such as the LSI or IC that drives the PDP1 is reduced, and low-power circuit elements can be used.
Cost can be reduced.

The reduction of the margin Ma is suppressed to a minimum, and it is not necessary to use a power supply with particularly good voltage accuracy, and the reliability is not impaired.

There is an advantage.

Further, since the X electrode 13 is formed of a thin film, it is easy to reduce the line width Bx, and it is considered that the manufacturing cost does not increase.

FIG. 5 shows a signal obtained by combining the signal Y1 and the signal X2 of FIG. 3, that is, the signal SC2 applied to the discharge cell C2 determined at the intersection of the electrode y1 and the electrode x2 not to be displayed, and the signal SC2.
Indicates a light emission current CC2 flowing through the discharge cell C2.

In FIG. 5, when the write pulse PW is applied in the same manner as in the above-described selected discharge cell C1, the non-selected discharge cells C2
Also at the rise, discharge light is generated, and wall charges are formed.

However, since the data signal SD does not include the erase cancel pulse PC in the signal SC2, the erase pulse PE of the scan signal SS is not used.
Is not canceled out, and the erase pulse PE appears.

Therefore, the wall charges formed by the write pulse PW are maintained (but of the opposite polarity of the negative polarity) by the next sustain pulse PS, but are neutralized and extinguished by the subsequent erase pulse PE. Thereafter, the cell C2 does not emit light until the write pulse PW appears again.

In this case, when the write pulse PW appears and immediately after the negative sustain pulse PS appears, the discharge cell C2 emits light. However, this light emission occurs only during one scan. Since it is a short time from the entry to the erasure, the light emitting display state is not practically achieved.

In addition, the erase cancel pulse PC is practically at the same timing so as to include the erase pulse PE and has a wider pulse width than the erase pulse PE, so that the signal SC1 has a minute negative pulse based on the pulse width difference. However, this does not eliminate the wall charges and does not affect the continuation of the discharge.

That is, the scan signal SS and the data signal shown in FIG.
In the driving method using SD, simultaneous writing (light emission) is performed by a write pulse PW for every discharge cell C on each scan-side electrode, and immediately thereafter, selective erasing (light emission state) is performed by an erase pulse PE. Stop).
That is, only for the discharge cells C that are not erased, that is, for the discharge cells C that the user wants to write (light emission) in the original meaning, the erase pulse PE is made to appear in the data signal SD to cancel the erase pulse PE, and the write discharge is stopped. It maintains (maintains the light emitting state).

Therefore, the erase cancel pulse PC is a selection pulse for selecting a discharge cell C to emit light.

Since the Y electrode 14 is connected so that the scan signal SS is applied, the write pulse PW is applied between the adjacent electrodes y1 and y2 and between the electrodes y2 and y3.
And a voltage corresponding to the erase pulse PE is sequentially applied. That is, an AC voltage is applied between the adjacent electrodes, and thus, when the Y electrode 14 is a silver electrode, there is an effect that a migration phenomenon occurring between the Y electrodes can be prevented.

In the above embodiment, the scan signal shown in FIG.
Although the case where the PDP 1 is driven by the SS and the data signal SD has been described, the PDP 1 may be driven by other scan signals and data signals. For example, when the write pulse PW appears immediately before the sustain pulse PS, the write pulse PW
Are superimposed on the sustain pulse PS, and others.

In the above-described embodiment, a metal other than those described above, such as a transparent electrode made of ITO or tin oxide, may be used as the X electrode 13 of the PDP 1. The structure other than the electrodes can be various structures other than those described above.

〔The invention's effect〕

According to the present invention, it is possible to reduce the current flowing through the discharge cells of the plasma display panel, and it is possible to suppress the reduction of the margin as much as possible.

Therefore, a low-cost plasma display panel with low power consumption and high reliability can be provided.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a PDP according to the present invention, FIG. 2 is a view showing an arrangement of X electrodes and Y electrodes, FIG. 3 is a timing chart showing examples of scan signals and data signals, and FIG. FIG. 5 is a diagram showing a signal applied to the cell C1 and a light emitting current flowing through the selected discharge cell C1, FIG. 5 is a diagram showing a signal applied to the non-selected discharge cell C2 and a light emitting current flowing through the non-selected discharge cell C2, The figure shows how the margin changes with electrodes having different line widths. In the figure, 1 is a PDP (plasma display panel), 13 is an X electrode, 14 is a Y electrode, x1, x2 ... are electrodes, y1, y2 ... are electrodes, Bx, By are line widths, C is a discharge cell, and PW is The write pulse and PC are the erase cancel pulse (selection pulse).

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor: Shinoda Den 1015, Kamidadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited 56) References JP-A-63-32830 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 11/02

Claims (1)

(57) [Claims] An X electrode and a Y electrode each covered with a dielectric layer for periodically generating a discharge by applying a sustain voltage.
In an AC type plasma display panel configured to dispose electrodes in a grid pattern and selectively discharge each discharge cell defined at the intersection of the X electrode and the Y electrode, the X electrode and the Y electrode are electrodes. An AC-type plasma having a different width, wherein an address pulse is applied to an electrode having a wider electrode width to form a wall charge for discharging each discharge cell by applying a sustaining voltage. Display panel.