JP3018677B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a Schottky field effect transistor (MESF).
ET).

[0002]

2. Description of the Related Art Recently, GaAs has been used as a high-speed high-frequency device.
Attention has been focused on semiconductor devices. It has already been put to practical use as a device for satellite broadcasting or a device for mobile phones.
However, there are many problems in the process, and Si
At present, the yield is lower than that of devices.

FIG. 4 is a plan view of a GaAs power MESFET as a conventional semiconductor device. 5 (a) to 5 (e)
1 shows a conventional method for manufacturing a semiconductor device. FIG. 5 is a cross-sectional view showing the manufacturing process of the AA 'portion shown in FIG. 21 is GaAs
Substrate, 22 an active layer, 23 a first insulating film, 24 an ohmic electrode, 25 a Schottky gate electrode, 26 a second insulating film, 27 a contact opening, 28 a pad lead electrode, 29 a surface protection Membrane, 30 is a pad opening, 3
1 is a scribe line.

An active layer 22 is formed on a GaAs substrate 21,
A first insulating film 23, for example, a silicon oxide film is formed on the entire surface of the GaAs substrate 21 at 5000.degree. Next, after forming an ohmic electrode, Al is formed as a Schottky gate electrode 25 by a 7000 ° lift-off method (b). Next, a second insulating film 26, for example, a plasma silicon nitride film is deposited at 7000.degree.
7 is formed (c). Thereafter, a pad lead-out electrode 28 is formed with a thickness of 1.5 μm by Au plating (d). Finally, for example, a silicon nitride film is deposited on the entire surface as a surface protection film 29 by 8000.degree., And a pad electrode opening 30 and a scribe line 31 are formed.
Is completed (e).

[0005]

In the case of a power FET,
Since a large current flows through the active layer 22, Al-based metals such as Al and Ti / Al are mainly used for the Schottky electrode for reliability. As shown in FIG. 4 and FIG.
In the method of manufacturing the SFET, the Schottky gate electrode 25 has A
Because of the use of l, defects due to an increase in contact resistance often occurred due to deterioration of the contact opening 27 such as oxidation of the Al surface.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a semiconductor device which prevents a device failure due to an increase in contact resistance in a MESFET using a Schottky gate electrode such as Al having a large alteration property.

[0007]

According to the present invention, there is provided a semiconductor device comprising: a plurality of gate electrodes on a semiconductor substrate;
A plurality of gate pad electrodes electrically connected to the gate electrode
After forming the electrodes, an electric current is applied between the plurality of gate pad electrodes.
By applying a current, the gate electrode and the gate
This is to reduce the contact resistance with the pad electrode.

[0008]

According to the present invention, as described above, a plurality of gate pads are provided.
By applying a current between the electrodes, the gate electrode and gate
This is to reduce the contact resistance with the pad electrode.

[0009]

FIG. 1 is a plan view of a GaAs power MESFET as an embodiment of a method of manufacturing a semiconductor device according to the present invention. FIGS. 2A to 2E are cross-sectional structural views taken along the line AA ′ shown in FIG. In the figure, 1 is a GaAs substrate, 2 is an active layer, 3 is a first insulating film, 4 is an ohmic electrode, 5 is a Schottky gate electrode, 6 is a second insulating film, 7 is a contact opening, and 8 is a pad. Extraction electrode, 9 is a surface protective film, 1
0 is a pad opening, and 11 is a scribe line.

An active layer 2 is formed on a GaAs substrate 1, and a first insulating film 3, for example, a silicon oxide film is formed on the entire surface of the GaAs substrate at 5000.degree. Next, after forming an ohmic electrode, Al is used as a Schottky gate electrode 5.
000 ° lift-off method (b). Next, a second insulating film 6 such as a plasma silicon nitride film is
Then, a contact opening 7 is formed (FIG. 3C).
Thereafter, the pad lead-out electrode 8 is set to 1.5 μm by Au plating.
(d). Next, for example, a silicon nitride film is deposited as a surface protection film 9 on the entire surface at 8000.degree. To form pad electrode openings 10 and scribe lines 11 (e). Finally, a current of, for example, 100 mA is applied between the Schottky gate electrodes to complete the GaAs power MESFET.

As shown in the embodiment, in the present invention, a plurality of lead-outs of the Schottky gate electrode to the pad enable a current to be applied between the gate pad electrodes after the pad electrode is formed. It functions to recover the contact abnormality of the pad electrode and keep the resistance value low and stable. If this current is not applied, MESF
In the case of ET, a large current hardly flows through the gate electrode, and the contact resistance does not decrease from the initial value. FIG. 3 shows the state of I
5 shows a change in -V characteristics. In the figure, the dashed line indicates the initial IV
The solid line shows the IV characteristics after current application, and the dotted line shows the IV characteristics in a normal contact state. From the figure, it can be seen that even if the contact state is abnormal in the initial state, the contact state is restored to the state that does not change even when the contact state is normal as compared with the normal state by applying the current. Further, in the present invention, 10
Although a large current of 0 mA is applied, since this current flows between pad electrodes, that is, in the metal, there is no influence on the FET such as the active layer.

In this embodiment, the case where two pad electrodes are led out from the gate electrode has been described. However, the number of the pad electrodes may be two or more. A current may be applied to each pad electrode. In the present embodiment, the present invention is used for the Schottky gate electrode. However, the electrode is not limited to this, and may be a source electrode, a drain electrode, or another electrode.

[0013]

As described above, according to the present invention, a plurality of leads are formed from an electrode to a pad via a contact portion, a plurality of pads are formed from the lead, and a predetermined distance is formed between the plurality of pads. Is applied to prevent the increase in the contact resistance between the Schottky gate electrode and the lead out of the pad, thereby preventing the ME from having a stable low contact resistance.
Enables fabrication of SFET.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor device used in an embodiment of the present invention.

FIG. 2 is a process sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a diagram showing the effect of the present invention.

FIG. 4 is a plan view of a conventional semiconductor device.

FIG. 5 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor substrate 2 active layer 3 first insulating film 4 ohmic electrode 5 Schottky gate electrode 6 second insulating film 7 contact opening 8 pad lead-out electrode 9 surface protection film 10 pad opening 11 scribe line

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/338 H01L 21/3205 H01L 21/768 H01L 29/812

Claims (4)

(57) [Claims] A plurality of gate electrodes on a semiconductor substrate;
A plurality of gate pads electrically connected to the gate electrode;
After the formation of the gate electrode,
By applying a current to the gate electrode and the gate,
A method for manufacturing a semiconductor device, comprising reducing contact resistance with a touch pad electrode . 2. The method according to claim 1, wherein said gate electrode is a Schottky of a Schottky junction field effect transistor. 3. A plurality of source electrodes on a semiconductor substrate,
A plurality of source pads electrically connected to the source electrode
After forming the source electrode and the plurality of source pad electrodes,
By applying a current to the source electrode and the saw
Reduced contact resistance with spud electrode
A method for manufacturing a semiconductor device. 4. A semiconductor device comprising a plurality of drain electrodes on a semiconductor substrate.
And a plurality of drains electrically connected to the drain electrode.
After forming the in-pad electrode, the plurality of drain pads are formed.
By applying a current between the pad electrodes, the drain
Reducing the contact resistance between the electrode and the drain pad electrode.
And a method of manufacturing a semiconductor device.