JP3009980B2 - Variable gain amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable gain amplifier in an integrated circuit.

[0002]

2. Description of the Related Art FIG. 4 shows a circuit diagram of a conventional variable gain amplifier. In this circuit, the transistor Q of the first differential amplifier
A gain adjusting resistor R is connected to each of the emitters of Q1 and Q2.
1 and R2 are connected, and the gain setting constant current source I1 is connected to the first differential amplifier via this resistor.
The gain adjustment constant current source I1 is a variable constant current source. An input terminal is connected to the base of the transistor Q1, and an input signal is applied.

[0003] A bias voltage V1 is applied to the base of the transistor Q2. The output signal of the first differential amplifier is connected to the transistors Q5 and Q6 of the second differential amplifier.
Is supplied to the base. That is, the transistor Q
1 is connected to the base of the transistor Q5, and the collector of the transistor Q2 is connected to the transistor Q6.
Connected to the base. These transistors Q
5 and Q6, a gain setting constant current source I which is a variable constant current source.
2 supplies current. The load resistor R3 is connected to the collector of the transistor Q6, and an output signal is taken out from the collector of the transistor Q6. The gain of the amplifier having such a configuration is given by the following equation. However, the symbol attached to each element also serves as an index of the size (resistance value or current value) of each element.

[0004]

(Equation 1)

This equation is derived by the following operation.
In the above figure, when the input _VIN changes by ΔV, Q3, Q
Assuming that the amount of change in the current flowing through Q4 is ΔI1 and the amount of change in the current flowing through Q5 and Q6 is ΔI2,

[0006]

(Equation 2)

[0007]

[0008]

(Equation 3)

[0009]

[0010]

(Equation 4)

Therefore, substituting these for

[0012]

(Equation 5)

## EQU1 ##

Here, assuming that the amount of change in the output when the input changes by ΔV is ΔV ′,

[0015]

(Equation 6)

## EQU1 ## Therefore, the expression is:

[0017]

(Equation 7)

## EQU1 ## This is because the change ΔV in the input voltage is

[0019]

(Equation 8)

This means that the gain has been multiplied, and this becomes the gain G of the amplifier.

Here, R1, R2 and R3 are constant,
Also, since the emitter resistance re can usually be ignored, I1,
By changing the ratio of I2, an arbitrary gain can be obtained.

[0022]

Here, the emitter resistance re of the bipolar transistor is inversely proportional to the emitter current IE.

[0023]

(Equation 9)

## EQU2 ## Therefore, in the case of the first differential amplifier, if IE (I1) is sufficiently large, R1,
Re is sufficiently small for R2 (for example, set to about 2.6 kΩ). For example, if IE = 1 mA, re = 26Ω. Since this value is sufficiently smaller than R1 and R2, re can be neglected even when the gain is calculated by Expression 1 when I1 = 1 mA is applied.

However, in order to obtain a large gain with the conventional variable gain amplifier, it is necessary to increase I2 / I1. That is, it is necessary to make I2 a large current and I1 a very small current. When I1 is reduced, the IEs of the transistors Q1 and Q2 are necessarily reduced, and the emitter resistance re is reduced.
Are not negligible with respect to R1 and R2. For example, when I1 = 10 μA, from equation 2, r
e = 2.6 kΩ, which is connected in series with the resistors R1 and R2. Therefore, R1, R2 = 2.6.
In the case of kΩ, the gain of the amplifier is an ideal value (re
= 0), which is a half of that in the case of (= 0).

An object of the present invention is to provide a variable gain amplifier which can obtain an ideal gain similar to a calculated value even when the gain is set large.

[0027]

The present invention comprises a first transistor, a second transistor, and a gain adjusting resistor individually connected to each of the emitter of the first transistor and the emitter of the second transistor. 1 differential amplifier, a second differential amplifier to which an output signal of the first differential amplifier is input, and a constant current independent of the first differential amplifier and the second differential amplifier. And a variable gain setting constant current source for supplying the first differential amplifier, and changing the ratio of the current supplied to the first differential amplifier to the current supplied to the second differential amplifier to vary the total gain. In the gain amplifier, between Vcc and the collector of the first transistor, between the emitter of the first transistor and Vss,
The present invention is characterized in that stabilizing constant current sources for flowing the same current are individually connected between cc and the collector of the second transistor and between the emitter and Vss of the second transistor.

Further, the present invention provides the above-mentioned invention,
The stabilizing constant current source is configured to compensate for a change in current supplied from the gain setting constant current source to the first differential amplifier so that the same current always flows through the first transistor and the second transistor. The variable constant current source is adjusted.

[0029]

In the variable gain amplifier according to the present invention, when increasing the gain, the current (I2) supplied to the second differential amplifier is used.
And the current (I1) supplied to the first differential amplifier (I2)
/ I1) is increased. In this case, I1 becomes smaller,
If this state is maintained, the current flowing through the first and second transistors decreases, and the emitter resistance (re) increases,
Gain loss occurs. However, a constant current source for stabilization is connected to the first and second transistors, and a predetermined current is constantly flowing. Therefore, even if I1 becomes small, the emitter resistance (re) calculates this predetermined current as It does not become larger than the resistance value obtained by substituting, and the gain of the variable gain amplifier does not drop much more than the calculated value.

Further, in the second invention, the constant current source for stabilization is a variable constant current source, and the change in I1 is canceled (compensated) so as to keep the current flowing through the first and second transistors constant. I did it. As a result, no matter how the gain, that is, I1 is changed, re is constant and (R3 / (R1 + R2 + re)) in Equation 2 is a constant, so that the gain is as calculated (I2 / I1).

[0031]

FIG. 1 is a circuit diagram of a variable gain amplifier according to a first embodiment of the present invention. In this circuit diagram, portions having the same configuration as the above-mentioned conventional variable gain amplifier are denoted by the same reference numerals. The first differential amplifier includes transistors Q1 and Q
2. Gain adjusting resistors R1, R connected to the emitter of transistor Q1 and the emitter of transistor Q2, respectively.
2. The load resistance transistor Q connected to each of the collector of the transistor Q1 and the collector of the transistor Q2.
3 and Q4, and a gain setting constant current source I1 which is a variable current source. An input signal is applied to the base of the transistor Q1. A bias voltage V1 is applied to the base of the transistor Q2.

The collectors and emitters of the transistors Q1 and Q2 are connected to stabilizing constant current sources I (I01, I02, I03, and I04) that allow the same amount of current to flow. The current value of the constant current source I for stabilization is a current value (for example, 200 μA) sufficiently larger than the minimum value of the settable range of the constant current source I1 for gain setting.

The collector of the transistor Q1 is connected to the base of the transistor Q5, and the collector of the transistor Q2 is connected to the base of the transistor Q6. The transistors Q5 and Q6 are connected to a gain setting constant current source I2 and supply a predetermined current I2. These transistors Q5 and Q6 constitute a second differential amplifier. The load resistor R3 is connected to the collector of the transistor Q6, and an output signal is taken out from the collector of the transistor Q6.

In the above circuit configuration, by changing the current ratio of the gain setting constant current sources I1 and I2,
The gain of the circuit can be changed, but if the gain is to be increased, I1 is set small. On the other hand, since the current I flows through the transistors Q1 and Q2 by the constant current source I for stabilization, the emitter resistance re becomes

[0035]

(Equation 10)

This value can be almost ignored in the calculation of the gain (see the above equation 1). This current flows only through the transistors Q1 and Q2, does not flow through the load transistors Q3 and Q4 and the gain adjustment resistors R1 and R2, and furthermore, the transistors Q1 and Q2 have the same phase and the same amount. Because
It has no effect on the operation of the differential amplifier.

In this circuit, I = 200 μA, I1 = 10
If μA, re = 123Ω, and R1 = R2 = 2.
In the case of 6 kΩ, the gain of this amplifier is 96% of the ideal value obtained from Equation 1, which is a significant improvement over the conventional circuit.

FIG. 2 is a circuit diagram of a variable gain amplifier according to a second embodiment of the present invention. In this circuit, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

In this circuit, a stabilizing constant current source I '(I'01, I'02,
I'03, I'04) were used as variable current sources. This stabilizing constant current source I 'is set in conjunction with the set value of the gain setting constant current source I1, which is a variable constant current source for setting the gain of the amplifier, and the current flowing through the transistors Q1 and Q2 is changed. Always set to be the same. That is, (I1 + I '
= Constant).

FIG. 3 shows a circuit diagram of the stabilizing constant current source I 'and the gain setting current sources I1 and I2. In this circuit, I1 and I2 are set by adjusting V3,
I '(I'01, I'02, I'03, I'04) are connected so as to change in conjunction with I2. I1 and I2
Changes reciprocally by the change of V3, so that I1 and I '
Also change reciprocally. As a result, even if I1 changes, I 'changes so as to cancel the change, and Q1,
The current flowing through Q2 can always be kept constant.

Thus, no matter how the gain, ie, I1 is changed, the emitter resistances re of the transistors Q1, Q2 are always constant, and the current set value (I2 / I1), that is, as calculated by the equation (1). Can be obtained.

[0042]

As described above, according to the present invention, since the emitter resistance does not fluctuate greatly due to the current flowing through the first differential amplifier, a gain according to the current ratio of I2 / I1 can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a variable gain amplifier according to a first embodiment of the present invention;

FIG. 2 is a diagram showing a variable gain amplifier according to a second embodiment of the present invention;

FIG. 3 is a circuit diagram of a stabilizing constant current source used in a second embodiment.

FIG. 4 is a diagram showing a conventional variable gain amplifier.

[Explanation of symbols]

I (I01, I02, I03, I04)-Stabilizing constant current source I '(I'01, I'02, I'03, I'04)-Stabilizing constant current source

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-1-231509 (JP, A) JP-A-4-292008 (JP, A) JP-A-63-38313 (JP, A) JP-A-63-63 184412 (JP, A) JP-A-5-218764 (JP, A) JP-A-55-52615 (JP, A) JP-A-63-38315 (JP, A) JP-A-61-210714 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03G 1/00-3/18

Claims (2)

(57) [Claims] A first transistor, a second transistor,
A first differential amplifier having a gain adjusting resistor individually connected to each of the emitter of the first transistor and the emitter of the second transistor; and an output signal of the first differential amplifier is input. A second differential amplifier; and a variable gain setting constant current source that supplies a constant current independently to the first differential amplifier and the second differential amplifier. In a variable gain amplifier that varies the total gain by changing the ratio of the current supplied to the amplifier to the current supplied to the second differential amplifier, the variable gain amplifier includes: between Vcc and the collector of the first transistor; , Vcc-between the collector of the second transistor and the emitter-
A variable gain amplifier characterized in that stabilizing constant current sources, each allowing the same current to flow between Vss, are individually connected. 2. The constant current source for stabilization, wherein the constant current source for gain setting compensates for a change in current supplied to the first differential amplifier, so that the first and second transistors are always the same. 2. The variable gain amplifier according to claim 1, wherein the variable constant current source is adjusted to allow a current to flow.