JP2985520B2 - Ceramic structure for encapsulating semiconductor device, method for producing the same, and lid material therefor - Google Patents
Ceramic structure for encapsulating semiconductor device, method for producing the same, and lid material thereforInfo
- Publication number
- JP2985520B2 JP2985520B2 JP19160992A JP19160992A JP2985520B2 JP 2985520 B2 JP2985520 B2 JP 2985520B2 JP 19160992 A JP19160992 A JP 19160992A JP 19160992 A JP19160992 A JP 19160992A JP 2985520 B2 JP2985520 B2 JP 2985520B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- lid
- frame
- ceramic
- ceramic structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Ceramic Products (AREA)
- Die Bonding (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、密閉性に優れて外気を
完全に遮断し、かつ、組立ての際に位置ずれを起こさな
い半導体装置封止用セラミックス構造体、および、その
製造方法、ならびに、そのふた材に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic structure for sealing a semiconductor device which is excellent in hermeticity, completely shuts off outside air, and does not cause displacement during assembly, and a method of manufacturing the same. , Regarding the lid material.
【０００２】[0002]
【従来の技術】従来、半導体装置の封止用パッケージと
しては、図３に示すようなセラミックス構造体３１が知
られている。このものは、セラミックス製のパッケージ
３２の上面に凹部３２Ａを形成し、この凹部３２Ａに半
導体装置（ＩＣチップ）３３を搭載している。この凹部
３２Ａを取り囲むようにパッケージ３２の上面には、金
属（Ｆｅ−Ｎｉ合金）製の枠材３４がはんだ３５により
固設されている。枠材３４は凹部３２Ａと同一形状の開
口部を有しており、この凹部３２Ａとともに上記半導体
装置３３の収納部を画成している。この枠材３４の開口
部を封止するセラミックス製のふた材３６は、その下面
にて枠材３４が当接する周縁部にＷ、Ｍｏ等のペースト
をスクリーン印刷後、焼成したメタライズ層３７を形成
してある。そして、このメタライズ層３７の下面にはＮ
ｉメッキ３８が施されている。このＮｉメッキ３８は、
ふた材３６を枠材３４に接合する場合、はんだ３９を使
用するが、このはんだ３９との濡れ性を高めるために設
けられている。2. Description of the Related Art Conventionally, as a sealing package for a semiconductor device, a ceramic structure 31 as shown in FIG. 3 has been known. In this device, a concave portion 32A is formed on the upper surface of a ceramic package 32, and a semiconductor device (IC chip) 33 is mounted in the concave portion 32A. A frame material 34 made of metal (Fe—Ni alloy) is fixed on the upper surface of the package 32 by solder 35 so as to surround the recess 32A. The frame member 34 has an opening having the same shape as the recess 32A, and together with the recess 32A defines a housing portion for the semiconductor device 33. The ceramic lid member 36 that seals the opening of the frame member 34 is formed by screen-printing a paste of W, Mo, or the like on the peripheral portion of the lower surface thereof where the frame member 34 contacts, and then forming a baked metallized layer 37. I have. The lower surface of the metallized layer 37 has N
The i-plate 38 is provided. This Ni plating 38
When joining the lid member 36 to the frame member 34, solder 39 is used. The solder 39 is provided to enhance the wettability with the solder 39.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、このよ
うな従来の構造体にあっては、ふた材にメタライズ層を
形成する際に１５００〜１８００℃程度の焼成工程が必
要であるため、高温によりふた材が反ったり歪んだりし
てふた材と枠材との間に隙間が生じて、収納部に外気等
が侵入する等の不具合が発生し易いという問題点があっ
た。また、ふた材および枠材がともに高剛性材料で構成
されているために、半導体装置使用時の熱サイクルによ
る歪みが、接合部分であるはんだに集中して、はんだが
割れたり剥離したりして外気が侵入し、封入部品が腐食
したりする不都合があった。さらに、このはんだ付工程
においては、ふた材、枠材、および、パッケージをそれ
ぞれの周縁部が一致するように重ね合わせる必要がある
が、枠材が例えば５００μｍ程度の厚さで極めて取り扱
い難いうえ、作業ミスや僅かな振動で位置ずれを生じる
という不具合がある。この位置ずれによってセラミック
ス構造体の各箇所に隙間が生じ易くなり、外気が侵入し
て内部に設置した半導体装置に悪影響を与えることにな
る。また、はんだはＮｉメッキに対して濡れ性が良すぎ
て、はんだがセラミックス構造体の内部空間である収納
部にはみ出して、半導体装置のボンディングワイヤ間で
ショートが起こり易いという問題点も解決されなければ
ならない。However, in such a conventional structure, a baking process at about 1500 to 1800 ° C. is required when forming a metallized layer on the lid material, so that the lid is heated at a high temperature. There has been a problem that the material is warped or distorted and a gap is generated between the lid material and the frame material, so that a problem such as invasion of outside air or the like into the storage portion easily occurs. In addition, since both the lid material and the frame material are made of a high-rigidity material, distortion due to thermal cycling during use of the semiconductor device concentrates on the solder at the joint, and the solder is broken or separated. There was the inconvenience that outside air invaded and the enclosed parts corroded. Furthermore, in this soldering step, it is necessary to overlap the lid material, the frame material, and the package so that their respective peripheral portions coincide, but the frame material is extremely difficult to handle, for example, with a thickness of about 500 μm. There is a problem that a position error occurs due to a work error or slight vibration. Due to this displacement, gaps are likely to be formed at various parts of the ceramic structure, and outside air enters and adversely affects the semiconductor device installed inside. In addition, the problem that the solder has too good wettability with respect to Ni plating, and the solder protrudes into the housing portion, which is the internal space of the ceramic structure, and short-circuits easily occur between the bonding wires of the semiconductor device must be solved. Must.
【０００４】[0004]
【発明の目的】本発明は、各部材を正確かつ簡便に組み
付けることができるとともに、封止効果の高い半導体装
置封止用セラミックス構造体およびその製造方法ならび
にそのふた材を提供することを、その目的としている。SUMMARY OF THE INVENTION It is an object of the present invention to provide a ceramic structure for encapsulating a semiconductor device having a high sealing effect, a method of manufacturing the same, and a lid member thereof, which can accurately and simply assemble each member. The purpose is.
【０００５】[0005]
【課題を解決するための手段】このような目的は、下記
の本発明により達成される。すなわち、本発明において
は、収納部に半導体装置が収納されるセラミックス製パ
ッケージと、この収納部を封止するセラミックス製のふ
た材と、これらのパッケージとふた材との間に介在して
上記収納部を取り囲む金属製（合金製も含む）の枠材
と、これらのふた材と枠材とを接合するろう材と、を備
えた半導体装置封止用セラミックス構造体であって、上
記ろう材は、上記枠材と同一の金属元素含むものであ
る。This and other objects are achieved by the present invention described below. That is, in the present invention, a ceramic package in which a semiconductor device is housed in a housing portion, a ceramic lid member for sealing the housing portion, and the housing member interposed between the package and the lid material. A ceramic structure for encapsulating a semiconductor device, comprising: a metal (including an alloy) frame material surrounding the portion; and a brazing material joining the lid material and the frame material, wherein the brazing material is , Containing the same metal element as the above-mentioned frame material.
【０００６】また、本発明は、セラミックス製のふた材
と金属製の枠材とを、この枠材の内側に収納部が構成さ
れるように、この枠材と同一の金属元素を含むろう材に
て接合する工程と、上記枠材の外側面および底面にはん
だ付け用のメッキを施す工程と、上記枠材の底面がセラ
ミックス製パッケージに接するように上記メッキ部分に
はんだを介装して、ふた材および枠材を該パッケージに
接合する工程と、を含む半導体装置封止用セラミックス
構造体の製造方法である。Further, the present invention provides a brazing material containing the same metal element as a frame material such that a lid made of ceramics and a metal frame material are accommodated inside the frame material. In the step of joining, and the step of plating for soldering on the outer surface and the bottom surface of the frame material, interposing solder on the plated portion so that the bottom surface of the frame material is in contact with the ceramic package, Bonding a lid material and a frame material to the package.
【０００７】さらに、本発明は、半導体装置封止用セラ
ミックス構造体を構成するセラミックスパッケージに設
けられた、半導体装置を収納する収納部を封止するふた
材において、このふた材をセラミックスで形成するとと
もに、ふた材の一面には金属製の枠材がこれと同一の金
属元素を含むろう材により接合される半導体装置封止用
セラミックス構造体のふた材である。また、上記枠材が
アルミニウムまたはアルミニウム合金である。Further, the present invention provides a lid material for sealing a housing portion for housing a semiconductor device provided in a ceramic package constituting a ceramic structure for sealing a semiconductor device, wherein the lid material is formed of ceramics. At the same time, on one surface of the lid material, a metal frame material is a lid material for a ceramic structure for sealing a semiconductor device, which is joined by a brazing material containing the same metal element. Further, the frame material is aluminum or an aluminum alloy.
【０００８】[0008]
【作用】本発明においては、ふた材と枠材を接合するろ
う材に枠材と同一の金属元素を用いたため、枠材に対す
るろう材の適合性が良く、その接合部分がより強固とな
り封止効果が向上する。また、接合に際してろう材を用
いることにより、ふた材にメタライズ層を形成しなくて
もよい。この結果、より低温でこれらの接合を行うこと
ができ、ふた材の反り等は生じない。また、枠材を構成
する金属としてＡｌあるいはＡｌ合金を用いる。Ａｌあ
るいはＡｌ合金は柔性が豊かであるので、半導体装置使
用時の熱サイクルによる歪みをはんだと分担して緩和す
るので、はんだの割れや剥離を抑えることができる。In the present invention, the same metal element as the frame material is used for the brazing material for joining the lid material and the frame material, so that the brazing material has good compatibility with the frame material, and the joining portion becomes stronger and sealed. The effect is improved. Also, by using a brazing material at the time of joining, it is not necessary to form a metallized layer on the lid material. As a result, these joining can be performed at a lower temperature, and the lid material does not warp. Further, Al or an Al alloy is used as a metal constituting the frame material. Since Al or an Al alloy is rich in flexibility, distortion due to thermal cycling during use of the semiconductor device is alleviated by sharing with the solder, so that cracking and peeling of the solder can be suppressed.
【０００９】また、本発明の製造方法によれば、構造体
の構成部材のそれぞれを別個に重ね合わせて一体化する
工程を改め、まず、ふた材に枠材を接合し、然る後にこ
れをセラミックス製パッケージに接合する。その結果、
一体化を行う工程が簡略化され、部材の位置ずれも防止
することができる。また、はんだと枠材との濡れ性を改
善するためのＮｉ等のメッキを、枠材の周縁部の外側面
および底面にのみ施している結果、接合用はんだが、収
納部内に漏入することがない。Further, according to the manufacturing method of the present invention, the step of separately superimposing and integrating the constituent members of the structure is improved, and firstly, the frame member is joined to the lid member, and then the frame member is joined. Join to ceramic package. as a result,
The step of performing the integration is simplified, and the displacement of the members can be prevented. In addition, the plating of Ni or the like for improving the wettability between the solder and the frame material is performed only on the outer side surface and the bottom surface of the peripheral portion of the frame material, so that the solder for joining leaks into the storage portion. There is no.
【００１０】[0010]
【実施例】以下に本発明の実施例について詳述する。本
発明の一実施例に係る半導体装置封止用セラミックス構
造体の断面図を図１に示す。この図にあって、１１はセ
ラミックス製のパッケージであり、このパッケージ１１
の上面には所定の大きさ、深さの矩形の凹部１１Ａが形
成されている。この凹部１１Ａの内部には半導体装置で
あるＩＣチップ１２が固設、搭載されている。このＩＣ
チップ１２はボンディングワイヤ１３を介して所定のリ
ード等に接続されている。この凹部１１Ａとともに上記
ＩＣチップ１２の収納部を画成する枠材１４は、該凹部
１１Ａと同一形状の開口部を有しており、この開口部は
ふた材１５により封止、密閉されるものである。すなわ
ち、このふた材１５はセラミックス（Ａｌ2Ｏ3、Ａｌ
Ｎ、ＳｉＣ等のうち好ましくはＡｌ系セラミックス）製
の板材で構成されており、その下面にはろう材１６によ
り上記枠材１４が固着されている。このようにふた材１
５に固着された枠材１４の下面（底面）および外側面に
は、所定の厚さにＮｉメッキ１７が施されている。そし
て、このＮｉメッキ１７にはんだ１８が塗布され、この
はんだ１８を介して上記セラミックス製のパッケージ１
１の上面に、このふた材１５および枠材１４の接合体が
固設されている。はんだ１８は図示のようにＮｉメッキ
１７に沿って枠材１４の外側面に配設されている。Embodiments of the present invention will be described below in detail. FIG. 1 is a sectional view of a ceramic structure for sealing a semiconductor device according to an embodiment of the present invention. In this figure, reference numeral 11 denotes a ceramic package.
Is formed with a rectangular concave portion 11A having a predetermined size and depth. An IC chip 12, which is a semiconductor device, is fixedly mounted inside the recess 11A. This IC
The chip 12 is connected to predetermined leads and the like via bonding wires 13. The frame member 14 that defines the accommodating portion of the IC chip 12 together with the concave portion 11A has an opening having the same shape as the concave portion 11A, and the opening is sealed and sealed by a lid member 15. It is. That is, the lid 15 is made of ceramics (Al 2 O 3 , Al
It is preferably made of a plate material made of N, SiC or the like (Al-based ceramics), and the frame material 14 is fixed to the lower surface thereof by a brazing material 16. The lid material 1
The lower surface (bottom surface) and the outer surface of the frame member 14 fixed to 5 are plated with Ni to a predetermined thickness. A solder 18 is applied to the Ni plating 17, and the package 1 made of ceramics is applied through the solder 18.
A joined body of the lid member 15 and the frame member 14 is fixed to the upper surface of the first member 1. The solder 18 is provided on the outer surface of the frame member 14 along the Ni plating 17 as shown.
【００１１】このろう材１６としては、ＡｌあるいはＡ
ｌ合金系のものを用いることが好ましい。このＡｌ合金
としては、Ａｌ−Ｓｉ、Ａｌ−Ｃｕ、Ａｌ−Ｇｅ、また
は、Ａｌ−Ｍｇ合金等を使用することができる。また、
このろう材１６によりふた材１５に接合される上記枠材
１４としては、ＡｌまたはＡｌ合金を用いるものとす
る。このようにふた材１５、ろう材１６および枠材１４
にＡｌ系素材を用いることにより、これらの部材間での
接合における適合性が高まる。また、半導体装置１２作
動時の熱歪をこのＡｌ系素材が吸収するので、全体とし
てセラミックス構造体が堅牢となり、封止効果をより高
めることができる。さらに、このようにして一体化され
たふた材１５および枠材１４が接合される上記パッケー
ジ１１は、Ａｌ2Ｏ3、ＡｌＮ等のセラミックスが用いら
れている。Ａｌ系セラミックスを用いることにより、各
部材間の接合の適合性が一層高まり、また、高温状態で
使用する場合の熱膨張率を近似させることができるの
で、はんだ接合部の熱疲労を低減することができる。As the brazing material 16, Al or A
It is preferable to use an alloy type. As the Al alloy, Al-Si, Al-Cu, Al-Ge, Al-Mg alloy, or the like can be used. Also,
As the frame member 14 joined to the lid member 15 by the brazing member 16, Al or an Al alloy is used. Thus, the lid member 15, the brazing member 16 and the frame member 14
By using an Al-based material, the compatibility in joining between these members is enhanced. In addition, since the Al-based material absorbs thermal strain during the operation of the semiconductor device 12, the ceramic structure as a whole becomes robust, and the sealing effect can be further enhanced. Further, the package 11 to which the lid member 15 and the frame member 14 integrated in this manner are joined uses ceramics such as Al 2 O 3 and AlN. By using Al-based ceramics, the suitability of joining between the members is further enhanced, and the coefficient of thermal expansion when used in a high temperature state can be approximated, so that the thermal fatigue of the solder joint is reduced. Can be.
【００１２】以上の構成に係る半導体装置封止用セラミ
ックス構造体の組立、製造の手順について以下説明す
る。まず、ふた材１５に枠材１４をろう付けして一体化
し、然る後にこの接合体をパッケージ１１に接合する。
すなわち、矩形の開口を有する四角形の枠体であるふた
材１５の一面にろう材１６を塗布して、これをセラミッ
クス製のふた材１５の下面に位置決めして接合する。そ
して、この枠材１４の外側面および下面にＮｉメッキ１
７を被着する。したがって、枠材１４の内側面には、Ａ
ｌ系素材が露出している。一方、セラミックス製のパッ
ケージ１１の上面で凹部１１ＡにＩＣチップ１２を搭載
し、ボンディングワイヤ１３により所定の接続を行って
おく。このセラミックス製パッケージ１１の凹部１１Ａ
の周囲の上面に、上記ふた材１５と枠材１４との接合体
を、そのＮｉメッキ１７を下面としてはんだ１８により
接合する。この場合、枠材１４の周縁部下面とパッケー
ジ１１の上面との間に介在させるはんだ１８の供給量を
通常よりやや増量する。この結果、組立て時の押圧によ
り、はんだ１８は、図示のように、枠材１４の外側面に
沿って上昇する。これは、Ａｌ系素材である枠材１４は
はんだ１８に対して濡れ性が悪いが、Ｎｉメッキ１７は
はんだ１８との濡れ性が良いからである。この結果、枠
材１４とパッケージ１１との接合が良好に行われる。し
たがって、半導体装置１２の封止効果をより高めること
ができ、かつ、セラミックス構造体の堅牢度を向上させ
ることができる。このように、まず、ふた材１５に枠材
１４をろう接し、次いで、その接合体をセラミックス製
パッケージ１１にはんだ付けしたため、この接合する各
部材の重ね合わせが容易に行え、かつ、その位置ずれも
防止することができる。さらに、枠材１４の内側面のＡ
ｌ系素材がはんだ１８をはじくので、はんだ１８が構造
体の収納部内に侵入することがなく、ボンディングワイ
ヤ１３のショート等のトラブルを未然に防止することが
できる。また、上記ろう材１６の溶融温度は４００〜６
６０℃程度のため、ふた材１５に反り等は生じることは
ない。さらに、はんだ付け温度は２５０℃程度であり、
ＩＣチップ１２について悪影響を与えることはない。The procedure for assembling and manufacturing the above-structured ceramic structure for sealing a semiconductor device will be described below. First, the frame member 14 is brazed to the lid member 15 to be integrated, and then the joined body is joined to the package 11.
That is, a brazing material 16 is applied to one surface of a lid material 15 which is a rectangular frame having a rectangular opening, and is positioned and joined to the lower surface of the lid material 15 made of ceramics. Then, an outer surface and a lower surface of the frame material 14 are plated with Ni.
7 is deposited. Therefore, A
The l-material is exposed. On the other hand, the IC chip 12 is mounted in the concave portion 11A on the upper surface of the ceramic package 11, and a predetermined connection is made with the bonding wire 13. The recess 11A of the ceramic package 11
A joined body of the lid member 15 and the frame member 14 is joined to the upper surface of the periphery by solder 18 with the Ni plating 17 as the lower surface. In this case, the supply amount of the solder 18 interposed between the lower surface of the peripheral portion of the frame member 14 and the upper surface of the package 11 is slightly increased from the usual amount. As a result, the solder 18 rises along the outer surface of the frame member 14 as shown in the drawing due to the pressure during assembly. This is because the frame material 14, which is an Al-based material, has poor wettability to the solder 18, but the Ni plating 17 has good wettability to the solder 18. As a result, the joining between the frame member 14 and the package 11 is favorably performed. Therefore, the sealing effect of the semiconductor device 12 can be further enhanced, and the robustness of the ceramic structure can be improved. As described above, first, the frame member 14 is soldered to the lid member 15, and then the joined body is soldered to the ceramic package 11, so that the members to be joined can be easily overlapped, and the displacement thereof can be improved. Can also be prevented. Further, A on the inner surface of the frame material 14
Since the l-based material repels the solder 18, the solder 18 does not intrude into the storage portion of the structure, and trouble such as short-circuit of the bonding wire 13 can be prevented. Further, the melting temperature of the brazing material 16 is 400-6.
Since the temperature is about 60 ° C., the lid 15 does not warp. Furthermore, the soldering temperature is about 250 ° C,
There is no adverse effect on the IC chip 12.
【００１３】図２は本発明の他の実施例を示している。
この実施例にあっては、枠材２１の下面のＮｉメッキ層
２２にＡｕメッキ層２３を設けている。また、パッケー
ジ２４の上面にも同様にＮｉメッキ層２５を設け、この
Ｎｉメッキ層２５の上面にさらにＡｕ等のメッキ層２６
を設けている。すなわち、枠材２１とパッケージ２４と
の両者の間に介在するはんだ２７とのなじみを良くする
ためＡｕメッキ層２３、２６を設けたものである。この
結果、はんだ付けが容易に行え、しかも、それらの接合
をより強固になすことができる。なお、図中２８はふた
材であってろう材２９により上記枠材２１の上面に固着
されている。FIG. 2 shows another embodiment of the present invention.
In this embodiment, the Au plating layer 23 is provided on the Ni plating layer 22 on the lower surface of the frame member 21. A Ni plating layer 25 is similarly provided on the upper surface of the package 24, and a plating layer 26 of Au or the like is further provided on the upper surface of the Ni plating layer 25.
Is provided. That is, the Au plating layers 23 and 26 are provided in order to improve the familiarity with the solder 27 interposed between both the frame member 21 and the package 24. As a result, soldering can be easily performed, and furthermore, the joining thereof can be made stronger. In the figure, reference numeral 28 denotes a lid material, which is fixed to the upper surface of the frame material 21 by a brazing material 29.
【００１４】したがって、この構造体の製造は、以下の
手順による。まず、Ａｌ2Ｏ3製ふた材２８の周縁部とＡ
ｌ製枠材２１との間に、Ａｌ−Ｓｉろう材箔２９を介在
させ、６２０℃でこのふた材２８と枠材２１とを圧着す
る。次いで、この枠材２１の下面にＮｉメッキ層２２を
形成し、このＮｉメッキ層２２の上にＡｕ２３をメッキ
する。一方、Ａｌ2Ｏ3製のパッケージ２４の凹部中央に
半導体装置２９１を載置し、ボンディングワイヤ２９２
により電気的接続を行う。この後、このパッケージ２４
の凹部の周縁部にＮｉメッキ層２５を形成し、さらに、
この上にＡｕ２６をメッキする。このようにして得られ
た２部材の間にハンダ２７を介在させ、ふた材２８の上
に置いた押え治具に圧力を加え、２５０℃にて圧着す
る。Therefore, the manufacture of this structure is performed according to the following procedure. First, the periphery of the lid member 28 made of Al 2 O 3 and A
An Al-Si brazing material foil 29 is interposed between the frame material 21 and the lid material 28 and the frame material 21 are pressed at 620 ° C. Next, a Ni plating layer 22 is formed on the lower surface of the frame member 21, and Au 23 is plated on the Ni plating layer 22. On the other hand, the semiconductor device 291 is placed in the center of the concave portion of the package 24 made of Al 2 O 3 and the bonding wire 292 is mounted.
To make electrical connection. After this, this package 24
A Ni plating layer 25 is formed on the periphery of the concave portion of
Au26 is plated thereon. The solder 27 is interposed between the two members thus obtained, pressure is applied to the holding jig placed on the lid member 28, and pressure bonding is performed at 250 ° C.
【００１５】[0015]
【発明の効果】本発明によれば、ふた材に歪がなく、封
止効果の高い半導体装置封止用セラミックス構造体を得
ることができる。また、使用時にはんだに割れが生じる
ことなく、外気封止の効果を維持することができる。ま
た、熱歪の吸収が容易であるため、同様に封止効果を維
持することができる。また、各部材の組付を簡略化する
ことができ、各部材を重ね合わせる際の位置ずれを防止
することもできる。さらに、はんだのはみ出しによるシ
ョート等の不具合を完全に防止することができる。According to the present invention, a ceramic structure for encapsulating a semiconductor device having a high encapsulation effect without distortion of the lid material can be obtained. In addition, the effect of sealing with outside air can be maintained without cracking of the solder during use. Further, since the thermal strain is easily absorbed, the sealing effect can be similarly maintained. In addition, assembly of each member can be simplified, and positional deviation when overlapping each member can be prevented. Further, it is possible to completely prevent a defect such as a short circuit due to the protrusion of the solder.
【図１】本発明の半導体装置封止用セラミックス構造体
の一実施例を示すその断面図である。FIG. 1 is a cross-sectional view showing one embodiment of a ceramic structure for sealing a semiconductor device of the present invention.
【図２】本発明の他の実施例に係るセラミックス構造体
を示すその分解断面図である。FIG. 2 is an exploded cross-sectional view showing a ceramic structure according to another embodiment of the present invention.
【図３】従来の半導体装置封止用セラミックス構造体を
示す分解断面図である。FIG. 3 is an exploded cross-sectional view showing a conventional ceramic structure for sealing a semiconductor device.
１１ セラミックス製パッケージ １１Ａ 凹部 １２ ＩＣチップ １４ 枠材 １５ ふた材 １６ ろう材 １７ Ｎｉメッキ １８ はんだ DESCRIPTION OF SYMBOLS 11 Ceramic package 11A recessed part 12 IC chip 14 Frame material 15 Lid material 16 Brazing material 17 Ni plating 18 Solder
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/02 H01L 23/08 H01L 23/10 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 23/02 H01L 23/08 H01L 23/10
Claims (4)
ックス製パッケージと、この収納部を封止するセラミッ
クス製のふた材と、これらのパッケージとふた材との間
に介在して上記収納部を取り囲む金属製の枠材と、これ
らのふた材と枠材とを接合するろう材と、を備えた半導
体装置封止用セラミックス構造体であって、 上記ろう材は、上記枠材と同一の金属元素含むことを特
徴とする半導体装置封止用セラミックス構造体。1. A ceramic package in which a semiconductor device is housed in a housing, a ceramic lid member for sealing the housing, and a housing interposed between the package and the lid. A ceramic structure for encapsulating a semiconductor device, comprising: a surrounding metal frame material; and a brazing material for joining the lid material and the frame material, wherein the brazing material is the same metal as the frame material. A ceramic structure for sealing a semiconductor device, characterized by containing an element.
とを、この枠材の内側に収納部が構成されるように、こ
の枠材と同一の金属元素を含むろう材にて接合する工程
と、 上記枠材の外側面および底面にはんだ付け用のメッキを
施す工程と、 上記枠材の底面がセラミックス製パッケージに接するよ
うに上記メッキ部分にはんだを介装して、ふた材および
枠材を該パッケージに接合する工程と、を含むことを特
徴とする半導体装置封止用セラミックス構造体の製造方
法。2. A ceramic lid material and a metal frame material are joined by a brazing material containing the same metal element as the frame material so that a storage portion is formed inside the frame material. A step of plating the outer surface and the bottom surface of the frame material with solder, and a step of applying solder to the plated portion so that the bottom surface of the frame material is in contact with the ceramic package. Joining a material to the package. A method for manufacturing a ceramic structure for encapsulating a semiconductor device, comprising:
構成するセラミックスパッケージに設けられた、半導体
装置を収納する収納部を封止するふた材において、 このふた材はセラミックスで形成されるとともに、ふた
材の一面には金属製の枠材がこれと同一の金属元素を含
むろう材により接合されることを特徴とする半導体装置
封止用セラミックス構造体のふた材。3. A lid material for sealing a housing portion for housing a semiconductor device provided in a ceramic package constituting a ceramic structure for encapsulating a semiconductor device, wherein the lid material is formed of ceramics and a lid.
On one side of the material is a metal frame containing the same metal elements.
A lid material for a ceramic structure for sealing a semiconductor device, wherein the lid material is joined by a brazing material.
ウム合金で形成した請求項３に記載の半導体装置封止用
セラミックス構造体のふた材。4. The lid material of a ceramic structure for sealing a semiconductor device according to claim 3, wherein the frame material is formed of aluminum or an aluminum alloy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19160992A JP2985520B2 (en) | 1992-06-25 | 1992-06-25 | Ceramic structure for encapsulating semiconductor device, method for producing the same, and lid material therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19160992A JP2985520B2 (en) | 1992-06-25 | 1992-06-25 | Ceramic structure for encapsulating semiconductor device, method for producing the same, and lid material therefor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0613478A JPH0613478A (en) | 1994-01-21 |
| JP2985520B2 true JP2985520B2 (en) | 1999-12-06 |
Family
ID=16277486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19160992A Expired - Fee Related JP2985520B2 (en) | 1992-06-25 | 1992-06-25 | Ceramic structure for encapsulating semiconductor device, method for producing the same, and lid material therefor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2985520B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3736436B2 (en) * | 2001-01-25 | 2006-01-18 | 株式会社村田製作所 | Non-reciprocal circuit device manufacturing method |
-
1992
- 1992-06-25 JP JP19160992A patent/JP2985520B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0613478A (en) | 1994-01-21 |
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