JP2958935B2 - Time base collector circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time base collector circuit for correcting a time base error of a video signal.

[0002]

2. Description of the Related Art A conventional time base collector circuit is shown in FIG.
As shown in (1), the phase comparison circuit 4 compares the reference horizontal synchronization signal output from the standard signal generation circuit 1 with the horizontal synchronization signal separated from the video signal passed through the variable delay line circuit 2 in the synchronization separation circuit 3. Then, the delay time of the variable delay line circuit 2 is controlled based on the phase comparison output, the time base error of the luminance signal in the video signal is corrected, and the video signal output from the variable delay line circuit 2 is subjected to variable phase control. Circuit 7
Output through

On the other hand, a burst signal is extracted by a burst gate circuit 11 from a video signal output from a variable delay line circuit 2, and the extracted burst signal is compared with a reference NTSC signal output from a standard signal generation circuit 1 and a phase comparison circuit. 1
2, the sample and hold circuit 13 samples the phase comparison output by the separated horizontal synchronization signal, and controls the phase of the video signal input to the variable phase control circuit 7 based on the sampled phase comparison output. I was

[0004]

However, in the above-described conventional time base collector circuit, the phase control in the variable phase control circuit is performed based on the color burst signal included in the video signal, so that it is intermittent. In the control, there is a problem that it is not possible to correct a time base error generated in a portion other than the portion corresponding to the color burst. As a result, color unevenness has occurred.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a time base collector circuit which can continuously correct a time base error for a color signal.

[0006]

A time base collector circuit according to the present invention delays an input video signal by a first variable delay means, and converts the phase of the video signal delayed by the first variable delay means to a first variable phase signal. Controlled by control means, the first
The phase of the horizontal synchronization signal separated from the video signal delayed by the variable delay means is compared with the reference horizontal synchronization signal by the first phase comparison means, and the delay time by the first variable delay means is controlled based on the phase comparison output. A second variable delay unit for delaying a reference NTSC signal based on a phase comparison output of the first phase comparison unit, wherein the second variable delay unit outputs a video signal phase-controlled by the first variable phase control unit; Reference N delayed by variable delay means
Second variable phase control means for controlling the phase of the TSC signal;
A second comparing the phase of the reference NTSC signal with the output of the second variable phase control means and outputting the phase comparison output as a signal for phase control by the first and second variable phase control means;
Phase comparing means.

[0007]

According to the time base collector circuit of the present invention, the input video signal is delayed so that the horizontal synchronizing signal separated from the output video signal from the first variable delay means and the reference horizontal synchronizing signal are phase-synchronized. The time base error of the luminance signal in the signal is corrected. Based on the phase comparison output by the first phase comparison means, the reference NT
The SC signal is delayed. Based on the phase comparison output of the reference NTSC signal and the delayed reference NTSC signal in the second phase comparison means, the second variable phase control means causes the phase of the delayed reference NTSC signal to be synchronized with the phase of the reference NTSC signal. The phase of the video signal is controlled by the first variable phase control means based on the phase comparison output of the second phase comparison means, and the color signal in the input video signal is changed by the delay of the first variable delay means. The added time base error is corrected. Therefore, the correction is also performed for the time base error with respect to the color signal generated during a period other than the burst signal. That is, the correction of the time base error for the color signal is continuously performed.

[0008]

The present invention will be described below with reference to examples. FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention.

The time base corrector circuit of this embodiment includes a luminance signal time base error correction section 10 for correcting a time base error contained in a luminance signal, and a color signal for correcting a time base error contained in a color signal. It comprises a signal time base error correction section 20.

The luminance signal time base error correction unit 10 includes a variable delay line circuit 2, a synchronization separation circuit 3, a phase comparison circuit 4,
It comprises a voltage controlled oscillation circuit 5 and a variable delay line circuit 6. The color signal time base error correction section 20 includes a variable phase control circuit 7, a phase comparison circuit 8, and a variable phase control circuit 9.

The input video signal (Vin) is delayed by passing through the variable delay line circuit 2, and is demultiplexed from the video signal (Voh) delayed and output by the variable delay line circuit 2.
To separate the horizontal synchronizing signal (Hx). On the other hand, the standard signal generating circuit 1 generates a reference NTSC signal (Sc) and a reference horizontal synchronization signal (Href). The reference horizontal synchronizing signal (Href) output from the standard signal generating circuit 1 and the horizontal synchronizing signal (Hx) separated by the sync separation circuit 3 are compared in phase by a phase comparison circuit 4.
Is output as a frequency control voltage to the voltage controlled oscillation circuit 5 to control the oscillation frequency (f _TBCH ) of the voltage controlled oscillation circuit 5.

The oscillation output from the voltage controlled oscillation circuit 5 is supplied to the variable delay line circuit 2, and the delay time of the variable delay line circuit 2 is controlled based on the oscillation frequency (f _TBCH ) of the voltage controlled oscillation circuit 5. The delay time for the input video signal (Vin) is controlled. Reference NT output from standard signal generation circuit 1
The SC signal (Sc) is supplied to the variable delay line circuit 6, and the oscillation output from the voltage controlled oscillation circuit 5 is also supplied to the variable delay line circuit 6, based on the oscillation frequency (f _TBCH ) of the voltage controlled oscillation circuit 5. Control the delay time of the variable delay line circuit 6 to
The delay time for the TSC signal Sc is controlled.

Here, the variable delay line circuit 2 and the variable delay line circuit 6 have the same oscillation frequency (f
_TBCH ), the delay time of the variable delay line circuit 2 and the delay time of the variable delay line circuit 6 are the same. By controlling the delay time with respect to the reference NTSC signal (Sc), the reference NTSC signal (Sc) is modulated by the oscillation frequency (f _TBCH ) of the voltage controlled oscillation circuit 5.

The video signal (Voh) output from the variable delay line circuit 2 is supplied to a variable phase control circuit 7 for controlling the phase and correcting the video signal (Vo) having a time base error corrected.
Output as c). The phase of the reference NTSC signal (Sc) and the output (Scoc) from the variable phase control circuit 9 are compared in the phase comparison circuit 8. The phase comparison output (Vphc) output from the phase comparison circuit 8 is supplied to variable phase control circuits 7 and 9, where the phase of the video signal (Voh) is controlled by the variable phase control circuit 7 and modulated by the variable delay line circuit 6. The variable phase control circuit 9 controls the phase of the reference NTSC signal (Sc).

Here, the variable phase control circuit 7 and the variable phase control circuit 9 are connected to the same phase comparison output (Vp
hc), the phase amount controlled by the variable phase control circuit 7 and the phase amount controlled by the variable phase control circuit 9 are the same.

The operation of the embodiment constructed as described above will be described. The input video signal (Vin) is, for example, a luminance signal (Vy (t + Δ) including a time base error.
t)) and a color signal (Vcφ
(T)) is a combined signal.

The horizontal synchronization signal (Hx) separated from the video signal (Voh) in the synchronization separation circuit 3 contains a time base error component (Δt). Phase comparison circuit 4
Then, the horizontal synchronization signal (Hx) and the reference horizontal synchronization signal (Hre)
f), and the phase comparison output (Vph) output from the phase comparison circuit 4 is a difference component between the horizontal synchronizing signal (Hx) and the reference horizontal synchronizing signal (Href), and a time base error component (Δt) ) Is itself.

The oscillation frequency (f _TBCH ) of the voltage controlled oscillator 5 is controlled by the phase comparison output ( _Vph ). The voltage controlled oscillation circuit 5 is set so that the oscillation frequency (f _TBCH ) increases when the phase comparison output ( _Vph ) increases, and the oscillation frequency (f _TBCH ) decreases when the phase comparison output ( _Vph ) decreases. ing. In the variable delay line circuit 2, when the oscillation frequency (f _TBCH ) of the voltage controlled oscillation circuit 5 increases, the delay time is controlled to be short, and the oscillation frequency (f _TBCH )
Is decreased, the delay time is controlled to be long.

As a result, the time base error (Δt) included in the luminance signal in the input video signal (Vin) is controlled so as to cancel out in the variable delay line circuit 2, and the luminance signal of the video signal (Voh) is It becomes a luminance signal (V _OHY (t)) in which the time base error has been corrected.

However, since the color signal (Vcφ (t)) in the input video signal (Vin) did not have a time base error, the color signal passed through the luminance signal time base error corrector 10 (−Δt) will be added. Therefore, a normal color signal cannot be reproduced in this state.

However, the delay time of the reference NTSC signal (Sc) is controlled in the variable delay line circuit 6 based on the oscillation frequency (f _TBCH ) of the voltage control oscillation circuit 5. However, the variable delay line circuit 6 is a variable delay line circuit having the same characteristics as the variable delay line circuit 2. Therefore, the reference NTSC signal (S
The variable delay line circuit 6 also adds the correction component (-Δt) of the time base error to the variable delay line circuit 6, and the output (Scoh) of the variable delay line circuit 6 outputs the video signal (Vo)
h) contains the same time base error as the color signal component (Vohcφ (t−Δt)).

The output (Scoh) of the variable delay line circuit 6 is passed through a variable phase circuit 9 to a reference NT in a phase comparison circuit 8.
The phase is compared with the SC signal (Sc). Therefore, the phase comparison output (Vphc) output from the phase comparison circuit 8 is a signal corresponding to the time base error (−Δt), and the input phase in the variable phase control circuits 7 and 9 is controlled by the phase comparison output (Vphc). Is done.

When the phase comparison output (Vphc) increases, that is, when the phase advances due to a time base error, the phase of the output signal is delayed, while when the phase comparison output (Vphc) decreases, that is, when the phase is delayed due to the time base error, The phase of the output (Scoh) from the variable delay line circuit 6 is controlled so as to advance the phase of the output signal, and the time base error (−) generated in the luminance signal time base error correction unit 10 by the phase comparison output (Vphc). Δ
t) is corrected.

On the other hand, also in the variable delay line circuit 2, the phase of the video signal (Voh) output from the variable delay line circuit 2 is controlled by the phase comparison output (Vphc). Here, since the characteristics of the variable phase control circuit 7 and the variable phase control circuit 9 are the same, the luminance signal time base is applied to the color signal component (Vohcφ (t−Δt)) in the video signal (Voh). The phase error due to the time base error (−Δt) generated in the error correction unit 10 is corrected.

[0025]

As described above, according to the time base collector circuit of the present invention, the reference NTS is set by the second variable delay means based on the phase comparison output by the first phase comparison means.
The C signal is delayed, the delayed reference NTSC signal and the reference NTSC signal are phase-synchronized, and the phase of the video signal is controlled by the first variable phase control means based on the phase comparison output of the second phase comparison means. Therefore, there is an effect that the time base error added to the color signal in the input video signal is continuously corrected by the delay by the first variable delay means. As a result, there is also an effect of suppressing the occurrence of color unevenness and the like.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Standard signal generation circuit 2 and 6 Variable delay line circuit 3 Synchronization separation circuit 4 and 8 Phase comparison circuit 5 Voltage controlled oscillation circuit 7 and 9 Variable phase control circuit 10 Luminance signal time base error correction unit 20 Color signal time base error correction unit

Claims (1)

(57) [Claims] An input video signal is delayed by a first variable delay means, and a phase of the video signal delayed by the first variable delay means is controlled by a first variable phase control means.
The phase of the horizontal synchronization signal separated from the video signal delayed by the variable delay means is compared with the reference horizontal synchronization signal by the first phase comparison means, and the delay time by the first variable delay means is controlled based on the phase comparison output. A time base collector circuit for outputting a video signal phase-controlled by the first variable phase control means, a second variable delay means for delaying a reference NTSC signal based on a phase comparison output of the first phase comparison means; Reference N delayed by variable delay means
Second variable phase control means for controlling the phase of the TSC signal;
A second comparing a phase of the reference NTSC signal with an output of the second variable phase control means and outputting a phase comparison output as a signal for phase control by the first and second variable phase control means;
A time base collector circuit comprising: a phase comparison unit.