JP2956489B2 - Crystal growth method of gallium nitride based compound semiconductor - Google Patents

Crystal growth method of gallium nitride based compound semiconductor

Info

Publication number
JP2956489B2
JP2956489B2 JP22767994A JP22767994A JP2956489B2 JP 2956489 B2 JP2956489 B2 JP 2956489B2 JP 22767994 A JP22767994 A JP 22767994A JP 22767994 A JP22767994 A JP 22767994A JP 2956489 B2 JP2956489 B2 JP 2956489B2
Authority
JP
Japan
Prior art keywords
layer
type
buffer layer
nitride semiconductor
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP22767994A
Other languages
Japanese (ja)
Other versions
JPH0870139A (en
Inventor
修二 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Original Assignee
Nichia Chemical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP22767994A priority Critical patent/JP2956489B2/en
Publication of JPH0870139A publication Critical patent/JPH0870139A/en
Priority to JP32938498A priority patent/JP3548442B2/en
Application granted granted Critical
Publication of JP2956489B2 publication Critical patent/JP2956489B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は発光ダイオード、レーザ
ダイオード等の電子デバイスに使用される窒化ガリウム
系化合物半導体(InXAlYGa1-X-YN、0≦X、0≦
Y、X+Y≦1、以下窒化ガリウム系化合物半導体を窒化
物半導体という。)の結晶成長方法に係り、特に、基板
上に直接またはバッファ層を介して窒化物半導体の結晶
を成長させる方法に関する。
BACKGROUND OF THE INVENTION The present invention is a light emitting diode, a gallium nitride-based compound is used in an electronic device such as a laser diode semiconductor (In X Al Y Ga 1- XY N, 0 ≦ X, 0 ≦
Y, X + Y ≦ 1, hereinafter a gallium nitride-based compound semiconductor is referred to as a nitride semiconductor. In particular, the present invention relates to a method for growing a nitride semiconductor crystal on a substrate directly or via a buffer layer.

【0002】[0002]

【従来の技術】青色、紫外に発光するレーザダイオー
ド、発光ダイオードの材料として窒化物半導体(InX'
AlY'Ga1-X'-Y'N、0≦X'、0≦Y'、X'+Y'≦1)
が注目されており、最近この材料で光度1cdの青色発
光ダイオードが実用化されたばかりである。この青色発
光ダイオードは図1に示すように、サファイアよりなる
基板1の表面に、GaNよりなるバッファ層2と、Ga
Nよりなるn型層3と、AlGaNよりなるn型クラッ
ド層4と、InGaNよりなる活性層5と、AlGaN
よりなるp型クラッド層6と、GaNよりなるp型コン
タクト層7とが順に積層された構造を有している。
2. Description of the Related Art Laser diodes emitting blue and ultraviolet light and nitride semiconductors (In X '
Al Y ′ Ga 1−X′−Y ′ N, 0 ≦ X ′, 0 ≦ Y ′, X ′ + Y ′ ≦ 1)
Recently, a blue light emitting diode with a luminous intensity of 1 cd has just been put to practical use with this material. As shown in FIG. 1, the blue light emitting diode has a buffer layer 2 made of GaN and a Ga layer on a surface of a substrate 1 made of sapphire.
An n-type layer 3 of N, an n-type cladding layer 4 of AlGaN, an active layer 5 of InGaN,
And a p-type contact layer 7 made of GaN.

【0003】窒化物半導体素子は、一般にMOVPE
(有機金属気相エピタキシャル)法、MBE(分子線エ
ピタキシャル)法、HDVPE(ハイドライド気相エピ
タキシャル)法等の気相成長法を用い、基板表面に窒化
物半導体層を積層させることにより得られる。基板には
サファイア、ZnO、SiC、GaAs、MgO等の材
料が使用される。基板の表面にはバッファ層を介してn
型の窒化物半導体(InXAlYGa1-X-YN、0≦X、0
≦Y、X+Y≦1、その中でも特にn型GaN、n型Al
GaNが多い。)が成長される。また、SiC、ZnO
のように窒化物半導体と格子定数の近い基板を用いる場
合には、バッファ層を形成せず、基板に直接n型窒化物
半導体が成長されることもある。基本的には、基板の表
面にまずn型窒化物半導体層を成長させることにより、
発光素子、受光素子等の窒化物半導体素子が作製され
る。
[0003] A nitride semiconductor device is generally a MOVPE.
It is obtained by laminating a nitride semiconductor layer on the substrate surface using a vapor phase growth method such as (organic metal vapor phase epitaxy), MBE (molecular beam epitaxy), or HDVPE (hydride vapor phase epitaxy). Materials such as sapphire, ZnO, SiC, GaAs, and MgO are used for the substrate. N is provided on the surface of the substrate via a buffer layer.
Type nitride semiconductor (In X Al Y Ga 1 -XYN , 0 ≦ X, 0
≦ Y, X + Y ≦ 1, among which n-type GaN and n-type Al
Mostly GaN. ) Will be grown. Also, SiC, ZnO
When a substrate having a lattice constant close to that of a nitride semiconductor is used, an n-type nitride semiconductor may be directly grown on the substrate without forming a buffer layer. Basically, by first growing an n-type nitride semiconductor layer on the surface of the substrate,
A nitride semiconductor device such as a light emitting device and a light receiving device is manufactured.

【0004】例えばMOVPE法によると、窒化物半導
体は、原料ガスにGa源、Al源、In源となる有機金
属化合物ガスと、N源となるアンモニアガスとが用いら
れる。これらの原料ガスを加熱した基板表面に接触させ
ることにより原料ガスを分解して、基板上に窒化物半導
体がエピタキシャル成長される。バッファ層には通常G
aN、AlN、GaAlN等が選択され、300℃〜9
00℃の温度で10オングストローム〜0.1μmの厚
さで成長される。バッファ層の上に成長するn型窒化物
半導体層は900℃以上の温度で、通常1μm以上、4
μm以下の膜厚で成長される。
For example, according to the MOVPE method, as a nitride semiconductor, an organic metal compound gas serving as a Ga source, an Al source, and an In source and an ammonia gas serving as an N source are used as source gases. By bringing these source gases into contact with the heated substrate surface, the source gases are decomposed, and a nitride semiconductor is epitaxially grown on the substrate. Normally G
aN, AlN, GaAlN, etc. are selected,
It is grown at a temperature of 00 ° C. with a thickness of 10 Å to 0.1 μm. The n-type nitride semiconductor layer grown on the buffer layer is usually at least 1 μm at a temperature of 900 ° C. or more.
It is grown with a thickness of less than μm.

【0005】[0005]

【発明が解決しようとする課題】窒化物半導体は、完全
に格子整合する基板がないため、非常にエピタキシャル
成長させにくい結晶であることが知られている。従っ
て、従来ではSiC基板のように、成長させようする窒
化物半導体の格子定数に近い基板を利用するか、または
格子不整合を緩和するバッファ層を介して無理矢理エピ
タキシャル成長されてきた。
It is known that a nitride semiconductor is a crystal that is very difficult to grow epitaxially because there is no substrate that is perfectly lattice-matched. Therefore, conventionally, a substrate close to the lattice constant of the nitride semiconductor to be grown, such as a SiC substrate, has been used, or epitaxial growth has been forcibly performed via a buffer layer that reduces lattice mismatch.

【0006】格子整合しない基板の表面に成長したn型
窒化物半導体の結晶の模式断面図を一例として図2に示
す。これはジャーナル オブ クリスタル グロウス
{Jounal of Crystal Growth, 115, (1991) P628−63
3}より引用したものであり、サファイア基板の表面に
AlNよりなるバッファ層を介してn型GaNをエピタ
キシャル成長させ、その断面をTEM(transmission e
lectron microscopy)で測定して、そのTEM像から結
晶の構造を模式的に示したものである。この図による
と、基板上に配向性が整っていないバッファ層が柱状に
成長されており、そのバッファ層の上にGaNをエピタ
キシャル成長させると、そのバッファ層の一部が種結晶
のような役割を果たして、徐々にGaNの配向性が整う
ことにより、結晶性がよくなったGaN層が成長される
ことを示している。
FIG. 2 shows, as an example, a schematic cross-sectional view of an n-type nitride semiconductor crystal grown on the surface of a substrate that does not have lattice matching. This is the Journal of Crystal Growth, 115, (1991) P628−63.
3), n-type GaN is epitaxially grown on the surface of a sapphire substrate via a buffer layer made of AlN, and its cross section is TEM (transmission e).
(electron microscopy) and schematically shows the crystal structure from the TEM image. According to this figure, a buffer layer with poor orientation is grown on the substrate in a columnar shape, and when GaN is epitaxially grown on the buffer layer, a part of the buffer layer plays a role like a seed crystal. This shows that the GaN layer with improved crystallinity is grown by gradually adjusting the orientation of GaN.

【0007】しかしながら、完全に結晶欠陥の無いGa
Nを成長させることは難しく、図2の破線に示すような
多数の結晶欠陥が、バッファ層とGaN層との界面か
ら、GaN層表面に達するまで伸びている。この欠陥は
結晶の内部で止まるものもあるが、GaN層表面にまで
達するものは、表面で例えば107〜109個/cm2
る。同様に図1の発光ダイオード素子においても、n型
層3の結晶中では同様の現象が発生している。
However, Ga which is completely free from crystal defects
It is difficult to grow N, and many crystal defects as shown by broken lines in FIG. 2 extend from the interface between the buffer layer and the GaN layer until reaching the GaN layer surface. Some of these defects stop inside the crystal, but those reaching the surface of the GaN layer are, for example, 10 7 to 10 9 / cm 2 at the surface. Similarly, in the light emitting diode element of FIG. 1, the same phenomenon occurs in the crystal of the n-type layer 3.

【0008】基板の表面に成長したn型窒化物半導体層
の表面に多数の結晶欠陥があると、その欠陥がn型層の
表面に成長するクラッド層、活性層等、全ての半導体層
に受け継がれ、素子構造全体に悪影響を及ぼすという問
題がある。結晶欠陥の多い素子は、例えば上記のような
発光ダイオードとした場合に、発光出力、寿命等の素子
性能に悪影響を及ぼすという欠点がある。
When a large number of crystal defects are present on the surface of the n-type nitride semiconductor layer grown on the surface of the substrate, the defects are inherited by all the semiconductor layers such as the cladding layer and active layer growing on the surface of the n-type layer. This has the problem of adversely affecting the entire element structure. An element having a large number of crystal defects has a disadvantage that, for example, when the above-described light emitting diode is used, the element performance such as light emission output and life is adversely affected.

【0009】基板の表面にまずn型窒化物半導体層を成
長させるにあたり、結晶欠陥の少ないn型結晶を成長さ
せることが非常に重要であり、それを実現できれば、そ
のn型結晶の上に成長させるクラッド層、活性層等の結
晶欠陥が少なくなるので、窒化物半導体より成るあらゆ
る素子の性能を向上させることができる。従って、本発
明はこのような事情を鑑みなされたものであり、MOV
PE、MBE法等の気相成長法により、完全に格子整合
していない基板の表面にn型窒化物半導体層を成長させ
る際に、そのn型窒化物半導体層の格子欠陥を少なくし
て成長させる方法を提供することを目的とする。
In growing an n-type nitride semiconductor layer on the surface of a substrate, it is very important to grow an n-type crystal having few crystal defects. Since the number of crystal defects in the clad layer, active layer, and the like is reduced, the performance of any device made of a nitride semiconductor can be improved. Accordingly, the present invention has been made in view of such circumstances, and the MOV
When growing an n-type nitride semiconductor layer on the surface of a substrate that is not completely lattice-matched by a vapor phase growth method such as PE or MBE, the growth is performed by reducing lattice defects in the n-type nitride semiconductor layer. It is intended to provide a method for causing this to occur.

【0010】[0010]

【課題を解決するための手段】本発明の方法は、気相成
長法により基板表面に直接、または第1のバッファ層を
介して窒化物半導体(InXAlYGa1-X-YN、0≦X、
0≦Y、X+Y≦1)の結晶を成長させる方法において、
第1のn型窒化物半導体層成長後、InaGa1-aN(0
<a≦1)、またはAlbGa1-bN(0<b≦1)、また
は互いに組成の異なるAlbGa1-bN(0≦b≦1)の
薄膜を積層した多層膜の内のいずれか一種類を含む第2
のn型窒化物半導体よりなる第2のバッファ層を少なく
とも一層以上成長させ、その第2のバッファ層の上に、
前記第1のn型窒化物半導体層と同一組成を有するn型
窒化物半導体層を成長させ、さらにその上にInGaN
よりなる活性層を成長させることを特徴とする。
According to the method of the present invention, a nitride semiconductor (In X Al Y Ga 1 -XYN , 0 ≦ 0) is directly formed on a substrate surface by a vapor phase growth method or via a first buffer layer. X,
In a method of growing a crystal satisfying 0 ≦ Y, X + Y ≦ 1),
After growing the first n-type nitride semiconductor layer, In a Ga 1-a N (0
<A ≦ 1), Al b Ga 1-b N (0 <b ≦ 1), or a multilayer film in which thin films of Al b Ga 1-b N (0 ≦ b ≦ 1) having different compositions are stacked. The second containing any one of the following
A second buffer layer made of an n-type nitride semiconductor is grown at least one layer above, and on the second buffer layer,
An n-type nitride semiconductor layer having the same composition as the first n-type nitride semiconductor layer is grown, and further an InGaN
And growing an active layer.

【0011】[0011]

【作用】本発明の方法において、n型窒化物半導体層の
中に、組成の異なる第2の窒化物半導体層を形成する
と、第2の窒化物半導体が緩衝層、即ちバッファ層とし
て作用するので、バッファ層で結晶欠陥を緩和できると
考えられる(以下本明細書において、第2の窒化物半導
体層を第2のバッファ層という)。詳しく述べると、n
型窒化物半導体層が基板上に成長される場合、基板と窒
化物半導体とのミスマッチが大きいため、成長中に図2
の破線に示すような結晶欠陥が結晶中に発生する。とこ
ろが、成長させようとするn型窒化物半導体層と組成の
異なる第2のバッファ層を中間層として介在させること
により、n型窒化物半導体層の連続した結晶欠陥が、組
成が異なる第2のバッファ層で一時的に止まる。次に、
第2のバッファ層の表面にn型窒化物半導体を成長させ
る際は、その第2のバッファ層がミスマッチの少ない基
板のような作用をするため、第2のバッファ層の上に成
長させるn型窒化物半導体の結晶性がよくなると推察さ
れる。
In the method of the present invention, when a second nitride semiconductor layer having a different composition is formed in an n-type nitride semiconductor layer, the second nitride semiconductor acts as a buffer layer, that is, a buffer layer. It is considered that crystal defects can be reduced by the buffer layer (hereinafter, the second nitride semiconductor layer is referred to as a second buffer layer in the present specification). Specifically, n
When the type nitride semiconductor layer is grown on a substrate, the mismatch between the substrate and the nitride semiconductor is large.
A crystal defect as shown by a broken line is generated in the crystal. However, by interposing, as an intermediate layer, a second buffer layer having a different composition from the n-type nitride semiconductor layer to be grown, continuous crystal defects of the n-type nitride semiconductor layer cause the second buffer layer having a different composition. Stops temporarily in the buffer layer. next,
When the n-type nitride semiconductor is grown on the surface of the second buffer layer, the second buffer layer acts like a substrate having a small mismatch, so that the n-type nitride semiconductor is grown on the second buffer layer. It is assumed that the crystallinity of the nitride semiconductor is improved.

【0012】第2のバッファ層は一層以上形成すればよ
く、その一層あたりの膜厚は10オングストローム
(0.001μm)以上、1μm以下、さらに好ましく
は0.001μm以上、0.1μm以下の範囲に調整す
ることが望ましい。0.001μmよりも薄いと、結晶
欠陥を第2のバッファ層で結晶欠陥を止めることが困難
となる傾向にある。また1μmよりも厚いと第2のバッ
ファ層から新たな結晶欠陥が発生しやすくなる傾向にあ
るからである。この第2のバッファ層はまた、一層の膜
厚が数十オングストロームで、それを2層以上積層した
多層膜とすることもできる。
The second buffer layer may be formed in one or more layers, and the thickness of one layer is in the range of 10 Å (0.001 μm) or more and 1 μm or less, more preferably 0.001 μm or more and 0.1 μm or less. It is desirable to adjust. If the thickness is smaller than 0.001 μm, it tends to be difficult to stop crystal defects in the second buffer layer. If the thickness is larger than 1 μm, new crystal defects tend to be easily generated from the second buffer layer. The second buffer layer may have a thickness of several tens angstroms, and may be a multilayer film in which two or more layers are stacked.

【0013】第2のバッファ層はInaGa1-aN(0<
a≦1)、もしくはAlbGa1-bN(0<b≦1)、また
は組成の異なるAlbGa1-bN(0≦b≦1)の薄膜を
積層した多層膜であることが望ましい。さらに好ましく
はa値が0.5以下のInaGa1-aNか、またはb値が
0.5以下のAlbGa1-bNを成長させる。なぜなら、
窒化物半導体では四元混晶の半導体層よりも、前記のよ
うな三元混晶の方が結晶性がよい。その中でも三元混晶
のInaGa1-aN、AlbGa1-bNにおいて、a値、お
よびb値を前記範囲に調整したバッファ層が、さらに結
晶性のよいものが得られるため、第2のバッファ層の結
晶欠陥が少なくなり、第2のバッファ層の上に成長する
n型窒化物半導体層の結晶欠陥が少なくなる。さらに、
第2のバッファ層を多層膜とすると結晶欠陥を非常によ
く止めることができる。最も好ましい組み合わせは、n
型窒化物半導体層がn型GaN(GaNが最も格子欠陥
が少ない。)、第2のバッファ層がn型InaGa1-a
(0<a≦0.5)か、若しくはn型AlbGa1-b
(0<b≦0.5)か、または組成の異なるAlbGa
1-bN(0≦b≦1)の薄膜を積層した多層膜(超格子)
である。
The second buffer layer is composed of In a Ga 1 -a N (0 <
a ≦ 1), Al b Ga 1-b N (0 <b ≦ 1), or a multilayer film in which thin films of Al b Ga 1-b N (0 ≦ b ≦ 1) having different compositions are stacked. desirable. More preferably, In a Ga 1-a N having an a value of 0.5 or less or Al b Ga 1-b N having a b value of 0.5 or less is grown. Because
In a nitride semiconductor, the ternary mixed crystal has better crystallinity than the quaternary semiconductor layer. In a Ga 1-a N ternary mixed crystal Among them, the Al b Ga 1-b N, a value, and the buffer layer a b value was adjusted to the range further for good crystallinity is obtained In addition, crystal defects of the second buffer layer are reduced, and crystal defects of the n-type nitride semiconductor layer grown on the second buffer layer are reduced. further,
When the second buffer layer is a multilayer film, crystal defects can be stopped very well. The most preferred combination is n
N-type GaN (GaN has the fewest lattice defects), and the second buffer layer is n-type In a Ga 1-a N
(0 <a ≦ 0.5) or n-type Al b Ga 1-b N
(0 <b ≦ 0.5) or Al b Ga having a different composition
1-b N (0 ≦ b ≦ 1) multilayer film (superlattice)
It is.

【0014】さらに、第2のバッファ層の電子キャリア
濃度は先に形成したn型窒化物半導体層とほぼ同一か、
またはそれより大きく調整することが望ましい。図3お
よび図4は本発明の方法により得られたn型窒化物半導
体層3”の上に、nクラッド層4'、活性層5'、pクラ
ッド層6'、pコンタクト層7'を積層して実際の発光素
子として、その発光素子の構造を断面図でもって示した
図である。図3は、第2のバッファ層33が、負電極形
成用のn型層のエッチング面よりも活性層5'側にある
のに対し、図4は第2のバッファ層33がエッチング面
よりも基板1'側に形成された点で異なっている。例え
ば、図3に示すような発光素子を実現した場合、つまり
第2のバッファ層33の位置が、負電極を形成すべきエ
ッチング面よりも活性層側に近い位置にあるような素子
を実現した場合、第2のバッファ層33の電子キャリア
濃度がn型層3'よりも小さいと、第2のバッファ層で
nからpへ供給される電子が阻止されて、n型層からp
層に電流が流れにくくなり、素子の性能が悪くなる。逆
に、第2のバッファ層33の電子キャリア濃度がn型層
3よりも大きいと、電子は第2のバッファ層33に均一
に広がりやすくなるので、均一な発光を得ることができ
る。一方、図4のような素子であると、第2のバッファ
層33の電子キャリア濃度は小さくても、電流は電子キ
ャリア濃度の大きいn型層3”の方を流れるので、発光
素子の特性にはほとんど影響がないが、逆に第2のバッ
ファ層33の電子キャリア濃度が大きい場合は、電流は
第2のバッファ層33の方に流れやすくなって、均一な
発光が得られる。従って、第2のバッファ層33の電子
キャリア濃度は先に形成したn型窒化物半導体層とほぼ
同一か、またはそれより大きく調整することが好まし
い。
Further, the electron carrier concentration of the second buffer layer is substantially the same as that of the previously formed n-type nitride semiconductor layer.
Or it is desirable to adjust larger. FIGS. 3 and 4 show that an n-cladding layer 4 ', an active layer 5', a p-cladding layer 6 ', and a p-contact layer 7' are laminated on the n-type nitride semiconductor layer 3 "obtained by the method of the present invention. 3 is a cross-sectional view showing the structure of the light emitting device as an actual light emitting device, wherein the second buffer layer 33 is more active than the etched surface of the n-type layer for forming the negative electrode. 4 differs from the layer 5 'in that the second buffer layer 33 is formed closer to the substrate 1' than the etched surface.For example, a light emitting device as shown in FIG. In other words, when an element is realized in which the position of the second buffer layer 33 is closer to the active layer side than the etching surface on which the negative electrode is to be formed, the electron carrier concentration of the second buffer layer 33 is Is smaller than the n-type layer 3 ′, n is supplied from n to p in the second buffer layer. Electrons are blocked and p-type
Current hardly flows through the layer, and the performance of the device deteriorates. Conversely, if the electron carrier concentration of the second buffer layer 33 is higher than that of the n-type layer 3, electrons are likely to spread uniformly in the second buffer layer 33, so that uniform light emission can be obtained. On the other hand, in the device as shown in FIG. 4, even if the electron carrier concentration of the second buffer layer 33 is low, the current flows through the n-type layer 3 ″ having a high electron carrier concentration. Has almost no effect, but conversely, if the electron carrier concentration of the second buffer layer 33 is high, the current tends to flow toward the second buffer layer 33, and uniform light emission is obtained. The electron carrier concentration of the second buffer layer 33 is preferably adjusted to be substantially the same as or higher than that of the n-type nitride semiconductor layer formed earlier.

【0015】本発明において、基板上に成長させるn型
窒化物半導体(InXAlYGa1-X-YN、0≦X、0≦
Y、X+Y≦1)は、Y値が0≦Y≦0.5の範囲のAlY
1-YN、さらに好ましくは0.3以下のAlYGa1-Y
N、最も好ましくはY=0のGaNを成長させる。なぜ
なら、前記のように四元混晶の窒化物半導体より、三元
混晶の窒化物半導体の方が結晶欠陥が少ないからであ
る。さらに、発光素子、受光素子等の電子デバイスとし
てn型窒化物半導体を利用する際には、まず基板上に成
長させるn型窒化物半導体は、バンドギャップの小さい
InGaNよりもバンドギャップの大きいAlGaN、
GaNの方がシングルへテロ、ダブルへテロ等種々の構
造を実現する上で好都合であるからである。その中で
も、特にAlGaNはAlを含有させるほど結晶欠陥が
多くなる傾向にあり、GaNが最も結晶欠陥の少ないn
型窒化物半導体層を成長できる傾向にある。
In the present invention, an n-type nitride semiconductor (In X Al Y Ga 1 -XYN , 0 ≦ X, 0 ≦
Y, X + Y ≦ 1) means Al Y G in which the Y value is in the range of 0 ≦ Y ≦ 0.5.
a 1-Y N, more preferably 0.3 or less Al Y Ga 1-Y
Grow N, most preferably Y = 0 GaN. This is because the ternary mixed crystal nitride semiconductor has fewer crystal defects than the quaternary mixed crystal nitride semiconductor as described above. Further, when an n-type nitride semiconductor is used as an electronic device such as a light-emitting element and a light-receiving element, first, an n-type nitride semiconductor grown on a substrate is made of AlGaN having a larger band gap than InGaN having a small band gap,
This is because GaN is more convenient for realizing various structures such as single hetero and double hetero. Among them, especially, AlGaN tends to have more crystal defects as Al is contained, and GaN has n which has the fewest crystal defects.
Type nitride semiconductor layers tend to grow.

【0016】さらにまた、本発明において、基板にはサ
ファイア、GaAs、Si、ZnO、SiC等の材料が
使用できるが、一般的にはサファイアを用いる。サファ
イアを基板とする場合には、基板にはバッファ層を成長
させることが好ましいが、サファイア基板の面方位によ
ってはバッファ層無しでも成長可能である。好ましくバ
ッファ層を成長させることにより、格子欠陥を計測でき
るような平滑で鏡面状のn型窒化物半導体の結晶を得る
ことができる。また、窒化物半導体をn型にするにはノ
ンドープの状態で、またはSi、Ge、C等のドナー不
純物を結晶成長中にドープすることにより実現可能であ
る。
Furthermore, in the present invention, a material such as sapphire, GaAs, Si, ZnO, or SiC can be used for the substrate, but sapphire is generally used. When sapphire is used as a substrate, it is preferable to grow a buffer layer on the substrate. However, depending on the plane orientation of the sapphire substrate, growth can be performed without a buffer layer. By preferably growing the buffer layer, it is possible to obtain a smooth and mirror-like n-type nitride semiconductor crystal capable of measuring lattice defects. The n-type nitride semiconductor can be realized in a non-doped state or by doping a donor impurity such as Si, Ge, or C during crystal growth.

【0017】[0017]

【実施例】以下、MOVPE法による本発明の方法を詳
説する。 [実施例1] まず、よく洗浄したサファイア基板を反応容器内の
サセプターの上に設置する。容器内を真空排気した後、
水素ガスを容器内に流しながら、基板を1050℃で約
20分間加熱し表面の酸化物を除去して、基板のクリー
ニングを行う。その後サセプターの温度を500℃に調
整し、500℃においてGa源としてTMG(トリメチ
ルガリウムガス)、N源としてアンモニアガスを基板の
表面に流しながら、GaNよりなるバッファ層を0.0
2μmの膜厚で成長させる。
The method of the present invention by the MOVPE method will be described in detail below. [Example 1] First, a well-washed sapphire substrate is placed on a susceptor in a reaction vessel. After evacuating the container,
While flowing hydrogen gas into the container, the substrate is heated at 1050 ° C. for about 20 minutes to remove oxides on the surface, and the substrate is cleaned. Thereafter, the temperature of the susceptor was adjusted to 500 ° C., and at 500 ° C., TMG (trimethyl gallium gas) as a Ga source and ammonia gas as an N source were flowed over the surface of the substrate, and the buffer layer made of GaN was placed at 0.0 ° C.
It is grown to a thickness of 2 μm.

【0018】 次に、TMGガスを止め、温度を10
50℃まで上昇させた後、TMGガス、SiH4ガスを
流し、Siドープn型GaN層を2μmの膜厚で成長さ
せる。
Next, the TMG gas is stopped and the temperature is set to 10
After the temperature is raised to 50 ° C., TMG gas and SiH 4 gas are flowed to grow a Si-doped n-type GaN layer to a thickness of 2 μm.

【0019】 次に、TMGガス、SiH4ガスを止
め温度を800℃にする。800℃になったらキャリア
ガスを窒素に切り替え、TMGガス、TMI(トリメチ
ルインジウム)、SiH4ガスを流し、第2のバッファ
層としてSiドープn型In0.1Ga0.9N層を0.01
μmの膜厚で成長させる。
Next, the TMG gas and the SiH 4 gas are stopped and the temperature is set to 800 ° C. When the temperature reaches 800 ° C., the carrier gas is switched to nitrogen, TMG gas, TMI (trimethylindium), and SiH 4 gas are flown, and a Si-doped n-type In0.1Ga0.9N layer is formed as a second buffer layer by 0.01.
It is grown to a thickness of μm.

【0020】 In0.1Ga0.9N層成長後、再度温度
を1050℃まで上昇させ、キャリアガスを水素に戻し
てTMGガスおよびSiH4ガスを流し、同様にしてS
iドープn型GaN層を2μmの膜厚で成長させる。な
お第2のバッファ層のキャリア濃度とこのn型GaN層
のキャリア濃度はほぼ同一とした。
After the growth of the In0.1Ga0.9N layer, the temperature is raised again to 1050 ° C., the carrier gas is returned to hydrogen, TMG gas and SiH 4 gas are flown, and S
An i-doped n-type GaN layer is grown to a thickness of 2 μm. Note that the carrier concentration of the second buffer layer and the carrier concentration of this n-type GaN layer were almost the same.

【0021】成長後、基板を反応容器から取り出し、最
上層のn型GaN層の表面をTEMで測定し、そのTE
M像より、単位面積あたりの結晶欠陥の数を計測したと
ころ、およそ1×104個/cm2であった。
After the growth, the substrate is taken out of the reaction vessel, the surface of the uppermost n-type GaN layer is measured by TEM, and its TE is measured.
When the number of crystal defects per unit area was measured from the M image, it was about 1 × 10 4 / cm 2 .

【0022】[実施例2] およびのn型窒化物半導体層の工程において、TM
G、TMA(トリメチルアルミニウム)、SiH4ガス
を用い、Siドープn型Al0.3Ga0.7N層をそれぞれ
2μmの膜厚で成長させて第2のバッファ層を挟む構造
とする他は、実施例1と同様に行う。その結果、同様に
して計測したところ、Siドープn型Al0.3Ga0.7N
層表面に達している結晶欠陥の数はおよそ5×105
/cm2であった。なお、Siドープn型Al0.3Ga0.7
N層の電子キャリア濃度は第2のバッファ層とほぼ同一
とした。
Example 2 In the step of forming the n-type nitride semiconductor layer,
Example 1 except that a second buffer layer was sandwiched by using G, TMA (trimethylaluminum), and SiH 4 gas to grow Si-doped n-type Al0.3Ga0.7N layers to a thickness of 2 μm each. Perform in the same way as As a result, when the measurement was performed in the same manner, the Si-doped n-type Al0.3Ga0.7N
The number of crystal defects reaching the surface of the layer was about 5 × 10 5 / cm 2 . Note that Si-doped n-type Al0.3Ga0.7
The electron carrier concentration of the N layer was almost the same as that of the second buffer layer.

【0023】[実施例3] のn型窒化物半導体層の工程と同様にしてSiドープ
n型GaN層を1μmの膜厚で成長させる。次にの第
2のバッファ層の工程と同様にして、第2のバッファ層
としてSiドープn型In0.1Ga0.9N層を50オング
ストロームの膜厚で成長させる。さらに、のn型窒化
物半導体層の工程と同様にして同じくSiドープn型G
aN層を1μmの膜厚で順に成長させる。
A Si-doped n-type GaN layer is grown to a thickness of 1 μm in the same manner as in the step of forming the n-type nitride semiconductor layer in the third embodiment. Next, a Si-doped n-type In0.1Ga0.9N layer is grown to a thickness of 50 angstroms as a second buffer layer in the same manner as the second buffer layer. Further, similarly to the step of the n-type nitride semiconductor layer,
An aN layer is sequentially grown to a thickness of 1 μm.

【0024】さらに、Siドープn型GaN層の上に
の工程と同様にして、第3のバッファ層としてSiドー
プn型In0.1Ga0.9N層を50オングストロームの膜
厚でもう一度成長させた後、最後にの工程と同様にし
てSiドープGaN層を2μmの膜厚で成長させる。つ
まり実施例3では、サファイア基板の表面にGaNバッ
ファ層200オングストローム、n型GaN層1μm、
Siドープn型In0.1Ga0.9N第2バッファ層50オ
ングストローム、n型GaN層1μm、Siドープn型
In0.1Ga0.9N第3バッファ層50オングストロー
ム、n型GaN層2μmを順に積層した。
Further, in the same manner as in the step on the Si-doped n-type GaN layer, a Si-doped n-type In0.1Ga0.9N layer is grown once more as a third buffer layer to a thickness of 50 angstroms. As in the last step, a Si-doped GaN layer is grown to a thickness of 2 μm. That is, in Example 3, the GaN buffer layer 200 Å, the n-type GaN layer 1 μm,
An Si-doped n-type In0.1Ga0.9N second buffer layer 50 Å, an n-type GaN layer 1 μm, a Si-doped n-type In0.1Ga0.9N third buffer layer 50 Å, and an n-type GaN layer 2 μm were sequentially stacked.

【0025】その結果、最終層のSiドープn型GaN
層の表面に達している結晶欠陥の数はおよそ1×104
個/cm2であった。なお第2のバッファ層と第3のバッ
ファ層とSiドープn型GaN層との電子キャリア濃度
はほぼ同一とした。
As a result, the final layer of Si-doped n-type GaN
The number of crystal defects reaching the surface of the layer is approximately 1 × 10 4
Pieces / cm 2 . The electron carrier concentrations of the second buffer layer, the third buffer layer, and the Si-doped n-type GaN layer were almost the same.

【0026】[実施例4] の第2のバッファ層の工程において、成長温度を変化
させずTMG、TMA(トリメチルアルミニウム)、S
iH4ガスを用い、Siドープn型Al0.3Ga0.7N層
を0.01μmの膜厚で成長させて第2のバッファ層を
形成する他は、実施例1と同様に行う。その結果、同様
にして計測したところ、Siドープn型GaN層表面に
達している結晶欠陥の数はおよそ1×104個/cm2であ
った。なお、第2のバッファ層の電子キャリア濃度はS
iドープn型GaN層とほぼ同一とした。
[Embodiment 4] In the step of forming the second buffer layer in Example 4, TMG, TMA (trimethylaluminum), S
The same operation as in Example 1 is performed, except that a second buffer layer is formed by growing a Si-doped n-type Al0.3Ga0.7N layer to a thickness of 0.01 μm using iH 4 gas. As a result, the number of crystal defects reaching the surface of the Si-doped n-type GaN layer was approximately 1 × 10 4 / cm 2 as measured in the same manner. Note that the electron carrier concentration of the second buffer layer is S
It was almost the same as the i-doped n-type GaN layer.

【0027】[実施例5] の第2のバッファ層の工程において、成長温度を変化
させずTMG、TMA、SiH4ガスを用い、まずSi
ドープn型Al0.02Ga0.98N層を30オングストロー
ムの膜厚で成長させる。次にTMAガスを止め、Siド
ープn型GaN層を30オングストロームの膜厚で成長
させる。そして、この操作をそれぞれ5回繰り返し、3
0オングストロームのSiドープn型Al0.02Ga0.98
N層と、30オングストロームのn型GaN層とをそれ
ぞれ交互に5層づつ積層した多層膜を形成する。以上の
ようにして第2のバッファ層を形成する他は、実施例1
と同様に行う。その結果、格子欠陥を同様にして計測し
たところ、Siドープn型GaN層表面に達している結
晶欠陥の数はおよそ5×103個/cm2であった。なお、
第2のバッファ層である多層膜の電子キャリア濃度は、
Siドープn型GaN層とほぼ同一とした。
[Fifth Embodiment] In the step of forming the second buffer layer in the fifth embodiment, the TMG, TMA, and SiH 4 gases are used without changing the growth temperature.
A doped n-type Al0.02Ga0.98N layer is grown to a thickness of 30 angstroms. Next, the TMA gas is stopped, and a Si-doped n-type GaN layer is grown to a thickness of 30 Å. Then, this operation is repeated five times, and 3
0 Å of Si-doped n-type Al0.02Ga0.98
A multilayer film is formed by alternately laminating five N layers and 30 Å n-type GaN layers. Example 1 except that the second buffer layer was formed as described above.
Perform in the same manner as described above. As a result, when the lattice defects were measured in the same manner, the number of crystal defects reaching the surface of the Si-doped n-type GaN layer was about 5 × 10 3 / cm 2 . In addition,
The electron carrier concentration of the multilayer film as the second buffer layer is:
It was almost the same as the Si-doped n-type GaN layer.

【0028】[実施例6] 実施例2の工程において、第2のバッファ層としてSi
ドープn型Al0.1GaGa0.9Nを0.01μmの膜厚
で成長させる他は同様にして、Siドープn型Al0.3
Ga0.7N層を成長させた。その結果、最表面のn型A
l0.3Ga0.7N層に達していた格子欠陥の数はおよそ1
×105/cm2であった。なおこの実施例の電子キャリア
濃度もほぼ同一とした。
Example 6 In the process of Example 2, Si was used as the second buffer layer.
Similarly, except that a doped n-type Al0.1GaGa0.9N is grown to a thickness of 0.01 μm, a Si-doped n-type Al0.3
A Ga0.7N layer was grown. As a result, the uppermost n-type A
The number of lattice defects reaching the l0.3Ga0.7N layer is about 1
× 10 5 / cm 2. The electron carrier concentration in this example was also substantially the same.

【0029】[比較例1] 実施例1において、第2のバッファ層を成長させず、連
続してSiドープn型GaN層を4μmの膜厚で成長さ
せたところ、n型GaN層の表面に達した結晶欠陥の数
はおよそ1×107個/cm2であった。
Comparative Example 1 In Example 1, the Si-doped n-type GaN layer was continuously grown to a thickness of 4 μm without growing the second buffer layer. The number of reached crystal defects was about 1 × 10 7 / cm 2 .

【0030】[実施例7] 実際の発光素子の構造とした実施例を示す。実施例1の
の工程の後に以下の工程を加えた。 Siドープn
型GaN層成長後、新たにTMA(トリメチルアルミニ
ウム)ガスを加え、同じく1050℃で、nクラッド層
としてSiドープn型Al0.2Ga0.8N層を0.1μm
の膜厚で成長させる。
[Embodiment 7] An embodiment in which the structure of an actual light emitting element is used will be described. The following steps were added after the steps of Example 1. Si doped n
After the growth of the n-type GaN layer, a new TMA (trimethylaluminum) gas is added, and at 1050 ° C., a Si-doped n-type Al0.2Ga0.8N layer is formed as an n-cladding layer by 0.1 μm.
It grows with the film thickness of.

【0031】 nクラッド層成長後、TMG、TM
A、SiH4ガスを止め、再び温度を800℃に設定し
て、TMG、TMI、SiH4ガスに加えてDEZ(ジ
エチルジンク)を流し、活性層としてSiおよびZnド
ープIn0.05Ga0.95N層を0.1μmの膜厚で成長さ
せる。
After growing the n-cladding layer, TMG, TM
A, the SiH 4 gas was stopped, the temperature was set again to 800 ° C., and in addition to TMG, TMI, and SiH 4 gas, DEZ (diethyl zinc) was flown, and an Si and Zn-doped In0.05Ga0.95N layer was formed as an active layer. It is grown to a thickness of 0.1 μm.

【0032】 活性層成長後、TMG、TMI、Si
4、DEZガスを止め、温度を1050℃にした後、
TMG、TMA、Cp2Mg(シクロペンタジエニルマ
グネシウム)ガスを流し、pクラッド層としてMgドー
プp型Al0.1Ga0.9N層を0.1μmの膜厚で成長さ
せる。
After growing the active layer, TMG, TMI, Si
After stopping H 4 and DEZ gas and setting the temperature to 1050 ° C.,
TMG, TMA, and Cp2Mg (cyclopentadienylmagnesium) gas are flowed, and a Mg-doped p-type Al0.1Ga0.9N layer is grown as a p-cladding layer to a thickness of 0.1 .mu.m.

【0033】 p型Al0.1Ga0.9N層成長後、TM
Aガスを止め、同じく1050℃でpコンタクト層とし
てMgドープp型GaN層を0.3μmの膜厚で成長さ
せる。
After growing the p-type Al0.1Ga0.9N layer, the TM
The A gas is stopped, and a Mg-doped p-type GaN layer is grown at 1050 ° C. as a p-contact layer with a thickness of 0.3 μm.

【0034】 以上のようにして得た素子のエッチン
グを行い、第2のバッファ層の次に成長したn型GaN
層を露出させ、pコンタクト層と、露出したSiドープ
n型GaN層とに電極を形成した。つまり図4に示すよ
うな構造の発光ダイオード素子とした。さらにこの素子
をリードフレームに取り付け、樹脂でモールドした。こ
の発光ダイオードは20mAにおいてVf3.6V、発
光波長450nmであり、光度3.0cd、発光出力は
3.5mWであった。
The device obtained as described above is etched and n-type GaN grown next to the second buffer layer is etched.
The layer was exposed, and electrodes were formed on the p-contact layer and the exposed Si-doped n-type GaN layer. That is, a light emitting diode element having a structure as shown in FIG. 4 was obtained. The device was mounted on a lead frame and molded with resin. This light-emitting diode had a Vf of 3.6 V, an emission wavelength of 450 nm, a luminous intensity of 3.0 cd, and an emission output of 3.5 mW at 20 mA.

【0035】[比較例2] 比較例1で成長させたSiドープGaN層の上に、実施
例7と同一の工程を行い、図1に示すような構造の発光
ダイオード素子としたところ、この発光ダイオードは2
0mAにおいてVf3.6V、発光波長450nmであ
ったが、光度は1.0cdであり、発光出力は1.2m
Wしかなかった。
Comparative Example 2 The same process as in Example 7 was performed on the Si-doped GaN layer grown in Comparative Example 1 to obtain a light emitting diode device having a structure as shown in FIG. Diode 2
At 0 mA, Vf was 3.6 V and the emission wavelength was 450 nm. The luminous intensity was 1.0 cd, and the emission output was 1.2 m.
There was only W.

【0036】このように本発明によると、結晶欠陥の少
ないn型層が得られるので、その上に積層するクラッド
層、活性層等の結晶欠陥が少なくなる。特に活性層の膜
厚は約0.2μm以下と薄いため、結晶欠陥の少ない結
晶を成長させることは非常に重要である。従って、結晶
欠陥の少ない結晶を成長できたことにより、従来の光度
1cd以上の光度を有し、発光出力に優れた発光ダイオ
ード素子を実現できる。
As described above, according to the present invention, an n-type layer having few crystal defects can be obtained, so that crystal defects such as a clad layer and an active layer laminated thereon can be reduced. In particular, since the thickness of the active layer is as thin as about 0.2 μm or less, it is very important to grow a crystal having few crystal defects. Therefore, since a crystal having few crystal defects can be grown, it is possible to realize a light-emitting diode element having a luminous intensity of 1 cd or more and excellent in light-emission output as in the related art.

【0037】[実施例9] Siドープn型GaN層の膜厚を5μmとする他は実施
例5と同様にして結晶成長を行ったところ、n型GaN
層表面の結晶欠陥の数はおよそ5×106個であった。
Example 9 Crystal growth was performed in the same manner as in Example 5 except that the thickness of the Si-doped n-type GaN layer was changed to 5 μm.
The number of crystal defects on the surface of the layer was about 5 × 10 6 .

【0038】[実施例10] 実施例5のの工程において、実施例2のと同様にし
てSiドープn型Al0.3Ga0.7N層を連続して10μ
mの厚さで成長させる他は同様にして結晶成長を行った
ところ、n型Al0.3Ga0.7N層表面の結晶欠陥の数
は、およそ3×106個/cm2であった。
[Embodiment 10] In the process of Embodiment 5, a Si-doped n-type Al0.3Ga0.7N layer was continuously formed by 10 μm in the same manner as in Embodiment 2.
Crystal growth was performed in the same manner except that the crystal was grown to a thickness of m. As a result, the number of crystal defects on the surface of the n-type Al0.3Ga0.7N layer was approximately 3 × 10 6 / cm 2 .

【0039】[実施例11] 実施例5で得られたSiドープGaN層の上に実施例7
と同様にして、nクラッド層、活性層、pクラッド層、
pコンタクト層を積層して、同様にして発光ダイオード
としたところ、その特性は実施例7のものとほぼ同等で
あった。
Example 11 Example 7 was formed on the Si-doped GaN layer obtained in Example 5.
In the same manner as described above, the n clad layer, the active layer, the p clad layer,
When the p-contact layer was laminated to form a light emitting diode in the same manner, the characteristics were almost the same as those of the seventh embodiment.

【0040】[0040]

【発明の効果】以上説明したように、本発明の方法によ
ると基板の表面に結晶欠陥の少ないn型窒化物半導体層
を成長させることができる。従って本発明の方法は、格
子整合する基板のない窒化物半導体にとって、結晶欠陥
の少ない結晶を積層し、発光素子、受光素子等の電子デ
バイスを実現するうえで、非常に有用である。
As described above, according to the method of the present invention, an n-type nitride semiconductor layer having few crystal defects can be grown on the surface of a substrate. Therefore, the method of the present invention is very useful for stacking crystals with few crystal defects and realizing electronic devices such as light-emitting elements and light-receiving elements for a nitride semiconductor having no lattice-matched substrate.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 従来の発光ダイオード素子の一構造を示す模
式断面図。
FIG. 1 is a schematic cross-sectional view showing one structure of a conventional light emitting diode element.

【図2】 基板の表面にAlNバッファ層を介してn型
GaN層を成長した際の結晶の構造を示す模式断面図。
FIG. 2 is a schematic cross-sectional view showing a crystal structure when an n-type GaN layer is grown on a surface of a substrate via an AlN buffer layer.

【図3】 本発明の方法により得られたn型窒化物半導
体層を有する発光ダイオード素子の一構造を示す模式断
面図。
FIG. 3 is a schematic cross-sectional view showing one structure of a light-emitting diode device having an n-type nitride semiconductor layer obtained by a method of the present invention.

【図4】 本発明の方法により得られたn型窒化物半導
体層を有する発光ダイオード素子の一構造を示す模式断
面図。
FIG. 4 is a schematic cross-sectional view showing one structure of a light-emitting diode device having an n-type nitride semiconductor layer obtained by the method of the present invention.

【符号の説明】[Explanation of symbols]

1、1’・・・基板 2、2'・
・・バッファ層 3、3'、3”・・・n型窒化物半導体層 4、4'・
・・n型クラッド層 5、5'・・・活性層 6、6'・
・・pクラッド層 7、7'・・・pコンタクト層 33・・・第2のバッファ層(第2の窒化物半導体層)
1, 1 '... substrate 2, 2'
..Buffer layers 3,3 ', 3 "... N-type nitride semiconductor layers 4,4'.
..N-type cladding layers 5, 5 '... Active layers 6, 6'
..P cladding layer 7, 7 '... p contact layer 33 ... second buffer layer (second nitride semiconductor layer)

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 33/00 H01S 3/18 JICSTファイル(JOIS)──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 33/00 H01S 3/18 JICST file (JOIS)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 気相成長法により基板表面に直接、また
は第1のバッファ層を介して窒化ガリウム系化合物半導
体(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y≦
1)の結晶を成長させる方法において、第1のn型窒化
ガリウム系化合物半導体層成長後、InaGa1-aN(0
<a≦1)、またはAlbGa1-bN(0<b≦1)、また
は互いに組成の異なるAlbGa1-bN(0≦b≦1)の
薄膜を積層した多層膜の内のいずれか一種類を含む第2
のn型窒化ガリウム系化合物半導体よりなる第2のバッ
ファ層を少なくとも一層以上成長させ、その第2のバッ
ファ層の上に、前記第1のn型窒化ガリウム系化合物半
導体層と同一組成を有するn型窒化ガリウム系化合物半
導体層を成長させ、さらにその上にInGaNよりなる
活性層を成長させることを特徴とする窒化ガリウム系化
合物半導体の結晶成長方法。
1. A gallium nitride-based compound semiconductor (In X Al Y Ga 1 -XYN , 0 ≦ X, 0 ≦ Y, X + Y ≦) directly on a substrate surface or via a first buffer layer by a vapor growth method.
In the method of growing a crystal according to 1), after growing a first n-type gallium nitride-based compound semiconductor layer, In a Ga 1 -aN (0
<A ≦ 1), Al b Ga 1-b N (0 <b ≦ 1), or a multilayer film in which thin films of Al b Ga 1-b N (0 ≦ b ≦ 1) having different compositions are stacked. The second containing any one of the following
A second buffer layer made of n-type gallium nitride-based compound semiconductor is grown at least one layer, and n having the same composition as the first n-type gallium nitride-based compound semiconductor layer is formed on the second buffer layer. A method for growing a gallium nitride-based compound semiconductor crystal, comprising: growing a gallium nitride-based compound semiconductor layer; and growing an active layer made of InGaN thereon.
【請求項2】 前記第2のバッファ層の一層あたりの膜
厚が1μm以下であることを特徴とする請求項1に記載
の窒化ガリウム系化合物半導体の結晶成長方法。
2. The method of growing a gallium nitride-based compound semiconductor according to claim 1, wherein the thickness of one layer of the second buffer layer is 1 μm or less.
JP22767994A 1994-06-24 1994-09-22 Crystal growth method of gallium nitride based compound semiconductor Expired - Fee Related JP2956489B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP22767994A JP2956489B2 (en) 1994-06-24 1994-09-22 Crystal growth method of gallium nitride based compound semiconductor
JP32938498A JP3548442B2 (en) 1994-09-22 1998-11-19 Gallium nitride based compound semiconductor light emitting device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14272094 1994-06-24
JP6-142720 1994-06-24
JP22767994A JP2956489B2 (en) 1994-06-24 1994-09-22 Crystal growth method of gallium nitride based compound semiconductor

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP32938498A Division JP3548442B2 (en) 1994-09-22 1998-11-19 Gallium nitride based compound semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPH0870139A JPH0870139A (en) 1996-03-12
JP2956489B2 true JP2956489B2 (en) 1999-10-04

Family

ID=26474636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22767994A Expired - Fee Related JP2956489B2 (en) 1994-06-24 1994-09-22 Crystal growth method of gallium nitride based compound semiconductor

Country Status (1)

Country Link
JP (1) JP2956489B2 (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8395165B2 (en) 2011-07-08 2013-03-12 Bridelux, Inc. Laterally contacted blue LED with superlattice current spreading layer
US8525221B2 (en) 2009-11-25 2013-09-03 Toshiba Techno Center, Inc. LED with improved injection efficiency
US8536601B2 (en) 2009-06-10 2013-09-17 Toshiba Techno Center, Inc. Thin-film LED with P and N contacts electrically isolated from the substrate
US8564010B2 (en) 2011-08-04 2013-10-22 Toshiba Techno Center Inc. Distributed current blocking structures for light emitting diodes
US8581267B2 (en) 2011-11-09 2013-11-12 Toshiba Techno Center Inc. Series connected segmented LED
US8624482B2 (en) 2011-09-01 2014-01-07 Toshiba Techno Center Inc. Distributed bragg reflector for reflecting light of multiple wavelengths from an LED
US8664679B2 (en) 2011-09-29 2014-03-04 Toshiba Techno Center Inc. Light emitting devices having light coupling layers with recessed electrodes
US8686430B2 (en) 2011-09-07 2014-04-01 Toshiba Techno Center Inc. Buffer layer for GaN-on-Si LED
US8698163B2 (en) 2011-09-29 2014-04-15 Toshiba Techno Center Inc. P-type doping layers for use with light emitting devices
US8865565B2 (en) 2011-08-02 2014-10-21 Kabushiki Kaisha Toshiba LED having a low defect N-type layer that has grown on a silicon substrate
US8916906B2 (en) 2011-07-29 2014-12-23 Kabushiki Kaisha Toshiba Boron-containing buffer layer for growing gallium nitride on silicon
US8994064B2 (en) 2011-09-03 2015-03-31 Kabushiki Kaisha Toshiba Led that has bounding silicon-doped regions on either side of a strain release layer
US9012921B2 (en) 2011-09-29 2015-04-21 Kabushiki Kaisha Toshiba Light emitting devices having light coupling layers
US9012939B2 (en) 2011-08-02 2015-04-21 Kabushiki Kaisha Toshiba N-type gallium-nitride layer having multiple conductive intervening layers
US9018643B2 (en) 2011-09-06 2015-04-28 Kabushiki Kaisha Toshiba GaN LEDs with improved area and method for making the same
US9130068B2 (en) 2011-09-29 2015-09-08 Manutius Ip, Inc. Light emitting devices having dislocation density maintaining buffer layers
US9142743B2 (en) 2011-08-02 2015-09-22 Kabushiki Kaisha Toshiba High temperature gold-free wafer bonding for light emitting diodes
US9159869B2 (en) 2011-08-03 2015-10-13 Kabushiki Kaisha Toshiba LED on silicon substrate using zinc-sulfide as buffer layer
US9178114B2 (en) 2011-09-29 2015-11-03 Manutius Ip, Inc. P-type doping layers for use with light emitting devices
US9343641B2 (en) 2011-08-02 2016-05-17 Manutius Ip, Inc. Non-reactive barrier metal for eutectic bonding process
US10174439B2 (en) 2011-07-25 2019-01-08 Samsung Electronics Co., Ltd. Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1160801C (en) 1995-11-06 2004-08-04 日亚化学工业株式会社 Nitride semiconductor device
JP2007049169A (en) * 1995-11-27 2007-02-22 Sumitomo Chemical Co Ltd Group iii-v compound semiconductor light emitting element
JP2007067397A (en) * 1995-11-27 2007-03-15 Sumitomo Chemical Co Ltd Method of manufacturing 3-5 group compound semiconductor
JP2002134787A (en) * 1996-04-26 2002-05-10 Sanyo Electric Co Ltd Light-emitting element and manufacturing method therefor
JP3448450B2 (en) 1996-04-26 2003-09-22 三洋電機株式会社 Light emitting device and method for manufacturing the same
US6677619B1 (en) 1997-01-09 2004-01-13 Nichia Chemical Industries, Ltd. Nitride semiconductor device
US6133589A (en) * 1999-06-08 2000-10-17 Lumileds Lighting, U.S., Llc AlGaInN-based LED having thick epitaxial layer for improved light extraction
JP3778765B2 (en) 2000-03-24 2006-05-24 三洋電機株式会社 Nitride-based semiconductor device and manufacturing method thereof
US6958497B2 (en) 2001-05-30 2005-10-25 Cree, Inc. Group III nitride based light emitting diode structures with a quantum well and superlattice, group III nitride based quantum well structures and group III nitride based superlattice structures
US7692182B2 (en) 2001-05-30 2010-04-06 Cree, Inc. Group III nitride based quantum well light emitting device structures with an indium containing capping structure
TW546855B (en) 2001-06-07 2003-08-11 Sumitomo Chemical Co Group 3-5 compound semiconductor and light emitting diode
US6822272B2 (en) 2001-07-09 2004-11-23 Nichia Corporation Multilayered reflective membrane and gallium nitride-based light emitting element
JP3909694B2 (en) * 2002-10-15 2007-04-25 パイオニア株式会社 Group 3 nitride semiconductor light emitting device and method of manufacturing the same
JP3839799B2 (en) 2003-08-06 2006-11-01 ローム株式会社 Semiconductor light emitting device
US7863623B2 (en) 2005-09-15 2011-01-04 Panasonic Corporation Semiconductor light emitting device
JP2007081180A (en) 2005-09-15 2007-03-29 Matsushita Electric Ind Co Ltd Semiconductor light-emitting element
JP4605064B2 (en) * 2006-03-24 2011-01-05 日亜化学工業株式会社 Nitride semiconductor light emitting device
US7769066B2 (en) 2006-11-15 2010-08-03 Cree, Inc. Laser diode and method for fabricating same
US7834367B2 (en) 2007-01-19 2010-11-16 Cree, Inc. Low voltage diode with reduced parasitic resistance and method for fabricating
KR100835116B1 (en) 2007-04-16 2008-06-05 삼성전기주식회사 Nitride semiconductor light emitting device
US9012937B2 (en) 2007-10-10 2015-04-21 Cree, Inc. Multiple conversion material light emitting diode package and method of fabricating same
JP2011040487A (en) * 2009-08-07 2011-02-24 Toyoda Gosei Co Ltd Method for manufacturing group-iii nitride semiconductor light emitting element
US8575592B2 (en) 2010-02-03 2013-11-05 Cree, Inc. Group III nitride based light emitting diode structures with multiple quantum well structures having varying well thicknesses
JP5948767B2 (en) * 2011-09-06 2016-07-06 日亜化学工業株式会社 Nitride semiconductor light emitting device
WO2017221519A1 (en) * 2016-06-20 2017-12-28 ソニー株式会社 Nitride semiconductor element, nitride semiconductor substrate, method for manufacturing nitride semiconductor element, and method for manufacturing nitride semiconductor substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
第54回応用物理学会学術講演会予稿集 第1分冊 30p−Zs−2 p.322

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8871539B2 (en) 2009-06-10 2014-10-28 Kabushiki Kaisha Toshiba Thin-film LED with P and N contacts electrically isolated from the substrate
US8536601B2 (en) 2009-06-10 2013-09-17 Toshiba Techno Center, Inc. Thin-film LED with P and N contacts electrically isolated from the substrate
US9142742B2 (en) 2009-06-10 2015-09-22 Kabushiki Kaisha Toshiba Thin-film LED with P and N contacts electrically isolated from the substrate
US8525221B2 (en) 2009-11-25 2013-09-03 Toshiba Techno Center, Inc. LED with improved injection efficiency
US9012953B2 (en) 2009-11-25 2015-04-21 Kabushiki Kaisha Toshiba LED with improved injection efficiency
US8684749B2 (en) 2009-11-25 2014-04-01 Toshiba Techno Center Inc. LED with improved injection efficiency
US8395165B2 (en) 2011-07-08 2013-03-12 Bridelux, Inc. Laterally contacted blue LED with superlattice current spreading layer
US10174439B2 (en) 2011-07-25 2019-01-08 Samsung Electronics Co., Ltd. Nucleation of aluminum nitride on a silicon substrate using an ammonia preflow
US8916906B2 (en) 2011-07-29 2014-12-23 Kabushiki Kaisha Toshiba Boron-containing buffer layer for growing gallium nitride on silicon
US8865565B2 (en) 2011-08-02 2014-10-21 Kabushiki Kaisha Toshiba LED having a low defect N-type layer that has grown on a silicon substrate
US9142743B2 (en) 2011-08-02 2015-09-22 Kabushiki Kaisha Toshiba High temperature gold-free wafer bonding for light emitting diodes
US9343641B2 (en) 2011-08-02 2016-05-17 Manutius Ip, Inc. Non-reactive barrier metal for eutectic bonding process
US9012939B2 (en) 2011-08-02 2015-04-21 Kabushiki Kaisha Toshiba N-type gallium-nitride layer having multiple conductive intervening layers
US9159869B2 (en) 2011-08-03 2015-10-13 Kabushiki Kaisha Toshiba LED on silicon substrate using zinc-sulfide as buffer layer
US8564010B2 (en) 2011-08-04 2013-10-22 Toshiba Techno Center Inc. Distributed current blocking structures for light emitting diodes
US9070833B2 (en) 2011-08-04 2015-06-30 Kabushiki Kaisha Toshiba Distributed current blocking structures for light emitting diodes
US8981410B1 (en) 2011-09-01 2015-03-17 Kabushiki Kaisha Toshiba Distributed bragg reflector for reflecting light of multiple wavelengths from an LED
US8624482B2 (en) 2011-09-01 2014-01-07 Toshiba Techno Center Inc. Distributed bragg reflector for reflecting light of multiple wavelengths from an LED
US8994064B2 (en) 2011-09-03 2015-03-31 Kabushiki Kaisha Toshiba Led that has bounding silicon-doped regions on either side of a strain release layer
US9018643B2 (en) 2011-09-06 2015-04-28 Kabushiki Kaisha Toshiba GaN LEDs with improved area and method for making the same
US8686430B2 (en) 2011-09-07 2014-04-01 Toshiba Techno Center Inc. Buffer layer for GaN-on-Si LED
US9130068B2 (en) 2011-09-29 2015-09-08 Manutius Ip, Inc. Light emitting devices having dislocation density maintaining buffer layers
US9012921B2 (en) 2011-09-29 2015-04-21 Kabushiki Kaisha Toshiba Light emitting devices having light coupling layers
US8698163B2 (en) 2011-09-29 2014-04-15 Toshiba Techno Center Inc. P-type doping layers for use with light emitting devices
US9178114B2 (en) 2011-09-29 2015-11-03 Manutius Ip, Inc. P-type doping layers for use with light emitting devices
US9299881B2 (en) 2011-09-29 2016-03-29 Kabishiki Kaisha Toshiba Light emitting devices having light coupling layers
US8664679B2 (en) 2011-09-29 2014-03-04 Toshiba Techno Center Inc. Light emitting devices having light coupling layers with recessed electrodes
US9490392B2 (en) 2011-09-29 2016-11-08 Toshiba Corporation P-type doping layers for use with light emitting devices
US9123853B2 (en) 2011-11-09 2015-09-01 Manutius Ip, Inc. Series connected segmented LED
US9391234B2 (en) 2011-11-09 2016-07-12 Toshiba Corporation Series connected segmented LED
US8581267B2 (en) 2011-11-09 2013-11-12 Toshiba Techno Center Inc. Series connected segmented LED

Also Published As

Publication number Publication date
JPH0870139A (en) 1996-03-12

Similar Documents

Publication Publication Date Title
JP2956489B2 (en) Crystal growth method of gallium nitride based compound semiconductor
JP3646649B2 (en) Gallium nitride compound semiconductor light emitting device
JP3548442B2 (en) Gallium nitride based compound semiconductor light emitting device
JP2932467B2 (en) Gallium nitride based compound semiconductor light emitting device
JP2917742B2 (en) Gallium nitride based compound semiconductor light emitting device and method of manufacturing the same
US7550368B2 (en) Group-III nitride semiconductor stack, method of manufacturing the same, and group-III nitride semiconductor device
JP2890396B2 (en) Nitride semiconductor light emitting device
JP2000232238A (en) Nitride semiconductor light-emitting element and manufacture thereof
JPH0983016A (en) Method for growing nitride semiconductor
JP2900990B2 (en) Nitride semiconductor light emitting device
US6462354B1 (en) Semiconductor device and semiconductor light emitting device
JP3269344B2 (en) Crystal growth method and semiconductor light emitting device
JP2891348B2 (en) Nitride semiconductor laser device
JP3366188B2 (en) Nitride semiconductor device
JP2918139B2 (en) Gallium nitride based compound semiconductor light emitting device
JP3371830B2 (en) Nitride semiconductor light emitting device
JP3767491B2 (en) Gallium nitride compound semiconductor light emitting device
JPH06260682A (en) Blue light-emitting element
JP2004014587A (en) Nitride compound semiconductor epitaxial wafer and light emitting element
JP3235440B2 (en) Nitride semiconductor laser device and method of manufacturing the same
JP3953077B2 (en) Gallium nitride compound semiconductor light emitting device
JP3888036B2 (en) Method for growing n-type nitride semiconductor
KR20070071905A (en) Method for fabricating gallium nitride-based light emitting device
JP3405334B2 (en) Nitride semiconductor device
JP3267250B2 (en) Nitride semiconductor light emitting device

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080723

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080723

Year of fee payment: 9

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090723

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090723

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090723

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100723

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100723

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110723

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110723

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120723

Year of fee payment: 13

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120723

Year of fee payment: 13

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120723

Year of fee payment: 13

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130723

Year of fee payment: 14

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees