JP2909489B2 - Circuit device and mounting method thereof - Google Patents
Circuit device and mounting method thereofInfo
- Publication number
- JP2909489B2 JP2909489B2 JP1204395A JP20439589A JP2909489B2 JP 2909489 B2 JP2909489 B2 JP 2909489B2 JP 1204395 A JP1204395 A JP 1204395A JP 20439589 A JP20439589 A JP 20439589A JP 2909489 B2 JP2909489 B2 JP 2909489B2
- Authority
- JP
- Japan
- Prior art keywords
- case
- light
- optical element
- integrated circuit
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Casings For Electric Apparatus (AREA)
- Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は計算機、機器制御回路等に用いられる光電気
集積回路(以下OEICという)及び/又は光素子の実装装
置及び実装方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an optical integrated circuit (hereinafter referred to as OEIC) and / or an optical element mounting apparatus and a mounting method used for a computer, an equipment control circuit and the like.
従来技術の一例を第8図による説明する。 An example of the prior art will be described with reference to FIG.
第8図において、PI(PLUG−IN)、と称されるプリン
ト基板2にIC、LSI、抵抗、コンデンサー等々の半導体
素子4を配置し、素子間をプリント回路6で電気的に結
合している。光素子を実装した場合は発光素子8の出力
である光を光用コネクター10、ファイバーケーブル12を
経由し、他のPI、2Aの光コネクター10Aを経由し、受光
素子14と結合されている。In FIG. 8, semiconductor elements 4 such as ICs, LSIs, resistors, capacitors and the like are arranged on a printed circuit board 2 called PI (PLUG-IN), and the elements are electrically connected by a printed circuit 6. . When an optical element is mounted, the light output from the light emitting element 8 is coupled to the light receiving element 14 via the optical connector 10 and the fiber cable 12, via the other PI, 2A optical connector 10A.
しかしながら従来の技術にあっては、プリント配線や
他の基板との接続部品であるファイバーケーブル、コネ
クタ、発光又は受光素子等が必要であり、多数の部品を
用いることはそれだけ性能上の信頼性に問題が生じやす
く、また作業性も悪くコストも高くなる。However, in the prior art, a fiber cable, a connector, a light-emitting or light-receiving element, and the like, which are components for connection with a printed wiring or another substrate, are required. Problems tend to occur, workability is poor, and costs are high.
また、電気信号は外乱の影響を受けやすく耐ノイズ性
能にも限界があった。In addition, electric signals are easily affected by disturbance, and there is a limit in noise resistance.
この発明の目的は上記問題点を解消するためになされ
たもので、耐熱、耐ノイズ、耐ガス、耐圧等の耐環境性
に優れ、性能的に信頼の高い、超高速処理の可能な小形
の回路実装装置及び方法を提供することである。An object of the present invention is to solve the above-described problems, and is excellent in heat resistance, noise resistance, gas resistance, environmental resistance such as pressure resistance, highly reliable in performance, and small in size capable of ultra-high-speed processing. A circuit mounting device and method are provided.
上記の目的を達成するために本発明の装置は、密閉さ
れた外部光の遮断されたケースの内壁面に、互いに光線
によって結合されるOEIC及び/又は光素子が配置したも
のであって、仕切板にOEICや光素子を取付けたものを該
ケース内に収納してもよいし、OEICや光素子を取付けた
ケースを玉手箱のように幾重にも重ねることができる。
また、ケースの中心部にメモリ、エネルギ源等の共通部
品を配置することもできる。更に、ケース内にプリズ
ム、鏡等の光伝達手段を具備したり、電気を光にあるい
は光を電気に変換するエネルギ変換素子を具備したもの
である。ケースには形状記憶合金又は形状記憶樹脂を用
いることができる。In order to achieve the above object, the device of the present invention comprises an OEIC and / or an optical element, which are coupled to each other by light beams, on the inner wall surface of a sealed case in which external light is blocked. The case in which the OEIC or the optical element is attached to the plate may be stored in the case, or the case in which the OEIC or the optical element is attached can be stacked in multiple layers like a ball case box.
In addition, common parts such as a memory and an energy source can be arranged at the center of the case. Further, a light transmission means such as a prism or a mirror is provided in the case, or an energy conversion element for converting electricity to light or light to electricity is provided. A shape memory alloy or a shape memory resin can be used for the case.
また、本発明による方法は、ケースの内面に互いに光
線によって結合されるOEIC及び/又は光素子が配置する
と共に、該ケースの中心部にメモリ又はエネルギ源等の
共通部品を配設し、該ケースを密閉して外部光を遮断す
る方法であり、このようなケースを多重に重ねる方法で
ある。ケースには形状記憶合金又は形状記憶樹脂を用
い、熱処理によって立体形状を記憶させ、平面状に展開
してOEICや光素子を配置することができる。Further, the method according to the present invention includes the steps of disposing an OEIC and / or an optical element which are coupled to each other by light beams on the inner surface of the case, and disposing a common part such as a memory or an energy source at the center of the case. This is a method of sealing off and blocking external light, and is a method of multiplexing such cases. A shape memory alloy or a shape memory resin is used for the case, and a three-dimensional shape is memorized by heat treatment.
上記構成によれば、OEICや光素子を立体的に配置する
ことができるので、接続部品を省略することができ、信
頼性の高い小形の装置にすることができる。また、密閉
することによって耐ガス性が向上し、例えば球形のケー
スにすることによって耐圧性も向上し、また、配線の省
略によって耐ノイズ性も向上する。更にケースの中心部
に共通部品を配置することによって、メモリやエネルギ
源からOEICや光素子への伝達を効率的に行うことができ
るので、作動の高速化が図れる。According to the above configuration, since the OEIC and the optical element can be arranged three-dimensionally, connecting parts can be omitted, and a small and highly reliable device can be obtained. Further, the gas resistance is improved by sealing, the pressure resistance is improved by, for example, a spherical case, and the noise resistance is improved by omitting the wiring. Further, by arranging the common components in the center of the case, the transmission from the memory or the energy source to the OEIC or the optical element can be performed efficiently, so that the operation can be speeded up.
また、ケースを形状記憶合金製又は形状記憶樹脂製と
することによって、密閉され外部光の遮断されたケース
を容易に製作することができる。Further, by making the case made of a shape memory alloy or a shape memory resin, it is possible to easily manufacture a sealed case in which external light is blocked.
以下、本発明のいくつかの実施例を図面に基づいて説
明する。尚、従来例と同一構造部分は同一符号を付して
その説明を省略する。Hereinafter, some embodiments of the present invention will be described with reference to the drawings. The same components as those of the conventional example are denoted by the same reference numerals, and description thereof is omitted.
(第1実施例) 第1図はケースが立方体の例で、図(a)は密閉され
外部光を遮断された暗箱30の全体像を示す斜視図、図
(b)は図(a)のA−A′線断面図、図(c)はOEIC
又は光素子の素子32を示す斜視図である。(First Embodiment) FIG. 1 shows an example of a cubic case. FIG. 1 (a) is a perspective view showing an entire image of a dark box 30 which is sealed and shielded from external light, and FIG. 1 (b) is a view of FIG. A-A 'cross-sectional view, and FIG.
3 is a perspective view showing an element 32 of the optical element. FIG.
第1図において、暗箱30の内壁面に素子32が取付けら
れている。立体的に配置された素子32間で光線34を導く
ために鏡36がコーナーに備えられている。このように組
立てることによって、電気配線やファイバーケーブルを
省略することができる。In FIG. 1, an element 32 is mounted on the inner wall surface of a dark box 30. Mirrors 36 are provided at the corners to guide light rays 34 between the three-dimensionally arranged elements 32. By assembling in this manner, electrical wiring and fiber cables can be omitted.
暗箱30の外面はシールド38が施され、アースに接続し
て耐ノイズ性を高めている。The outer surface of the dark box 30 is provided with a shield 38, which is connected to the ground to increase noise resistance.
素子32には、素子間を結合するため発光ダイオード、
レーザー等の発光部40、及び光スイッチ等の受光部42が
設けられている。素子32の内部回路で演算処理された結
果は発光部40から光線34に変換され、他の素子の受光部
42を経て演算処理される。The element 32 includes a light emitting diode for coupling between the elements,
A light emitting unit 40 such as a laser and a light receiving unit 42 such as an optical switch are provided. The result of the arithmetic processing in the internal circuit of the element 32 is converted from the light emitting section 40 into a light beam 34, and the light receiving section of another element is
The processing is performed through 42.
立体的に組立てることによって光線34を伝達する素子
32どうしの間隔を狭くすることができ、また、集光レン
ズ(図示せず)を用いて光が発散しないようにするなど
して、発光部40と受光部42とを直接結合する。素子32ど
うしが対面してない場合は鏡36やプリズムによって光線
34を導き結合されている。An element that transmits the light beam 34 by assembling three-dimensionally
The light-emitting unit 40 and the light-receiving unit 42 are directly connected to each other by, for example, reducing the interval between the light-receiving portions 32 and preventing light from diverging using a condenser lens (not shown). When the elements 32 are not facing each other, the light is
Lead 34 is combined.
(第2実施例) 第2図はケースが多面体の暗箱である第2の実施例の
断面を示すものである。Second Embodiment FIG. 2 shows a cross section of a second embodiment in which the case is a polyhedral dark box.
動作、作用は第1の実施例と同様であるが、暗箱30を
多面体にすることによって、素子32の実装密度が向上す
る。The operation and operation are the same as those of the first embodiment, but the mounting density of the elements 32 is improved by making the dark box 30 a polyhedron.
また、図では記載していないが暗箱30の中心部にメモ
リ、エネルギ源等の共通部品を配設することによって、
この共通部品と各素子32との間の光伝達が効率よく行わ
れる。Although not shown in the drawing, by disposing common parts such as a memory and an energy source in the center of the dark box 30,
Light transmission between the common component and each element 32 is efficiently performed.
第2図は六角形断面で記載されているが、第3図に示
すように球形に近い形状とすることによって耐圧性が更
に向上する。Although FIG. 2 shows a hexagonal cross section, as shown in FIG. 3, by adopting a shape close to a sphere, the pressure resistance is further improved.
(第3実施例) 第4図は多面体の暗箱を多重(図では3重)に重ねた
例である。Third Embodiment FIG. 4 shows an example in which polyhedral dark boxes are multiplexed (three in the figure).
内部多面体30Bの外壁面に素子32を取付け、最外部の
多面体30Aの内壁に取付けた素子32との間を前述の実施
例と同様に光線で結合する。内部多面体30B又は30Cの内
外壁面に取付けた素子どうしは電気又は光によって結合
する。図では電源46から最内部の多面体30Cにエネルギ
を供給するようになっている。The element 32 is mounted on the outer wall surface of the inner polyhedron 30B, and the light beam is coupled to the element 32 mounted on the inner wall of the outermost polyhedron 30A in the same manner as in the above-described embodiment. The elements mounted on the inner and outer wall surfaces of the internal polyhedron 30B or 30C are connected by electricity or light. In the figure, energy is supplied from the power supply 46 to the innermost polyhedron 30C.
本実施例によれば最内部の多面体から放射状に光で結
合され、光線の距離間隔も均等となるため、超高速演算
機のようにマルチプロセッサ形の回路実装に有効であ
る。According to this embodiment, the light is radially coupled from the innermost polyhedron and the distance between the light beams becomes uniform, so that it is effective for a multiprocessor type circuit mounting such as an ultra-high-speed computer.
本例は断面六角形状の多面体を重ねたが、第1実施例
の立方体を重ねてもよい。In this example, the polyhedrons having a hexagonal cross section are stacked, but the cubes of the first embodiment may be stacked.
(第4実施例) 第5図は第4の実施例を示すもので、第1実施例によ
る暗箱30を用い、同一面に取付けられた素子間は電気配
線44によって接続し、他面との回路接続を光によって結
合した電気・光混合回路である。(Fourth Embodiment) FIG. 5 shows a fourth embodiment, in which the dark box 30 according to the first embodiment is used, and the elements mounted on the same surface are connected by electric wiring 44, and are connected to the other surface. This is an electric / optical mixed circuit in which circuit connections are coupled by light.
本実施例においても装置をコンパクトに小型化するこ
とができる。Also in this embodiment, the apparatus can be made compact and small.
(第5実施例) 第6図は第5の実施例を示すもので、電源の供給も光
で行う例である。(Fifth Embodiment) FIG. 6 shows a fifth embodiment, in which power is also supplied by light.
第6図に示すように、大元の供給電源46からの電気を
半導体レーザー等のエネルギ変換素子48で電気から光エ
ネルギに変換し、光線34を受けたソーラー電池等のエネ
ルギ変換素子50で受けて光から電気エネルギに変換し各
素子内部の論理演算回路のエネルギにする。As shown in FIG. 6, the electricity from the main power supply 46 is converted from electricity into light energy by an energy conversion element 48 such as a semiconductor laser, and received by an energy conversion element 50 such as a solar battery that receives the light beam 34. To convert the light into electric energy to make the energy of a logical operation circuit inside each element.
(第6実施例) 第7図に第6の実施例を示す。(Sixth Embodiment) FIG. 7 shows a sixth embodiment.
本例は暗箱製造に関した例で形状記憶合金又は樹脂を
使い、立方体暗箱の例について次の様な手順で製造す
る。This example relates to the manufacture of a dark box, and uses a shape memory alloy or a resin, and manufactures a cubic dark box by the following procedure.
(1)形状記憶合金又は樹脂52を図(a)のように平板
状の形にする。(1) The shape memory alloy or resin 52 is formed into a flat plate shape as shown in FIG.
(2)図(a)の点線部54を折り曲げ、図(b)のよう
に立方体にした状態で熱を加え(又は冷す)て立方体の
形状を記憶させる。(2) The shape of the cube is memorized by applying heat (or cooling) in a cubic shape as shown in FIG.
(3)この状態から再び冷して(又は熱を加え)図
(c)のように平板状に展開する。(3) After cooling (or applying heat) again from this state, the sheet is developed into a flat plate as shown in FIG.
(4)次いて、図(d)に示すように、この平板にOEI
C、光素子等の素子32を取付ける。(4) Next, as shown in FIG.
C, an element 32 such as an optical element is mounted.
(5)再度熱を加え(又は冷す)て図(e)に示すよう
に、記憶した立方体にする。(5) Heat is again applied (or cooled) to make a memorized cube as shown in FIG.
(6)内部に冷媒、N2ガス等を封入し、縁を溶接56等で
密封する。(6) Refrigerant, N 2 gas, etc. are sealed inside, and the edges are sealed with welding 56 or the like.
これらの実施例によれば次のような効果がある。 According to these embodiments, the following effects can be obtained.
(1)小形化実装に対し、第8図のプリント基板のよう
な従来の平面での実装に対し、立体実装を行う事により
コンパクトな実装ができ小形化が実現できる。実装する
立体の形状としては立方体、多面体、球体、円筒等であ
る。(1) For miniaturized mounting, compact mounting can be achieved by performing three-dimensional mounting, as compared to mounting on a conventional flat surface such as a printed circuit board in FIG. 8, and miniaturization can be realized. The three-dimensional shape to be mounted is a cube, a polyhedron, a sphere, a cylinder, or the like.
(2)高信頼化に対し、 従来の第8図のプリント回路配線6、PI間接続光コネ
クタ10,10A、ファイバーケーブル配線12を無くすべく、 (イ)実装する立体の器を暗箱にし、OEIC(光電気I
C)、光素子を暗箱内壁に取付け、それらを光で結合
し、結果として第8図のプリント回路配線6、コネクタ
10,10A、ファイバーケーブル12が不要となる。(2) For high reliability, to eliminate the conventional printed circuit wiring 6, the inter-PI connecting optical connectors 10, 10A, and the fiber cable wiring 12 shown in FIG. (Photoelectric I
C), mounting the optical elements on the inner wall of the dark box and coupling them with light, resulting in the printed circuit wiring 6 and the connector shown in FIG.
10,10A and fiber cable 12 are not required.
(ロ)(イ)で素子間の光結合は素子間直接行うか、角
度が必要な場合はプリズム、鏡等を使い、光線を導いて
素子間を結合する。(B) In (a), the optical coupling between the elements is performed directly between the elements, or when an angle is required, a prism, a mirror, or the like is used to guide light rays to couple the elements.
(3)耐環境性に対し、 実装の器を暗箱にすると共に、密閉にする事により、 (イ)密閉するため、器の内部が外気と途絶されている
ため、外気の不良ガス(腐触性ガス)に対して耐えられ
る。さらに内部を不活性ガスN2等で封入することで耐腐
触性が一層向上する。(3) For environmental resistance, use a dark box and seal the mounted container. (A) Since the inside of the container is cut off from the outside air for sealing, the bad gas of the outside air (corrosion) Gas). Further corrosion tactile resistance is further improved by encapsulating the internal inert gas such as N 2.
(ロ)実装する器を球体、球体に近い多面体にする事で
高外圧に耐えるのが容易となる。(B) By making the mounting device a sphere or a polyhedron close to a sphere, it becomes easy to withstand high external pressure.
(ハ)密閉した器内にガス体、液体等の冷媒を通す。又
器の外側を同様冷媒で冷す事で発熱を押えることが容易
かつ少い冷媒で実現でき、安定した温度環境での実装が
実現出来る。(C) Pass a refrigerant such as a gas or a liquid into a closed vessel. Similarly, by cooling the outside of the container with a refrigerant, heat generation can be easily suppressed with a small amount of refrigerant, and mounting in a stable temperature environment can be realized.
(ニ)実装する密閉された暗箱の外面をシールド板等で
被い、アースに接続する事で電磁誘導静電ノイズなどの
ノイズに対し強い回路実装が容易に実現できる。(D) By covering the outer surface of the sealed dark box to be mounted with a shield plate or the like and connecting it to ground, it is possible to easily realize circuit mounting that is resistant to noise such as electromagnetic induction electrostatic noise.
(4)高速性に対し、 実装を立体にする事で最短距離での結合ができる。又
球体、多面体では中心に電源、メモリ等の共通部を置
き、内壁面に素子を取付ける事で最短距離でかつ均等な
距離での結合が出来る。これらは配線長が性能に響く超
高速回路に有効である。(4) For high-speed operation, three-dimensional mounting enables connection at the shortest distance. In the case of a sphere or a polyhedron, a common part such as a power supply and a memory is placed at the center, and an element is mounted on the inner wall surface, so that the connection can be made at the shortest distance and an equal distance. These are effective for ultra-high-speed circuits in which the wiring length affects the performance.
上述の通り本発明によれば次の様な効果が有る。 As described above, the present invention has the following effects.
(1)耐環境性に優れた論理演算、制御回路を作れるの
で、宇宙、深海、極寒地、原子炉廻り等々悪環境条件下
での回路実装に適応できる。(1) Since a logical operation and control circuit having excellent environmental resistance can be made, it can be applied to circuit implementation under adverse environmental conditions such as space, deep sea, extreme cold, around a reactor, and the like.
(2)高密度実装ができ、コンパクトな演算制御装置を
作り出せる。(2) High-density mounting is possible, and a compact arithmetic and control unit can be produced.
(3)超高速演算装置を作り出せる。(3) An ultra-high-speed arithmetic device can be created.
(4)暗箱内での光で結合しているため、暗箱を空ける
ことができない(空けると回路動作しない)。このため
機密性が高く、防衛、関係の回路、重要機密事項を保持
するに適している。(4) The dark box cannot be opened because the light is coupled in the dark box (the circuit does not operate if the box is opened). Therefore, it is highly confidential and is suitable for defense, related circuits, and maintaining important confidential matters.
第1図は本発明の第1実施例を示し、(a)は暗箱の斜
視図、(b)は(a)のA−A′線断面図、(c)は
(b)に記載された素子の斜視図、第2図は第2実施例
を示す断面図、第3図は第2実施例の変形例の正面図、
第4図は第3実施例を示す断面図、第5図は第4実施例
を示す断面図、第6図は第5実施例を示す説明図、第7
図は第6実施例を示す説明図、第8図は従来例の説明図
である。 30……暗箱、32……OEIC、光素子等の素子、 34……光線、36……鏡、38……シールド、 40……発光部、42……受光部、 48,50……エネルギ変換素子、 52……形状記憶合金又は樹脂。1A and 1B show a first embodiment of the present invention, wherein FIG. 1A is a perspective view of a dark box, FIG. 1B is a sectional view taken along line AA 'of FIG. 1A, and FIG. FIG. 2 is a perspective view of the element, FIG. 2 is a sectional view showing a second embodiment, FIG. 3 is a front view of a modification of the second embodiment,
FIG. 4 is a sectional view showing the third embodiment, FIG. 5 is a sectional view showing the fourth embodiment, FIG. 6 is an explanatory view showing the fifth embodiment, and FIG.
FIG. 8 is an explanatory view showing a sixth embodiment, and FIG. 8 is an explanatory view of a conventional example. 30 ... dark box, 32 ... OEIC, optical element, etc. 34 ... light beam, 36 ... mirror, 38 ... shield, 40 ... light emitting part, 42 ... light receiving part, 48,50 ... energy conversion Element 52: Shape memory alloy or resin.
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Claims (6)
いに光線によって結合される光電気集積回路及び/又は
光素子が配置され、該ケースの中心部にメモリ又はエネ
ルギ源等の共通部品が配設されたものである回路装置。An opto-electric integrated circuit and / or an optical element which are coupled to each other by a light beam are arranged in a case which is sealed and shielded from external light, and a common part such as a memory or an energy source is disposed at the center of the case. A circuit device that is provided.
に重ねられ、これらのケースのうち最外部のケースの内
壁面及び内部に重ねられたケースの壁面に、互いに光線
によって結合される光電気集積回路及び/又は光素子が
配置され、これらのケースのうち最内部のケースの中心
部にメモリ又はエネルギ源等の共通部品が配設されたも
のである回路装置。2. A case in which a plurality of sealed and shielded external light-shielded cases are superposed one on another, and light beams which are mutually coupled to an inner wall surface of an outermost case and a wall surface of a case superposed inside the case by light rays. A circuit device in which an electric integrated circuit and / or an optical element are arranged, and a common part such as a memory or an energy source is arranged in a central portion of an innermost case among these cases.
いに光線によって結合される光電気集積回路及び/又は
光素子が配置され、該光電気集積回路及び/又は光素子
を動作させるエネルギの供給に、電気を光に変換するエ
ネルギ変換素子と光を電気に変換するエネルギ変換素子
とが具備されたものである回路装置。3. An opto-electronic integrated circuit and / or an optical element, which are coupled to each other by a light beam, are disposed in a sealed case in which external light is blocked, and energy for operating the opto-electric integrated circuit and / or the optical element is disposed. A circuit device, wherein a supply is provided with an energy conversion element for converting electricity to light and an energy conversion element for converting light to electricity.
いに光線によって結合される光電気集積回路及び/又は
光素子が配置され、該ケースは形状記憶合金又は形状記
憶樹脂によって製作されたものである回路装置。4. An opto-electric integrated circuit and / or an optical element, which are coupled to each other by light rays, are disposed in a case that is sealed and shielded from external light, and the case is made of a shape memory alloy or a shape memory resin. Circuit device.
れる光電気集積回路及び/又は光素子を配置すると共
に、該ケースの中心部にメモリ又はエネルギ源等の共通
部品を配設し、該ケースを密閉して外部光を遮断する回
路実装方法。5. An optoelectronic integrated circuit and / or an optical element which are coupled to each other by a light beam on an inner surface of a case, and a common part such as a memory or an energy source is disposed at a center of the case. A circuit mounting method that seals off air and blocks external light.
記憶合金製又は形状記憶樹脂製のケースを平面状に展開
し、該ケースの内面に互いに光線によって結合される光
電気集積回路及び/又は光素子を配置し、再び熱処理し
て立体形状にし、該ケースを密閉して外部光を遮断する
回路実装方法。6. An opto-electric integrated circuit and / or light, wherein a case made of a shape memory alloy or a shape memory resin in which a three-dimensional shape is memorized by heat treatment is developed in a plane, and an inner surface of the case is coupled to each other by light beams. A circuit mounting method in which the elements are arranged, heat-treated again to form a three-dimensional shape, the case is sealed, and external light is blocked.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1204395A JP2909489B2 (en) | 1989-08-07 | 1989-08-07 | Circuit device and mounting method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1204395A JP2909489B2 (en) | 1989-08-07 | 1989-08-07 | Circuit device and mounting method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0368178A JPH0368178A (en) | 1991-03-25 |
JP2909489B2 true JP2909489B2 (en) | 1999-06-23 |
Family
ID=16489834
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1204395A Expired - Lifetime JP2909489B2 (en) | 1989-08-07 | 1989-08-07 | Circuit device and mounting method thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2909489B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5078411B2 (en) * | 2007-03-31 | 2012-11-21 | 財団法人福岡県産業・科学技術振興財団 | Integrated circuit module |
-
1989
- 1989-08-07 JP JP1204395A patent/JP2909489B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0368178A (en) | 1991-03-25 |
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