JP2906793B2 - Frame synchronization monitoring circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frame synchronization monitoring circuit arranged in a PCM communication device, and more particularly to a CCITT monitoring circuit.
(International Telegraph and Telephone Consultative Committee) A frame synchronization monitoring circuit suitable for use in a PCM communication device based on G704.

[0002]

2. Description of the Related Art FIG. 2 shows frame synchronization information in a multi-frame PCM (pulse code modulation) data sequence based on CCITT G704 and a CRC (cyclic redundancy).
ycheck) This is for explaining the frame synchronization information. At the beginning of each frame of the PCM data sequence, 8-bit information as shown in this figure is added. Where the symbols C ₁ , C ₂ , C ₃ and C ₄ are CRC
A is a remote alarm indication bit. Symbols _Sn and E are spare bits for domestic use and international use, respectively. In addition, a column (00110) in which 7 bits from the second bit to the eighth bit of each even frame are connected.
11) is referred to as frame synchronization information 11, and a bit string (001011) 12 obtained by continuously extracting from the first frame to the eleventh frame of each odd-numbered frame is C
This is called RC frame synchronization information.

FIG. 3 shows the first 8 bits of a non-multiframe PCM data sequence based on CCITT G704. Bits S _i of the top frame synchronization information is adapted to be fixed to "1" when not in use.

FIG. 4 shows a configuration of a conventional frame synchronization monitoring circuit arranged in a communication device using a PCM data sequence. The frame synchronization monitoring circuit includes a frame synchronization information search unit 22 that receives a PCM signal input from an input terminal 21 and searches for frame synchronization information. When the search is successful, the frame synchronization information search unit 22 supplies a frame synchronization confirmation signal to the CRC frame synchronization information search unit 23 and the error notification signal generation timer 24.

[0005] Among them, the error notification signal generation timer 24
Outputs an error notification signal to one input terminal of the two-input AND gate 25 within a predetermined time after receiving the frame synchronization confirmation signal. Further, the CRC frame synchronization information search unit 23 starts searching for CRC synchronization information in response to the frame synchronization confirmation signal. If the search is successful, a prohibition signal is output to the other input terminal of the two-input AND gate 25, and the error notification signal is sent to the frame synchronization information search unit via the switch 26 disposed on the output side of the two-input AND gate 25. 22 is prevented from being input.

On the other hand, the CRC frame synchronization information search section 23
When the search of the CRC synchronization information fails, the error notification signal output from the error notification signal generation timer 24 passes through the two-input AND gate 25, and is supplied to the frame synchronization information search unit 22 via the switch 26. As a result, the frame synchronization information search unit 22 determines that there is an error in the search for the frame synchronization information and restarts the search.

In the frame synchronization monitoring circuit shown in FIG. 4, the switch 26 is set to an off state and the CRC function is invalidated when the apparatus is opposed to a device having no CRC function. In this frame synchronization monitoring circuit, a frame synchronization confirmation signal is output from the frame synchronization information search section 22 to the first output terminal 27, and the second output from the CRC frame synchronization information search section 23 is performed. The terminal 28 outputs a CRC frame synchronization confirmation signal.

[0008]

In the conventional frame synchronization monitoring circuit, the presence or absence of the CRC function is determined by the switch 2 as described above.
6 on / off control. For this reason, there is a problem that it is necessary not only to check in advance whether or not the counterpart device has the CRC function, but also to switch the switch 26 accordingly.

SUMMARY OF THE INVENTION An object of the present invention is to provide a frame synchronization monitoring circuit which automatically enables and disables a CRC function and eliminates the trouble of switching.

[0010]

According to the first aspect of the present invention, a frame synchronization information search section for searching for frame synchronization information from a PCM data string and outputting a frame synchronization confirmation signal when the search is successful, A CRC frame synchronization information search unit that starts searching for the CRC frame synchronization information from the PCM data sequence in response to the
If the search for the frame synchronization information is not successful within a predetermined time, a search error notifying unit for notifying the frame synchronization information search unit of a search error, and a CRC bit synchronization information from a specific bit constituting the frame synchronization information to the PCM data sequence. The frame synchronization monitoring circuit is provided with a CRC unused information search unit that invalidates the search error notification of the search error notification unit when it is determined that the search error notification is not included.

That is, according to the first aspect of the present invention, a specific bit (for example, G70 of CCITT) in the frame synchronization signal is used.
In the frame synchronization monitoring circuit for inputting the PCM data sequence having a configuration based on C.4, the status of the international bit _S.sub.i ) is monitored, and CRC frame synchronization information is searched. Automate and achieve the above objectives.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 shows a frame synchronization monitoring circuit according to an embodiment of the present invention. The frame synchronization monitoring circuit includes a frame synchronization information search unit 32 that receives a PCM signal input from an input terminal 31 and searches for frame synchronization information. The frame synchronization confirmation signal output from the frame synchronization information search unit 32 is supplied to a CRC unused information search unit 33, a CRC frame synchronization information search unit 34, and an error notification signal generation timer 35, and to a first output terminal 36. It is output. In addition, the PCM signal input from the input terminal 31 and the outputs of the CRC unused information search unit 33 and the CRC frame synchronization information search unit 34, which receive the above-mentioned frame synchronization confirmation signal, have three inputs with the logic inverted. The signals are input to the AND gate 37. CRC
The CRC frame synchronization confirmation signal as the output of the frame synchronization information search unit 34 is also supplied to a second output terminal 38. The output of the error notification signal generation timer 35 becomes the remaining input of the three-input AND gate 37, and the output of the three-input AND gate 37 is input to the frame synchronization information search unit 32.

In the frame synchronization monitoring circuit having such a configuration, the frame synchronization information search section 32, which has received the PCM signal from the input terminal 31, searches for the frame synchronization signal "0011011" in the PCM data sequence. And
If the search is successful, a frame synchronization confirmation signal is output to the first output terminal 36 and supplied to the CRC unused information search unit 33, the CRC frame synchronization information search unit 34, and the error notification signal generation timer 35.

Upon receiving the frame synchronization confirmation signal, the CRC frame synchronization information searching section 34 starts searching for "001011" which is CRC frame synchronization information. If the search is successful, a CRC frame synchronization confirmation signal is output to the second output terminal 38 and sent to the three-input AND gate 37.

A PC on which the frame synchronization monitoring circuit is arranged
If the M communication device faces a PCM communication device having a CRC function, the CRC frame synchronization information search unit 34 succeeds in the search within a predetermined time, and the error notification signal generation timer 3
The passage of the frame synchronization error notification signal output from 5 is blocked by the 3-input AND gate 37. In this way, the frame synchronization monitoring using the frame synchronization information and the CRC frame synchronization information is performed.

On the other hand, if the search by the CRC frame synchronization information search unit 34 is not successful within a predetermined time, the frame synchronization error notification signal generated by the error notification signal generation timer 35 passes through the 3-input AND gate 37. Then, it is supplied to the frame synchronization information search unit 32. Frame synchronization information search unit 3 receiving this frame synchronization error notification signal
2 judges that there is an error in the search for the frame synchronization information, and performs the search again by counting up or counting down a built-in counter (not shown).

A PCM communication device in which the frame synchronization monitoring circuit is provided is a PCM communication device having no CRC function.
Consider a case in which the communication device is facing the communication device. In this case,
In the search by the CRC frame synchronization information search unit 34, “001011” which is the corresponding CRC frame synchronization information is
Fails because it is not included in the M data string. As a result, the frame synchronization error notification signal output from the error notification signal generation timer 35 is about to be supplied to the frame synchronization information search unit 32 through the three-input AND gate 37.

However, in the case of a device having no CRC function, the leading bit _Si is fixed to "1" as described with reference to FIG. Therefore, in the case of the present invention, the CRC
The search for “111111” instead of “001011” which is the frame synchronization information is performed by the CRC unused information search unit 33.
Done in The CRC unused information search unit 33 uses “11” instead of “001011” which is the CRC frame synchronization information.
When 1111 "is detected, an H (high) level signal is output to the input terminal of the three-input AND gate 37. As a result, the output of the three-input AND gate 37 is fixed at the L (low) level, and an error occurs. The passage of the notification signal is blocked, and the CRC function is invalidated.

[0020]

As described above, in the present invention, for example, the international bit _Si is monitored as a specific bit constituting the frame synchronization information, and the CRC is determined when the CRC is not used at the same time as searching for the CRC frame synchronization information. By detecting the state of the specific bit, CR
Since the enabling and disabling of the C function are automatically performed, there is no need to turn on and off the switch, and there is an effect that the complexity of the operation can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a circuit configuration of a frame synchronization monitoring circuit according to an embodiment of the present invention.

FIG. 2 shows frame synchronization information and a CRC in a multi-frame PCM data string based on CCITT G704.
FIG. 9 is an explanatory diagram for describing frame synchronization information.

FIG. 3 is an explanatory diagram showing the first 8 bits of a non-multiframe PCM data sequence based on CCITT G704.

FIG. 4 is a block diagram showing a circuit configuration of a conventional frame synchronization monitoring circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 31 Input terminal 32 Frame synchronization information search unit 33 CRC unused information search unit 34 CRC frame synchronization information search unit 35 Error notification signal generation timer 37 3 input AND gate

Claims (1)

(57) [Claims] 1. A frame synchronization information search unit that searches for frame synchronization information from a PCM data sequence and outputs a frame synchronization confirmation signal when the search is successful, and receives a frame synchronization confirmation signal and performs CRC frame synchronization from the PCM data sequence. CRC to start searching for information
A frame synchronization information searching unit, a search error notifying unit that notifies a search error to the frame synchronization information searching unit if the search for the CRC frame synchronization information is not successful within a predetermined time, and the frame synchronization information. PCM from specific bit
A frame synchronization monitoring circuit, comprising: a CRC unused information search unit that invalidates a search error notification of the search error notification unit when it is determined that the data string does not include CRC frame synchronization information.