JP2890982B2 - Data transmission control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission control system for adding a predetermined number of flag patterns before and after an information frame when data is transmitted in an HDLC frame configuration.

[0002]

2. Description of the Related Art FIG. 4 shows a frame format used for HDLC data communication which is the object of the present invention.

As shown in the figure, HDLC (High-level D
(ata Link Control) When transmitting a transmission frame based on the transmission procedure to the network, an 8-bit flag pattern consisting of "01111110" is added a predetermined number of times before and after the information frame and transmitted. Is recognized.

[0004] In one-to-one HDLC communication, there is no particular problem even if this flag pattern is constantly transmitted when there is no communication. However, in a communication network such as a one-to-many LAN in which one transmission path is shared by a plurality of data transmission sources, H
In the case of performing DLC communication, if a flag pattern is constantly transmitted during non-communication, data from a plurality of transmission sources will collide. Therefore, in the LAN, the flag pattern is not always transmitted to the transmission path, a predetermined number of flag patterns specific to the system are added before and after the transmission information, and the bus is not driven except for the information frame and the added flag portion. Like that.

FIG. 5 shows a conventional data transmission control system.
The processor 1 sends data to the transmission path 4 via the communication circuit 2. The communication circuit 2 creates a transmission frame under the control of the processor 1 and sends out transmission data to the transmission line 4 via the transmission driver 3.

The communication circuit 2 has a flag pattern generator 21, a transmission gate 22, a data buffer 23, a frame generator 24, and a controller 25. The flag pattern generation unit 21
The flag pattern of the procedure C is repeatedly generated at all times. When there is no communication, the transmission gate 22 always sends this flag pattern under the control of the control unit 25. However, since the transmission request signal RTS is inactive, the transmission driver 3 is in an inactive state. The pattern is not transmitted to the transmission line 4.

When the processor 1 starts the transmission operation, a predetermined transmission start signal TS is sent to the control unit 25.
Activates the transmission request signal RTS. When the RTS is activated, the transmission driver 3 is activated, and the flag pattern is transmitted to the transmission line 4. Processor 1
After transmitting the transmission start signal TS, it waits for the flag pattern transmission time. For example, when the flag sending time of 25 flag patterns elapses, the processor 1 sets the data buffer 23
Transfer and write the transmission data to When the writing of the transmission data to the data buffer 23 starts, the control unit 25 controls the transmission gate 22 to stop the transmission of the flag pattern, and generates the flag pattern using the transmission data of the data buffer 23 in the frame generation unit 24 instead. The transmission gate 22 is switched so that the transmitted information frame is transmitted.

As a result, an information frame is transmitted to the transmission line 4 after a predetermined number of flag patterns have been transmitted. Similarly, after the data frame, the processor
Since 1 waits for a predetermined number of flag pattern transmission times and then notifies the control unit 25, the control unit 25 deactivates the RTS signal and stops the operation of the transmission driver 3, thereby defining the number of rear flags.

[0009]

As described above, in the prior art, the number of flag patterns to be added is controlled by software processing such as measuring a flag pattern transmission time by looping a program of a processor.

However, while the processor waits for the flag pattern transmission time section, if another interrupt processing enters the processor, the waiting loop is interrupted, so that the measurement of the flag transmission time is shifted by the time required for the interrupt processing. Occurs. Then, since the start time of data writing from the processor to the data buffer 23 is delayed, an error occurs in the number of flag patterns actually transmitted to the transmission path. For this reason,
There is a problem that the predetermined protocol is not satisfied, and the receiving side cannot recognize the information frame. Further, during the standby time, the prossess cannot perform other processing, so that there is a problem that the load on software is large.

The present invention has been made in view of these problems, and has as its object to enable a predetermined number of flag patterns to be accurately added before and after an information frame without burdening a processor.

[0012]

FIG. 1 is a diagram showing the principle of a data transmission control system according to the present invention. The above problem is a data transmission control method in HDLC communication in which n and m flag patterns are added before and after an information frame and transmitted to the transmission path 4 as shown in FIG. A communication circuit 2 for transmitting the transmission data from the processor 1 in an information frame when the transmission permission signal CTS is active, and outputting a transmission request signal RTS in response to the transmission start signal TS from the processor 1
And the communication circuit 2 when the transmission request signal RTS is active.
A transmission driver for transmitting a transmission signal from the transmission line 4 to the transmission line 4;
The transmission signal from the communication circuit 2 is checked to detect and count the flag pattern. When the number of flag patterns detected after the activation of the transmission request signal RTS reaches a predetermined number n, the transmission permission signal CTS
And a flag number control unit 5 that deactivates the transmission request signal RTS when the number of flag patterns detected after the activation of the transmission permission signal CTS reaches a second predetermined number m. The problem is solved by the data transmission control method of the present invention.

[0013]

When transmitting data, the processor sends the transmission data and the transmission start signal to the communication circuit at the same time. Since the communication circuit 2 activates the transmission request signal RTS and puts the transmission driver 3 into an operating state, the flag pattern which the communication circuit 2 always transmits is transmitted to the transmission line 4. The flag number control unit 5 monitors the signal sent from the communication circuit 2 to the transmission buffer 3 to constantly detect the presence / absence of a flag pattern. After the transmission request signal RTS is activated, that is, after the operation of the transmission driver 3 starts. Count the number of flag patterns,
When the number of forward flags reaches a predetermined number n, the transmission permission signal CTS is output to the communication circuit 2. The communication circuit 2 immediately switches the transmission signal from the flag pattern to the transmission data, and the transmission data from the processor 1 is transmitted to the transmission line as an information frame. When the transmission of the information frame ends, the communication circuit 2 starts transmitting the flag pattern again. The flag number control unit 5 starts counting the number of flags after the transmission permission signal CTS is activated. However, since the information frame does not include the flag pattern according to the HDLC standard, the flag control unit 5 sets the flag pattern during transmission of the information frame. Is detected and the number of flag patterns after the information frame is counted. When the counted value reaches a predetermined number m of rear flags, the transmission request signal RTS is set to non-active, and the transmission driver 3 Then, the transmission of the flag pattern to No. 4 is stopped.

As described above, an information frame to which a predetermined number of flag patterns are added before and after the information frame is transmitted to the transmission line 4. At this time, the processor only has to transmit the transmission start signal TS and the transmission data to the communication circuit at once when the data transmission starts, and the subsequent transmission control processing is performed by the hardware of the communication circuit and the flag addition control unit. The processor does not need to wait for the flag pattern transmission time. Therefore, unlike the prior art, no error occurs in the number of flag patterns due to the interrupt process of the processor, and the load on the processor is reduced.

[0015]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. Note that the same reference numerals denote the same objects throughout the drawings. FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is an operation time chart of the embodiment.

In FIG. 2, 1 is a processor, 2 is a communication circuit, 3 is a transmission driver, 4 is a transmission line, and 5 is a flag number control unit. The processor 1 generates data to be transmitted and sends it to the communication circuit together with the transmission start signal TS.

The communication circuit 2 creates a transmission frame under the control of the processor 1 and sends out transmission data to the transmission line 4 via the transmission driver 3. The transmission driver 3 operates according to the transmission enable signal SEN, and transmits a transmission data signal from the communication circuit 2 to the transmission line 4.

The communication circuit 2 has a flag pattern generator 21, a transmission gate 22, a data buffer 23, a controller 25, and a frame generator 24. The flag pattern generation unit 21
The flag pattern of the procedure C is repeatedly generated at all times. The transmission gate 22 is composed of, for example, a 2: 1 selector, and is controlled by the selection control signal S to transmit either an information frame from the frame generator 25 or a flag pattern from the flag pattern generator 21 as a transmission signal transmitted from the transmission output TXD. Select one.

The data buffer 23 temporarily holds data necessary for creating an information frame transferred from the processor 1. The frame creating unit 24 creates an information frame using the data held in the data buffer 23 according to the HDLC standard. The control unit 25 transmits a transmission start signal from the processor 1
Activate the transmission request signal RTS from the TS. Further, the control unit 25 activates the switching control signal S by the transmission permission signal CTS, and outputs the data end signal DED from the frame creation unit 24.
And the transmission gate 22 is controlled.

The flag number control unit 5 includes a flag detection unit 51, n
Binary counter 52, m-ary counter 53, three AND gates 5
4, 55, 56, two flip-flops 57, 58, and two inverters 59a, 59b.

The transmission request signal RTS from the communication circuit 2 is A
The signal is input to the set terminal of the flip-flop 57 via the ND gate 56. The Q output of the flip-flop 57 controls the transmission driver 3 as a transmission enable signal SEN.

The flag detection unit 51 constantly monitors a transmission signal transmitted from the communication circuit 2 to the transmission driver 3, and includes a flag pattern "011111" of the HDLC system in the transmission signal.
When 10 "is detected, a detection pulse is issued. The detection pulse is supplied to the n-ary counter 52 via an AND gate 54 opened by the transmission request signal RTS, and an AND gate 55 opened by the transmission permission signal CTS.
Is input to the m-ary counter 53 via the. n-ary counter
52 counts flag detection pulses when the transmission request signal RTS is active, and outputs "1" when the count value reaches n. The flip-flop 58 generates a transmission permission signal CTS set by the n arrival signal. m-ary counter 53
Counts flag detection pulses when the transmission permission signal CTS is active, and outputs "1" when the count reaches m. This m arrival signal is applied to the reset input of the flip-flop 57 to make the transmission enable signal SEN non-active.

The operation of the data transmission control system having the above configuration will be described with reference to the operation time chart of FIG. The processor 1 that intends to transmit data transmits the transmission data and the transmission start signal TS to the communication circuit 2 at the same time. The communication circuit 2 activates the transmission request signal RTS. At this time, since the output of the m-ary counter is still "0", the flip-flop 57 changes from the reset state to the set state and activates the transmission enable signal SEN, so that the transmission driver 3 is activated. As a result, the flag pattern which the communication circuit 2 always sends is sent to the transmission line 4. On the other hand, the flag detection section 51 outputs a flag detection pulse every time a flag pattern is detected from a transmission signal transmitted from the communication circuit 2 to the transmission driver 3. The n-ary counter 52 starts counting flag detection pulses in response to the transmission request signal RTS active, and when the number of forward flags reaches a predetermined number n, sets the flip-flop 58,
A transmission permission signal CTS is output to the communication circuit 2. Communication circuit 2
Immediately changes the transmission signal TXD from the flag pattern to the information frame, so that the transmission data from the processor is transmitted to the transmission line 4 as an information frame. When the transmission of the information frame ends, the communication circuit 2 starts transmitting the flag pattern again. Since the information frame does not include the flag pattern according to the HDLC standard, the flag detection unit 51
Does not detect the flag pattern during transmission of the information frame. The m-ary counter 53, which has started counting by the transmission permission signal CTS, counts flag detection pulses after restarting the transmission of the flag pattern, and outputs "1" when the number m of rearward flags is reached.
The ND gate 56 is closed to suppress the transmission request signal and reset the flip-flop 57. As a result, the transmission enable signal SEN becomes non-active, the transmission driver 3 stops operating, and the transmission of the flag pattern to the transmission line 4 stops.

By the above operation, the information frame with a predetermined number of flag patterns added before and after the information frame is transmitted to the transmission line.

[0025]

As described above, according to the present invention, H
In the data transmission of the DLC system, the processor only needs to transmit the transmission start signal TS and the transmission data collectively to the communication circuit at the start of data transmission, and the subsequent transmission control processing is performed by the communication circuit and the flag number control unit. Since the processing is automatically performed by hardware, the processor does not need to wait for the flag pattern transmission time. Therefore, there is an effect that an error does not occur in the number of flag patterns due to the interrupt processing of the processor unlike the related art, and the load on the processor is reduced.

[Brief description of the drawings]

FIG. 1 is a principle diagram of a data transmission control method according to the present invention.

FIG. 2 is a configuration diagram of an embodiment of the present invention.

FIG. 3 is an operation time chart of the embodiment.

FIG. 4 is a frame format used for HDLC data communication according to the present invention;

FIG. 5 is a diagram showing a conventional data transmission control method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Processor, 2 ... Communication circuit, 21 ... Flag pattern generation part, 22 ... Transmission gate, 23 ... Data buffer, 24 ... Frame creation part, 25 ... Control part, 3 ... Transmission driver, 4 ... Transmission path, 5 ... Flag Numerical control unit, 51 ... flag detection unit, 52 ... n-ary counter, 53 ... m-ary counter

Continuation of the front page (72) Inventor Takashi Onodera 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-3-196736 (JP, A) JP-A-8-51469 (JP, A) (58) Field surveyed (Int. Cl. ⁶ , DB name) H04L 29/10 H04L 29/08

Claims (1)

(57) [Claims] 1. An information frame, n and m respectively before and after an information frame.
H to be transmitted to the transmission line (4) after adding
This is a data transmission control method in DLC communication, in which a flag pattern is constantly transmitted and a transmission permission signal (CT
When (S) is active, the transmission data from the processor (1) is sent in an information frame and transmitted.
A communication circuit (2) that outputs a transmission request signal (RTS) based on the transmission start signal TS from (1), and a communication circuit (2) when the transmission request signal (RTS) is active
Driver that sends outgoing signals from the transmission line (4)
(3) Check the transmission signal from the communication circuit (2) and detect and count the flag pattern.When the number of flag patterns detected after the activation of the transmission request signal (RTS) reaches the predetermined number n, the transmission permission signal
(CTS) is activated, and when the number of flag patterns detected after the activation of the transmission permission signal (CTS) reaches a second predetermined number m, the flag number control unit (5) that deactivates the transmission request signal (RTS). A data transmission control method, comprising: