JP2874597B2 - Manufacturing method of electronic component assembly - Google Patents

Manufacturing method of electronic component assembly

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Publication number
JP2874597B2
JP2874597B2 JP7174841A JP17484195A JP2874597B2 JP 2874597 B2 JP2874597 B2 JP 2874597B2 JP 7174841 A JP7174841 A JP 7174841A JP 17484195 A JP17484195 A JP 17484195A JP 2874597 B2 JP2874597 B2 JP 2874597B2
Authority
JP
Japan
Prior art keywords
solder
pad
substrate
electronic component
connection member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP7174841A
Other languages
Japanese (ja)
Other versions
JPH08153727A (en
Inventor
孝行 須山
真一 長谷川
良昌 田中
勇三 嶋田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
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Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7174841A priority Critical patent/JP2874597B2/en
Publication of JPH08153727A publication Critical patent/JPH08153727A/en
Application granted granted Critical
Publication of JP2874597B2 publication Critical patent/JP2874597B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79—Apparatus for Tape Automated Bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
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    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、電子部品を接続するた
めの接続部材に関し、特に、対向するパッド間を接続す
るための接続部材に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connecting member for connecting electronic components, and more particularly, to a connecting member for connecting opposing pads.

【０００２】さらに、本発明は、この接続部材を用いた
電子部品組立体および電子部品の接続方法に関する。Further, the present invention relates to an electronic component assembly and a method for connecting electronic components using the connecting member.

【０００３】[0003]

【従来の技術】テープキャリアを基板に接続するための
技術の一例は、米国特許公報５，２６１，１５５号に開
示されている。2. Description of the Related Art An example of a technique for connecting a tape carrier to a substrate is disclosed in U.S. Pat. No. 5,261,155.

【０００４】同公報第６図を参照すると、可撓性基板３
１の導体パターン３９と、基板１３の導体パッド２３と
は、ハンダボール３２およびハンダペースト２７によっ
て接続されている。ハンダボール３２とハンダペースト
２７がハンダバンプを構成する。Referring to FIG. 6 of the publication, a flexible substrate 3
The one conductor pattern 39 and the conductor pad 23 of the substrate 13 are connected by a solder ball 32 and a solder paste 27. The solder balls 32 and the solder paste 27 form solder bumps.

【０００５】同公報第４図および第５図を参照すると、
以下のステップによって、可撓性基板３１と基板１３と
が接続される。Referring to FIGS. 4 and 5 of the publication,
The following steps connect the flexible substrate 31 and the substrate 13.

【０００６】第１のステップにおいて、基板１３の導体
パッド２３上にハンダペースト２７が塗布される。[0006] In a first step, a solder paste 27 is applied on the conductive pads 23 of the substrate 13.

【０００７】第２のステップにおいて、ハンダペースト
２７上にハンダボール３２が載置される。さらに、ハン
ダボール３２上に可撓性基板３１の導体パターン３９が
載置される。In a second step, solder balls 32 are placed on solder paste 27. Further, the conductor pattern 39 of the flexible substrate 31 is placed on the solder ball 32.

【０００８】第３のステップにおいて、ハンダボール３
２およびハンダペースト２７が溶解される。これによ
り、導体パターン３９と導体パッド２３とが接続され
る。In the third step, the solder balls 3
2 and the solder paste 27 are dissolved. Thereby, the conductor pattern 39 and the conductor pad 23 are connected.

【０００９】さらに、同公報第９図には、可撓性基板に
テーパのないスルーホールを設けた構造が開示されてい
る。FIG. 9 discloses a structure in which a flexible substrate is provided with a non-tapered through-hole.

【００１０】[0010]

【発明が解決しようとする課題】この技術では、次のよ
うな問題がある。This technique has the following problems.

【００１１】第１に、反りやうねりが生じた可撓性基板
３１が平坦でないとき、すなわち、可撓性基板３１に反
りやうねりが生じているとき、導体パターン３９と導体
パッド２３の間の間隙がばらつく。これにより、バンプ
の高さがばらつく。First, when the flexible substrate 31 on which warpage or undulation has occurred is not flat, that is, when the flexible substrate 31 has warpage or undulation, the distance between the conductor pattern 39 and the conductor pad 23 is reduced. The gap varies. As a result, the height of the bump varies.

【００１２】第２に、第１の問題を回避するために、リ
フロー処理中に可撓性基板３１を押圧して平坦にする
と、ハンダボール３２およびハンダペースト２７が押し
つぶされる。押しつぶされたハンダは、接続領域を越え
て広がり、配線間のショートを引き起こす。Second, when the flexible substrate 31 is pressed and flattened during the reflow process to avoid the first problem, the solder balls 32 and the solder paste 27 are crushed. The crushed solder spreads beyond the connection area and causes a short circuit between wirings.

【００１３】上述の第１の問題および第２の問題は、こ
の技術が超多ピンパッケージに適用されたときに特に問
題となる。The above-described first and second problems become particularly problematic when this technology is applied to an ultra-high pin count package.

【００１４】第３に、ハンダバンプの強度が低い。Third, the strength of the solder bump is low.

【００１５】第４に、配線パターン上にメッキされた金
が、ハンダ中に拡散してしまう。Fourth, gold plated on the wiring pattern diffuses into the solder.

【００１６】第５に、ハンダボール３２およびハンダペ
ースト２７が可撓性基板３１で被覆されているため、接
続不良の確認が困難である。Fifth, since the solder balls 32 and the solder paste 27 are covered with the flexible substrate 31, it is difficult to confirm a connection failure.

【００１７】さらに、同公報第９図に示された技術で
は、以下の問題がある。Further, the technique shown in FIG. 9 has the following problem.

【００１８】第６に、リフロー中に可撓性基板３１を基
板１３に向けて押圧すると、スルーホールを通ったハン
ダが、可撓性基板３１の上面に流出する。Sixth, when the flexible substrate 31 is pressed toward the substrate 13 during reflow, the solder that has passed through the through holes flows out to the upper surface of the flexible substrate 31.

【００１９】以上の問題に鑑み、本発明は以下の目的を
有する。In view of the above problems, the present invention has the following objects.

【００２０】第１の目的は、接続後のハンダバンプの高
さを均一にすることにある。A first object is to make the height of solder bumps after connection uniform.

【００２１】第２の目的は、可撓性基板を基板に向けて
押圧したときに、ハンダが押しつぶされるのを防止する
ことにある。A second object is to prevent the solder from being crushed when the flexible substrate is pressed toward the substrate.

【００２２】第３の目的は、ハンダバンプの強度を向上
することにある。A third object is to improve the strength of the solder bump.

【００２３】第４の目的は、配線にメッキされた金が、
ハンダ中に拡散するのを防止することにある。The fourth object is that the gold plated on the wiring is
The purpose is to prevent diffusion into the solder.

【００２４】第５の目的は、接続不良が容易に確認でき
る接続方法を提供することにある。A fifth object is to provide a connection method in which a connection failure can be easily confirmed.

【００２５】第６の目的は、可撓性基板を基板に向けて
押圧したときに、ハンダがスルーホールから流出するの
を防止することにある。A sixth object is to prevent the solder from flowing out of the through hole when the flexible substrate is pressed toward the substrate.

【００２６】第７の目的は、越多ピンパッケージの接続
部分の信頼性を向上することにある。A seventh object is to improve the reliability of the connection part of the multi-pin package.

【００２７】[0027]

【課題を解決するための手段】上述の目的を達成するた
め、本発明の接続部材は、核と、この核を被覆するハン
ダとを含む。核の融点は、ハンダの融点よりも高い。In order to achieve the above-mentioned object, a connecting member according to the present invention includes a core and a solder covering the core. The melting point of the core is higher than the melting point of the solder.

【００２８】上述の目的を達成するため、本発明の電子
部品組立体は、第１のパッドが上面に設けられた第１の
基板と、前記第１のパッドと対向する第２のパッドが下
面に設けられた第２の基板と、前記第１のパッドと第２
のパッドの間に介在する核と、前記第１のパッドと前記
第２のパッドとを接続し、前記核を包含するハンダとを
含む。In order to achieve the above object, an electronic component assembly according to the present invention comprises a first substrate having a first pad provided on an upper surface, and a second pad having a lower surface facing the first pad being provided on a lower surface. A second substrate, the first pad and the second
And a solder for connecting the first pad and the second pad and including the nucleus.

【００２９】本発明の電子部品組立体の別の実施態様
は、基板と、この基板上に設けられたパッドと、核とこ
の核を被覆するハンダを有し前記パッド上に接続された
接続部材とを含む。Another embodiment of the electronic component assembly of the present invention is a connecting member having a substrate, pads provided on the substrate, a core and solder for covering the core, and connected to the pad. And

【００３０】上述の目的を達成するため、本発明の電子
部品の接続方法は、第１の基板の第１のパッド上にクリ
ームハンダを塗布する第１のステップと、前記クリーム
ハンダ上に前記接続部材を載置する第２のステップと、
前記接続部材上に第２の基板の第２のパッドを位置づけ
る第３のステップと、前記接続部材の前記ハンダおよび
前記クリームハンダを溶解することにより、前記第１の
パッドと前記第２のパッドとを接続する第４のステップ
とを含む。To achieve the above object, a method for connecting an electronic component according to the present invention includes a first step of applying cream solder on a first pad of a first substrate, and a step of applying the connection on the cream solder. A second step of placing the member;
A third step of positioning a second pad of a second substrate on the connection member, and dissolving the solder and the cream solder of the connection member to form the first pad and the second pad. And a fourth step of connecting

【００３１】上述の接続方法において、前記第２のパッ
ドにスルーホールを設けることもできる。この場合、ハ
ンダがスルーホールを通って第２の基板の上面に出現し
たことを確認することにより、ハンダ付けが正常に完了
したことを確認することもできる。また、スルーホール
にテーパを設けてもよい。In the above connection method, a through hole may be provided in the second pad. In this case, by confirming that the solder has appeared on the upper surface of the second substrate through the through hole, it can be confirmed that the soldering has been normally completed. Further, a taper may be provided in the through hole.

【００３２】また、本発明の電子部品の接続方法の他の
実施態様では、前記第２の基板の前記第２のパッドに前
記接続部材が接続された後、この接続部材が前記第１の
基板の前記第１のパッドに接続される。In another aspect of the electronic component connection method of the present invention, after the connection member is connected to the second pad of the second substrate, the connection member is connected to the first substrate. Is connected to the first pad.

【００３３】[0033]

【実施例】次に、図面を参照して本発明の第１の実施例
について説明する。Next, a first embodiment of the present invention will be described with reference to the drawings.

【００３４】第１の実施例は、接続部材に関する。The first embodiment relates to a connecting member.

【００３５】図１を参照すると、第１の実施例の接続部
材１０は、球形の核１１と、この核１１を被覆するハン
ダ層１２とを含む。Referring to FIG. 1, the connecting member 10 of the first embodiment includes a spherical core 11 and a solder layer 12 covering the core 11.

【００３６】接続部材１０の直径は、約３００μｍであ
る。ハンダ層１２の厚さは、約５〜１０μｍである。The diameter of the connecting member 10 is about 300 μm. The thickness of the solder layer 12 is about 5 to 10 μm.

【００３７】核１１の材料は、ハンダ層１２よりも融点
が高い金属またはセラミックである。The material of the core 11 is a metal or ceramic having a higher melting point than the solder layer 12.

【００３８】金属の場合、銅、鉄、ニッケル、クロム、
タングステン、モリブデン、および、銀のうちの少なく
とも１種を含む金属が好適である。For metals, copper, iron, nickel, chromium,
Metals containing at least one of tungsten, molybdenum, and silver are preferred.

【００３９】セラミックの場合、アルミナ、ガラス、ジ
ルコニア、シリカ等が好適である。In the case of ceramic, alumina, glass, zirconia, silica and the like are preferred.

【００４０】ハンダ層１２の材料は、スズ、金スズ合
金、スズ鉛ハンダが好適である。The material of the solder layer 12 is preferably tin, a gold-tin alloy, or tin-lead solder.

【００４１】次に、本発明の第２の実施例について図面
を参照して説明する。第２の実施例は、接続部材１０を
用いた電子部品組立体、および、この電子部品組立体の
製造方法に関する。Next, a second embodiment of the present invention will be described with reference to the drawings. The second embodiment relates to an electronic component assembly using the connection member 10 and a method for manufacturing the electronic component assembly.

【００４２】図２を参照すると、電子部品組立体１は、
ＬＳＩチップ４１、テープキャリア２０、および、実装
基板３０を含む。テープキャリア２０と実装基板３０
は、核１１およびハンダ１３により接続されている。Referring to FIG. 2, the electronic component assembly 1 includes:
It includes an LSI chip 41, a tape carrier 20, and a mounting board 30. Tape carrier 20 and mounting substrate 30
Are connected by a nucleus 11 and a solder 13.

【００４３】ＬＳＩチップ４１は、１７．５ｍｍ×１
７．５ｍｍの正方形を呈する。ＬＳＩチップ４１の周囲
には、約８００個の入出力端子が、８０μｍピッチで配
置されている。ＬＳＩチップ４１の入出力端子は、イン
ナーリード６１を介してテープキャリア２０に接続され
ている。The LSI chip 41 is 17.5 mm × 1
Presents a 7.5 mm square. About 800 input / output terminals are arranged at a pitch of 80 μm around the LSI chip 41. The input / output terminals of the LSI chip 41 are connected to the tape carrier 20 via the inner leads 61.

【００４４】テープキャリア２０は、絶縁フィルム２１
を含む。絶縁フィルム２１の厚さは約５０μｍである。
絶縁フィルム２１は、ポリイミドやベンゾシクロブデン
（ＢＣＢ）などの、耐熱性、寸法安定性、および導体と
の密着性に優れた材料から形成される。The tape carrier 20 comprises an insulating film 21
including. The thickness of the insulating film 21 is about 50 μm.
The insulating film 21 is formed of a material having excellent heat resistance, dimensional stability, and adhesion to a conductor, such as polyimide and benzocyclobutene (BCB).

【００４５】テープキャリア２０には、スルーホール２
５が形成される。スルーホール２５の内側面には、導体
パターン２３が形成される。テープキャリア２０の上面
および下面には、導体パターン２４およびパッド２２が
形成される。パッド２２、導体パターン２３および２４
の厚さは１０〜２５μｍである。パッド２２は、外径約
５００μｍの円環形である。導体パターン２４は、直径
約２５０μｍの円環形である。パッド２２、導体パター
ン２３および２４の材料は、銅である。パッド２２、導
体パターン２３および２４の表面には、金メッキが施さ
れている。The tape carrier 20 has a through hole 2
5 are formed. The conductor pattern 23 is formed on the inner surface of the through hole 25. Conductive patterns 24 and pads 22 are formed on the upper and lower surfaces of the tape carrier 20. Pad 22, conductor patterns 23 and 24
Has a thickness of 10 to 25 μm. The pad 22 has an annular shape with an outer diameter of about 500 μm. The conductor pattern 24 has an annular shape with a diameter of about 250 μm. The material of the pad 22, the conductor patterns 23 and 24 is copper. The surfaces of the pads 22 and the conductor patterns 23 and 24 are plated with gold.

【００４６】スルーホール２５の径は、上面において約
１５０μｍ、下面において約３００μｍである。このた
め、スルーホール２５はテーパを有する。The diameter of the through hole 25 is about 150 μm on the upper surface and about 300 μm on the lower surface. Therefore, the through hole 25 has a taper.

【００４７】実装基板３０の上面には、パッド３１が設
けられている。パッド３１は、直径約６００μｍの円形
である。実装基板３０のパッド３１と、テープキャリア
２０のパッド２２とは、核１１およびハンダ１３により
接続されている。Pads 31 are provided on the upper surface of the mounting board 30. The pad 31 is circular with a diameter of about 600 μm. The pads 31 of the mounting board 30 and the pads 22 of the tape carrier 20 are connected by the core 11 and the solder 13.

【００４８】核１１の寸法および材料は、第１の実施例
のものと同じである。核１１は、スルーホール２５内に
配置され、スルーホール２５の内側面と接触する。核１
１の下部は、パッド３１と接触する。核１１は、テープ
キャリア２０を実装基板３０上に支持する。The dimensions and materials of the core 11 are the same as those of the first embodiment. The nucleus 11 is disposed in the through hole 25 and comes into contact with the inner surface of the through hole 25. Nucleus 1
The lower part of 1 contacts the pad 31. The core 11 supports the tape carrier 20 on the mounting substrate 30.

【００４９】スルーホール２５の内部には、ハンダ１３
が侵入している。ハンダ１３の一部は、スルーホール２
５を通って、絶縁フィルム２１の上面に出現している。Inside the through hole 25, the solder 13
Is invading. Part of solder 13 is through hole 2
5 and appears on the upper surface of the insulating film 21.

【００５０】次に、上述の電子部品組立体の製造方法の
うち、テープキャリア２０を実装基板３０に接続するた
めの第１の方法について説明する。Next, a first method for connecting the tape carrier 20 to the mounting board 30 among the above-described methods for manufacturing an electronic component assembly will be described.

【００５１】図３（ａ）を参照すると、第１のステップ
において、パッド３１上にクリームハンダ３２が塗布さ
れる。クリームハンダ３２の厚さは、約１５０〜２５０
μｍである。さらに、クリームハンダ３２上に接続部材
１０が載置される。クリームハンダ３２が粘性を有する
ので、接続部材１０がクリームハンダ３２から転がり落
ちることはない。Referring to FIG. 3A, in a first step, cream solder 32 is applied on pad 31. The thickness of the cream solder 32 is about 150 to 250
μm. Further, the connection member 10 is placed on the cream solder 32. Since the cream solder 32 has viscosity, the connecting member 10 does not roll off the cream solder 32.

【００５２】図３（ｂ）を参照すると、第２のステップ
において、接続部材１０のハンダ層１２およびクリーム
ハンダ３２が加熱される。ハンダ層１２およびクリーム
ハンダ３２は溶解し、ハンダ１３となる。一方、核１１
は溶解しない。所定時間の加熱の後、ハンダ１３は冷却
される。Referring to FIG. 3B, in the second step, the solder layer 12 and the cream solder 32 of the connecting member 10 are heated. The solder layer 12 and the cream solder 32 are dissolved to form the solder 13. On the other hand, nucleus 11
Does not dissolve. After heating for a predetermined time, the solder 13 is cooled.

【００５３】図３（ｃ）を参照すると、第３のステップ
において、テープキャリア２０のスルーホール２５が、
核１１上に位置づけられる。Referring to FIG. 3C, in the third step, the through holes 25 of the tape carrier 20 are
It is located on the nucleus 11.

【００５４】図３（ｄ）を参照すると、第４のステップ
において、ハンダ１３が加熱される。ハンダ１３は溶解
し、その一部がスルーホール２５内部に吸い上げられ
る。吸い上げられたハンダ１３の一部は、テープキャリ
ア２０の上面に出現する。この出現により、パッド２２
およびパッド３１が正常に接続されたことが確認でき
る。一方、核１１は溶解しない。このため、テープキャ
リア２０は、核１１により、実装基板３０上に支持さ
れ、テープキャリア２０と実装基板３０の間の間隔は均
一となる。Referring to FIG. 3D, in a fourth step, the solder 13 is heated. The solder 13 dissolves and a part thereof is sucked into the through hole 25. Part of the sucked-up solder 13 appears on the upper surface of the tape carrier 20. With this appearance, pad 22
It can be confirmed that the pad 31 has been connected normally. On the other hand, the nucleus 11 does not dissolve. For this reason, the tape carrier 20 is supported on the mounting substrate 30 by the nucleus 11, and the interval between the tape carrier 20 and the mounting substrate 30 becomes uniform.

【００５５】次に、テープキャリア２０を実装基板３０
に接続するための第２の方法について説明する。Next, the tape carrier 20 is mounted on the mounting board 30.
A second method for connecting to the network will be described.

【００５６】図４（ａ）を参照すると、第１のステップ
は、第１の方法のものと同じである。Referring to FIG. 4A, the first step is the same as that of the first method.

【００５７】図４（ｂ）を参照すると、第２のステップ
において、テープキャリア２０のスルーホール２５が、
接続部材１０上に位置づけられる。Referring to FIG. 4B, in the second step, the through holes 25 of the tape carrier 20 are
It is located on the connection member 10.

【００５８】図４（ｃ）を参照すると、第３のステップ
において、接続部材１０およびクリームハンダ３２が加
熱される。接続部材１０のハンダ層１２およびクリーム
ハンダ３２は溶解して、ハンダ１３となる。核１１は溶
解しない。溶解したハンダ１３の一部は、スルーホール
２５内部に吸い上げられる。スルーホール２５のテーパ
形状が、この吸い上げを促進する。吸い上げられたハン
ダ１３の一部は、テープキャリア２０の上面に出現す
る。この出現により、パッド２２およびパッド３１が正
常に接続されたことが確認できる。一方、核１１は溶解
しない。このため、テープキャリア２０は、核１１によ
り、実装基板３０上に支持される。Referring to FIG. 4C, in the third step, the connection member 10 and the cream solder 32 are heated. The solder layer 12 and the cream solder 32 of the connecting member 10 are melted to form the solder 13. The nucleus 11 does not dissolve. Part of the melted solder 13 is sucked into the through hole 25. The tapered shape of the through hole 25 promotes this suction. Part of the sucked-up solder 13 appears on the upper surface of the tape carrier 20. With this appearance, it can be confirmed that the pad 22 and the pad 31 are normally connected. On the other hand, the nucleus 11 does not dissolve. Therefore, the tape carrier 20 is supported on the mounting board 30 by the core 11.

【００５９】第１の方法の第４のステップ、および、第
２の方法の第３のステップにおいて、テープキャリア２
０を平坦にするために、テープキャリア２０を実装基板
３０に押圧してもよい。この押圧は、ハンダ１３のスル
ーホール２５内への吸い上げを促進する効果もある。In the fourth step of the first method and the third step of the second method, the tape carrier 2
The tape carrier 20 may be pressed against the mounting board 30 in order to make the 0 flat. This pressing also has the effect of promoting the suction of the solder 13 into the through hole 25.

【００６０】次に、第２の実施例の効果について説明す
る。Next, the effect of the second embodiment will be described.

【００６１】第１にテープキャリア２０と実装基板３０
の間のハンダバンプの高さが均一になる。テープキャリ
ア２０と実装基板３０の間に核１１が介在するからであ
る。First, the tape carrier 20 and the mounting substrate 30
And the height of the solder bumps becomes uniform. This is because the core 11 is interposed between the tape carrier 20 and the mounting board 30.

【００６２】第２に、テープキャリア２０を実装基板３
０に向けて加圧しても、ハンダ１３が押しつぶされな
い。テープキャリア２０と実装基板３０の間に核１１が
介在するからである。Second, the tape carrier 20 is mounted on the mounting substrate 3
Even if pressure is applied to zero, the solder 13 is not crushed. This is because the core 11 is interposed between the tape carrier 20 and the mounting board 30.

【００６３】第３に、ハンダバンプが核１１を含むの
で、ハンダバンプの強度が高い。Third, since the solder bump includes the nucleus 11, the strength of the solder bump is high.

【００６４】第４に、パッド３１もしくはパッド２２が
金メッキされていた場合、ハンダ１３内に拡散する金メ
ッキの量が少ない。金メッキの拡散に寄与しない核１１
がハンダバンプの大部分を占めるためである。Fourth, when the pad 31 or the pad 22 is gold-plated, the amount of gold plating diffused into the solder 13 is small. Nucleus 11 that does not contribute to the diffusion of gold plating
Occupies most of the solder bumps.

【００６５】第５に、ハンダバンプの位置精度が向上す
る。球形の接続部材１０が、スルーホール２５に係合す
るためである。Fifth, the position accuracy of the solder bump is improved. This is because the spherical connection member 10 is engaged with the through hole 25.

【００６６】第６に、ハンダ１３の接続不良が容易に確
認できる。ハンダ１３が絶縁フィルム２１の上面に出現
したことにより、接続不良が確認できるからである。Sixth, a connection failure of the solder 13 can be easily confirmed. This is because the connection failure can be confirmed by the appearance of the solder 13 on the upper surface of the insulating film 21.

【００６７】第７に、加熱処理中にテープキャリア２０
を実装基板３０に押圧しても、ハンダ１３が絶縁フィル
ム２１の上面に流出することはない。Seventh, during the heat treatment, the tape carrier 20
Is pressed against the mounting substrate 30, the solder 13 does not flow out to the upper surface of the insulating film 21.

【００６８】第８に、スルーホール２５がテーパを有す
るため、ハンダ１３がスルーホール２５内に吸い込まれ
やすい。Eighth, since the through hole 25 has a taper, the solder 13 is easily sucked into the through hole 25.

【００６９】次に、本発明の第３の実施例について説明
する。第３の実施例は、接続部材１０を用いた電子部品
組立体、および、この電子部品組立体の製造方法に関す
る。Next, a third embodiment of the present invention will be described. The third embodiment relates to an electronic component assembly using the connection member 10 and a method of manufacturing the electronic component assembly.

【００７０】図５（ｃ）を参照すると、第３の実施例の
電子部品組立体は、ＬＳＩチップ４１を含む。ＬＳＩチ
ップ４１の構造は、第２の実施例のものと同じである。Referring to FIG. 5C, the electronic component assembly according to the third embodiment includes an LSI chip 41. The structure of the LSI chip 41 is the same as that of the second embodiment.

【００７１】絶縁フィルム２１の上面には、導体配線２
６が形成されている。絶縁フィルム２１の材料は、第２
の実施例のものと同じである。On the upper surface of the insulating film 21, the conductor wiring 2
6 are formed. The material of the insulating film 21 is the second
This is the same as that of the embodiment.

【００７２】導体配線２６上には、導体パターン２４が
形成されている。テープキャリア２０の下面には、パッ
ド２２が設けられている。スルーホール２５の内側面に
は、導体パターン２３が設けられている。パッド２２、
導体パターン２３および２４は、金メッキにより形成で
きる。また、銅メッキの上に金メッキを施しても良い。The conductor pattern 24 is formed on the conductor wiring 26. Pads 22 are provided on the lower surface of the tape carrier 20. The conductor pattern 23 is provided on the inner side surface of the through hole 25. Pad 22,
The conductor patterns 23 and 24 can be formed by gold plating. Further, gold plating may be performed on copper plating.

【００７３】導体パターン２３には、接続部材１０が接
続されている。接続部材１０は、核１１と、ハンダ層１
２である金スズ合金層１４とを含む。接続部材１０の径
が大きい場合は、接続部材１０はスルーホール２５に収
容されない。このため、接続部材１０はパッド２２に接
続される。接続部材１０の下部は、クリームハンダ３２
により、パッド３１に接続されている。The connection member 10 is connected to the conductor pattern 23. The connecting member 10 includes a core 11 and a solder layer 1.
2 gold-tin alloy layer 14. When the diameter of the connection member 10 is large, the connection member 10 is not accommodated in the through hole 25. Therefore, the connection member 10 is connected to the pad 22. The lower part of the connection member 10 is
Is connected to the pad 31.

【００７４】次に、テープキャリア２０と実装基板３０
との接続方法について説明する。Next, the tape carrier 20 and the mounting substrate 30
A connection method with the server will be described.

【００７５】図５（ａ）を参照すると、第１のステップ
において、接続部材１０がスルーホール２５内に載置さ
れる。金スズ合金層１４は、導体パターン２３と接触す
る。Referring to FIG. 5A, in a first step, the connection member 10 is placed in the through hole 25. The gold-tin alloy layer 14 comes into contact with the conductor pattern 23.

【００７６】接続部材１０は、窒素雰囲気中の電気炉の
中で３００〜３５０℃の温度範囲で、約１０分間加熱さ
れる。ポリイミドの分解温度は４００℃以上のため、こ
の加熱によりテープキャリア２０が損傷することはな
い。また、核１１が溶解することもない。The connecting member 10 is heated in a temperature range of 300 to 350 ° C. for about 10 minutes in an electric furnace in a nitrogen atmosphere. Since the decomposition temperature of the polyimide is 400 ° C. or higher, the tape carrier 20 is not damaged by this heating. Further, the nucleus 11 does not dissolve.

【００７７】金スズ合金層１４の共晶温度は約２８０℃
である。このため、上述の加熱により、導体パターン２
３の金メッキと金スズ合金層１４とが反応を起こして、
金スズ合金層１５が形成される。これにより、接続部材
１０と導体パターン２３とが接続される。The eutectic temperature of the gold-tin alloy layer 14 is about 280 ° C.
It is. Therefore, the above-described heating causes the conductor pattern 2
The gold plating of No. 3 reacts with the gold-tin alloy layer 14,
The gold-tin alloy layer 15 is formed. Thereby, the connection member 10 and the conductor pattern 23 are connected.

【００７８】図６を参照すると、導体パターン２３に
は、接続部材１０が接続されている。ＬＳＩチップ４
１、テープキャリア２０、および、接続部材１０は、電
子部品キャリア４２を構成する。Referring to FIG. 6, the connection member 10 is connected to the conductor pattern 23. LSI chip 4
1, the tape carrier 20, and the connection member 10 constitute an electronic component carrier 42.

【００７９】図５（ｂ）を参照すると、第２のステップ
において、パッド３１上にクリームハンダ３２が塗布さ
れる。クリームハンダ３２上に接続部材１０が位置する
ように、電子部品キャリア４２が位置づけられる。Referring to FIG. 5B, in a second step, cream solder 32 is applied on pad 31. Electronic component carrier 42 is positioned such that connection member 10 is positioned on cream solder 32.

【００８０】図５（ｃ）を参照すると、第３のステップ
において、接続部材１０およびクリームハンダ３２が加
熱される。金スズ合金層１４およびクリームハンダ３２
は溶解し、接続部材１０とパッド３１とを接続する。Referring to FIG. 5C, in the third step, connection member 10 and cream solder 32 are heated. Gold tin alloy layer 14 and cream solder 32
Melts and connects the connection member 10 and the pad 31.

【００８１】第３の実施例は、上述した第２の実施例の
効果のうち、第１〜第６の効果を有する。The third embodiment has the first to sixth effects among the effects of the above-described second embodiment.

【００８２】次に、本発明の第４の実施例について説明
する。Next, a fourth embodiment of the present invention will be described.

【００８３】図７を参照すると、第４の実施例の電子部
品キャリア４２は、ＬＳＩチップ４１を含む。ＬＳＩチ
ップ４１の構造は、第２の実施例のものと同じである。Referring to FIG. 7, the electronic component carrier 42 of the fourth embodiment includes an LSI chip 41. The structure of the LSI chip 41 is the same as that of the second embodiment.

【００８４】絶縁フィルム２１の下面には、導体配線２
７が形成されている。導体配線２７の表面には、金メッ
キ層２８が形成されている。導体配線２７の一部はイン
ナーリードを形成し、ＬＳＩチップ４１と接続される。
絶縁フィルム２１の材料は、第２の実施例のものと同じ
である。On the lower surface of the insulating film 21, the conductor wiring 2
7 are formed. A gold plating layer 28 is formed on the surface of the conductor wiring 27. Part of the conductor wiring 27 forms an inner lead and is connected to the LSI chip 41.
The material of the insulating film 21 is the same as that of the second embodiment.

【００８５】テープキャリア２０の下面には、パッド５
０が形成されている。パッド５０は、導体パターン５１
と金メッキ層５２とを含む。パッド５０は、導体配線２
７と接続される。導体パターン５１および金メッキ層５
２の厚さは、それぞれ、約１０〜２５μｍおよび１〜５
μｍである。The pad 5 is provided on the lower surface of the tape carrier 20.
0 is formed. The pad 50 has a conductor pattern 51
And a gold plating layer 52. The pad 50 is a conductor wiring 2
7 is connected. Conductor pattern 51 and gold plating layer 5
2 are about 10-25 μm and 1-5, respectively.
μm.

【００８６】パッド５０には接続部材１０が接続されて
いる。接続部材１０と金メッキ層５２の接続部分には、
金スズ合金層５３が形成されている。The connection member 10 is connected to the pad 50. In the connection portion between the connection member 10 and the gold plating layer 52,
A gold-tin alloy layer 53 is formed.

【００８７】さらに、テープキャリア２０の下面には、
導体配線２７を保護するために、絶縁層５４が形成され
ている。Further, on the lower surface of the tape carrier 20,
An insulating layer 54 is formed to protect the conductor wiring 27.

【００８８】次に、電子部品キャリア４２の製造方法の
うち、パッド５０と接続部材１０との接続方法について
説明する。Next, a method of connecting the pad 50 and the connecting member 10 in the method of manufacturing the electronic component carrier 42 will be described.

【００８９】図８（ａ）を参照すると、第１のステップ
において、絶縁フィルム２１の下面に導体パターン５１
が形成される。Referring to FIG. 8A, in the first step, the conductive pattern 51 is formed on the lower surface of the insulating film 21.
Is formed.

【００９０】図８（ｂ）を参照すると、第２のステップ
において、導体パターン５１の表面に金メッキ層５２が
形成される。Referring to FIG. 8B, in the second step, a gold plating layer 52 is formed on the surface of the conductor pattern 51.

【００９１】図８（ｃ）を参照すると、第３のステップ
において、金メッキ層５２に接続部材１０が押しつけら
れる。接続部材１０は、核１１と、ハンダ層１２である
金スズ合金層１４とを含む。金スズ合金層１４に代え
て、スズ層を用いても良い。Referring to FIG. 8C, in a third step, the connection member 10 is pressed against the gold plating layer 52. The connection member 10 includes a core 11 and a gold-tin alloy layer 14 that is a solder layer 12. Instead of the gold-tin alloy layer 14, a tin layer may be used.

【００９２】図８（ｄ）を参照すると、第４のステップ
において、接続部材１０は、窒素雰囲気中の電気炉の中
で３００〜３５０℃の温度範囲で、約１０分間加熱され
る。ポリイミドの分解温度は４００℃以上のため、この
加熱によりテープキャリア２０が損傷することはない。
また、核１１が溶解することもない。Referring to FIG. 8D, in the fourth step, the connection member 10 is heated in an electric furnace in a nitrogen atmosphere at a temperature in the range of 300 to 350 ° C. for about 10 minutes. Since the decomposition temperature of the polyimide is 400 ° C. or higher, the tape carrier 20 is not damaged by this heating.
Further, the nucleus 11 does not dissolve.

【００９３】金スズ合金層１４の共晶温度は約２８０℃
である。このため、上述の加熱により、金メッキ層５２
と金スズ合金層１４とが反応を起こして、金スズ合金層
５３が形成される。これにより、接続部材１０と導体パ
ターン２３とが接続される。The eutectic temperature of the gold-tin alloy layer 14 is about 280 ° C.
It is. Therefore, the gold plating layer 52
And the gold-tin alloy layer 14 react to form the gold-tin alloy layer 53. Thereby, the connection member 10 and the conductor pattern 23 are connected.

【００９４】第３の実施例において、ハンダ層１２とし
てスズ／鉛の共晶ハンダを用いても良い。スズ／鉛の共
晶ハンダの融点は１８０℃である。ハンダ層１２として
スズ／鉛共晶ハンダを用いて場合は、金スズ合金層５３
は形成されない。In the third embodiment, a tin / lead eutectic solder may be used as the solder layer 12. The melting point of tin / lead eutectic solder is 180 ° C. When tin / lead eutectic solder is used as the solder layer 12, the gold-tin alloy layer 53 is used.
Is not formed.

【００９５】第４の実施例は、上述した第２の実施例の
効果のうち、第１〜第５の効果を有する。The fourth embodiment has the first to fifth effects among the effects of the second embodiment described above.

【００９６】[0096]

【発明の効果】本発明は以下の効果を有する。The present invention has the following effects.

【００９７】第１にテープキャリア２０と実装基板３０
の間のハンダバンプの高さが均一になる。テープキャリ
ア２０と実装基板３０の間に核１１が介在するからであ
る。First, the tape carrier 20 and the mounting substrate 30
And the height of the solder bumps becomes uniform. This is because the core 11 is interposed between the tape carrier 20 and the mounting board 30.

【００９８】第２に、テープキャリア２０を実装基板３
０に向けて加圧しても、ハンダ１３が押しつぶされな
い。テープキャリア２０と実装基板３０の間に核１１が
介在するからである。Second, the tape carrier 20 is mounted on the mounting substrate 3
Even if pressure is applied to zero, the solder 13 is not crushed. This is because the core 11 is interposed between the tape carrier 20 and the mounting board 30.

【００９９】第３に、ハンダバンプが核１１を含むの
で、ハンダバンプの強度が高い。Third, since the solder bump includes the nucleus 11, the solder bump has high strength.

【０１００】第４に、パッド３１もしくはパッド２２が
金メッキされていた場合、ハンダ１３内に拡散する金メ
ッキの量が少ない。金メッキの拡散に寄与しない核１１
がハンダバンプの大部分を占めるためである。Fourth, when the pad 31 or the pad 22 is gold-plated, the amount of gold plating diffused into the solder 13 is small. Nucleus 11 that does not contribute to the diffusion of gold plating
Occupies most of the solder bumps.

【０１０１】第５に、ハンダバンプの位置精度が向上す
る。球形の接続部材１０が、スルーホール２５に係合す
るためである。Fifth, the position accuracy of the solder bump is improved. This is because the spherical connection member 10 is engaged with the through hole 25.

【０１０２】第６に、ハンダ１３の接続不良が容易に確
認できる。ハンダ１３が絶縁フィルム２１の上面に出現
したことにより、接続不良が確認できるからである。Sixth, the connection failure of the solder 13 can be easily confirmed. This is because the connection failure can be confirmed by the appearance of the solder 13 on the upper surface of the insulating film 21.

【０１０３】第７に、加熱処理中にテープキャリア２０
を実装基板３０に押圧しても、ハンダ１３が絶縁フィル
ム２１の上面に流出することはない。Seventh, during the heat treatment, the tape carrier 20
Is pressed against the mounting substrate 30, the solder 13 does not flow out to the upper surface of the insulating film 21.

【０１０４】第８に、スルーホール２５がテーパを有す
るため、ハンダ１３がスルーホール２５内に吸い込まれ
やすい。Eighth, since the through hole 25 has a taper, the solder 13 is easily sucked into the through hole 25.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の第１の実施例の接続部材１０の構造を
示す図。FIG. 1 is a diagram showing a structure of a connection member 10 according to a first embodiment of the present invention.

【図２】本発明の第２の実施例の電子部品組立体の構造
を示す図。FIG. 2 is a view showing the structure of an electronic component assembly according to a second embodiment of the present invention.

【図３】第２の実施例における、テープキャリア２０と
実装基板３０の第１の接続方法を示す図。FIG. 3 is a diagram showing a first connection method between the tape carrier 20 and the mounting board 30 in the second embodiment.

【図４】第２の実施例における、テープキャリア２０と
実装基板３０の第２の接続方法を示す図。FIG. 4 is a diagram showing a second connection method between the tape carrier 20 and the mounting board 30 in the second embodiment.

【図５】本発明の第３の実施例の電子部品組立体の構造
および製造方法を示す図。FIG. 5 is a view showing a structure and a manufacturing method of an electronic component assembly according to a third embodiment of the present invention.

【図６】本発明の第３の実施例の電子部品キャリアの構
造を示す図。FIG. 6 is a view showing the structure of an electronic component carrier according to a third embodiment of the present invention.

【図７】本発明の第４の実施例の電子部品組立体の構造
を示す図。FIG. 7 is a view showing the structure of an electronic component assembly according to a fourth embodiment of the present invention.

【図８】第４の実施例における、パッド５０と接続部材
１０の接続方法を示す図。FIG. 8 is a diagram showing a connection method between a pad 50 and a connection member 10 in a fourth embodiment.

【符号の説明】[Explanation of symbols]

１０ 接続部材 １１ 核 １２ ハンダ層 １３ ハンダ １４ 金スズ合金層 １５ 金スズ合金層 ２０ テープキャリア ２１ 絶縁フィルム ２２ パッド ２３ 導体パターン ２４ 導体パターン ２５ スルーホール ２６ 導体配線 ２７ 導体配線 ２８ 金メッキ層 ２９ 導体配線 ３０ 実装基板 ３１ パッド ３２ クリームハンダ ４１ ＬＳＩチップ ５０ パッド ５１ 導体パターン ５２ 金メッキ層 ５３ 金スズ合金層 DESCRIPTION OF SYMBOLS 10 Connection member 11 Nucleus 12 Solder layer 13 Solder 14 Gold-tin alloy layer 15 Gold-tin alloy layer 20 Tape carrier 21 Insulating film 22 Pad 23 Conductor pattern 24 Conductor pattern 25 Through hole 26 Conductor wiring 27 Conductor wiring 28 Gold plating layer 29 Conductor wiring 30 Mounting board 31 Pad 32 Cream solder 41 LSI chip 50 Pad 51 Conductor pattern 52 Gold plating layer 53 Gold tin alloy layer

フロントページの続き (31)優先権主張番号 特願平6−236530 (32)優先日 平６(1994)９月30日 (33)優先権主張国 日本（ＪＰ） (72)発明者 嶋田 勇三 東京都港区芝五丁目７番１号 日本電気 株式会社内 (56)参考文献 特開 昭62−266842（ＪＰ，Ａ) 特開 昭62−117346（ＪＰ，Ａ) 特開 昭62−296446（ＪＰ，Ａ) 実開 平２−29435（ＪＰ，Ｕ) 実開 平３−95636（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 21/60 H01L 21/60 311 Continued on the front page (31) Priority claim number Japanese Patent Application No. 6-236530 (32) Priority date Hei 6 (1994) September 30 (33) Priority claim country Japan (JP) (72) Inventor Yuzo Shimada Tokyo JP-A-62-266842 (JP, A) JP-A-62-117346 (JP, A) JP-A-62-296446 (JP-A) , A) Hikaru Hei 2-29435 (JP, U) Hikaru Hei 3-95636 (JP, U) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/60 H01L 21/60 311

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 第１のパッドを有する第１の基板と、 第２のスルーホールを含んだパッドを有する第２の基板
とを含む電子部品組立体の製造方法において、 核とこの核を被覆し前記核よりも融点の低いハンダとを
含む接続部材を用意する第１のステップと、 前記第１の基板の前記第１のパッド上にクリームハンダ
を塗布する第２のステップと、 前記クリームハンダ上に前記接続部材を載置する第３の
ステップと、 前記接続部材上に前記第２の基板の前記第２のパッドを
位置づける第４のステップと、 前記接続部材および前記クリームハンダを前記核の融点
以下の温度で加熱して、前記クリームハンダおよび前記
接続部材の前記ハンダを溶解することにより、前記第１
のパッドと前記第２のパッドとを接続する第５のステッ
プとを含み、 前記第５のステップにおいて、前記ハンダまたは前記ク
リームハンダの少なとも一部が前記スルーホール内に侵
入することを特徴とする電子部品組立体の製造方法。1. A method for manufacturing an electronic component assembly including a first substrate having a first pad and a second substrate having a pad including a second through hole, wherein the core is coated with the core. A first step of preparing a connection member including solder having a melting point lower than that of the core; a second step of applying cream solder on the first pad of the first substrate; and the cream solder. A third step of placing the connection member thereon, a fourth step of positioning the second pad of the second substrate on the connection member, and attaching the connection member and the cream solder to the core. By heating at a temperature below the melting point to melt the cream solder and the solder of the connecting member, the first
Look including a fifth step for connecting the pad and the second pad, said in the fifth step, characterized in that the solder or low and a part of the cream solder from entering into the through hole Manufacturing method of an electronic component assembly. 【請求項２】 前記第２のパッドが前記第２の基板の第
１の面に設けられるとともに、 前記ハンダおよび前記クリームハンダの少なくとも一部
が前記スルーホールを通って前記第２の基板の前記第２
の面に出現したことにより、前記第１のパッドと前記第
２のパッドとが正常に接続されたことを確認する第６の
ステップを含むことを特徴とする請求項１記載の電子部
品の接続方法。2. The method according to claim 2, wherein the second pad is provided on a first surface of the second substrate, and at least a part of the solder and the cream solder passes through the through hole and is provided on the second substrate. Second
6. The connection of the electronic component according to claim 1, further comprising a sixth step of confirming that the first pad and the second pad have been normally connected by having appeared on the surface of the electronic component. Method.
JP7174841A 1994-07-13 1995-07-11 Manufacturing method of electronic component assembly Expired - Lifetime JP2874597B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7174841A JP2874597B2 (en) 1994-07-13 1995-07-11 Manufacturing method of electronic component assembly

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
JP16109294 1994-07-13
JP6-161092 1994-07-22
JP6-170628 1994-07-22
JP17062494 1994-07-22
JP17062894 1994-07-22
JP23653094 1994-09-30
JP6-236530 1994-09-30
JP6-170624 1994-09-30
JP7174841A JP2874597B2 (en) 1994-07-13 1995-07-11 Manufacturing method of electronic component assembly

Publications (2)

Publication Number Publication Date
JPH08153727A JPH08153727A (en) 1996-06-11
JP2874597B2 true JP2874597B2 (en) 1999-03-24

Family

ID=27528254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7174841A Expired - Lifetime JP2874597B2 (en) 1994-07-13 1995-07-11 Manufacturing method of electronic component assembly

Country Status (1)

Country Link
JP (1) JP2874597B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69838586T2 (en) 1997-06-04 2008-07-24 Ibiden Co., Ltd., Ogaki SOLDERING ELEMENT FOR PRINTED PCB
JP4556568B2 (en) * 2004-09-03 2010-10-06 パナソニック株式会社 Manufacturing method of surface acoustic wave device

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